blob: 657165297dc76c0a16bd2126b854920ffbf99cbe [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * linux/drivers/ide/ide-iops.c Version 0.37 Mar 05, 2003
3 *
4 * Copyright (C) 2000-2002 Andre Hedrick <andre@linux-ide.org>
5 * Copyright (C) 2003 Red Hat <alan@redhat.com>
6 *
7 */
8
Linus Torvalds1da177e2005-04-16 15:20:36 -07009#include <linux/module.h>
10#include <linux/types.h>
11#include <linux/string.h>
12#include <linux/kernel.h>
13#include <linux/timer.h>
14#include <linux/mm.h>
15#include <linux/interrupt.h>
16#include <linux/major.h>
17#include <linux/errno.h>
18#include <linux/genhd.h>
19#include <linux/blkpg.h>
20#include <linux/slab.h>
21#include <linux/pci.h>
22#include <linux/delay.h>
23#include <linux/hdreg.h>
24#include <linux/ide.h>
25#include <linux/bitops.h>
26
27#include <asm/byteorder.h>
28#include <asm/irq.h>
29#include <asm/uaccess.h>
30#include <asm/io.h>
31
32/*
33 * Conventional PIO operations for ATA devices
34 */
35
36static u8 ide_inb (unsigned long port)
37{
38 return (u8) inb(port);
39}
40
41static u16 ide_inw (unsigned long port)
42{
43 return (u16) inw(port);
44}
45
46static void ide_insw (unsigned long port, void *addr, u32 count)
47{
48 insw(port, addr, count);
49}
50
51static u32 ide_inl (unsigned long port)
52{
53 return (u32) inl(port);
54}
55
56static void ide_insl (unsigned long port, void *addr, u32 count)
57{
58 insl(port, addr, count);
59}
60
61static void ide_outb (u8 val, unsigned long port)
62{
63 outb(val, port);
64}
65
66static void ide_outbsync (ide_drive_t *drive, u8 addr, unsigned long port)
67{
68 outb(addr, port);
69}
70
71static void ide_outw (u16 val, unsigned long port)
72{
73 outw(val, port);
74}
75
76static void ide_outsw (unsigned long port, void *addr, u32 count)
77{
78 outsw(port, addr, count);
79}
80
81static void ide_outl (u32 val, unsigned long port)
82{
83 outl(val, port);
84}
85
86static void ide_outsl (unsigned long port, void *addr, u32 count)
87{
88 outsl(port, addr, count);
89}
90
91void default_hwif_iops (ide_hwif_t *hwif)
92{
93 hwif->OUTB = ide_outb;
94 hwif->OUTBSYNC = ide_outbsync;
95 hwif->OUTW = ide_outw;
96 hwif->OUTL = ide_outl;
97 hwif->OUTSW = ide_outsw;
98 hwif->OUTSL = ide_outsl;
99 hwif->INB = ide_inb;
100 hwif->INW = ide_inw;
101 hwif->INL = ide_inl;
102 hwif->INSW = ide_insw;
103 hwif->INSL = ide_insl;
104}
105
Linus Torvalds1da177e2005-04-16 15:20:36 -0700106/*
107 * MMIO operations, typically used for SATA controllers
108 */
109
110static u8 ide_mm_inb (unsigned long port)
111{
112 return (u8) readb((void __iomem *) port);
113}
114
115static u16 ide_mm_inw (unsigned long port)
116{
117 return (u16) readw((void __iomem *) port);
118}
119
120static void ide_mm_insw (unsigned long port, void *addr, u32 count)
121{
122 __ide_mm_insw((void __iomem *) port, addr, count);
123}
124
125static u32 ide_mm_inl (unsigned long port)
126{
127 return (u32) readl((void __iomem *) port);
128}
129
130static void ide_mm_insl (unsigned long port, void *addr, u32 count)
131{
132 __ide_mm_insl((void __iomem *) port, addr, count);
133}
134
135static void ide_mm_outb (u8 value, unsigned long port)
136{
137 writeb(value, (void __iomem *) port);
138}
139
140static void ide_mm_outbsync (ide_drive_t *drive, u8 value, unsigned long port)
141{
142 writeb(value, (void __iomem *) port);
143}
144
145static void ide_mm_outw (u16 value, unsigned long port)
146{
147 writew(value, (void __iomem *) port);
148}
149
150static void ide_mm_outsw (unsigned long port, void *addr, u32 count)
151{
152 __ide_mm_outsw((void __iomem *) port, addr, count);
153}
154
155static void ide_mm_outl (u32 value, unsigned long port)
156{
157 writel(value, (void __iomem *) port);
158}
159
160static void ide_mm_outsl (unsigned long port, void *addr, u32 count)
161{
162 __ide_mm_outsl((void __iomem *) port, addr, count);
163}
164
165void default_hwif_mmiops (ide_hwif_t *hwif)
166{
167 hwif->OUTB = ide_mm_outb;
168 /* Most systems will need to override OUTBSYNC, alas however
169 this one is controller specific! */
170 hwif->OUTBSYNC = ide_mm_outbsync;
171 hwif->OUTW = ide_mm_outw;
172 hwif->OUTL = ide_mm_outl;
173 hwif->OUTSW = ide_mm_outsw;
174 hwif->OUTSL = ide_mm_outsl;
175 hwif->INB = ide_mm_inb;
176 hwif->INW = ide_mm_inw;
177 hwif->INL = ide_mm_inl;
178 hwif->INSW = ide_mm_insw;
179 hwif->INSL = ide_mm_insl;
180}
181
182EXPORT_SYMBOL(default_hwif_mmiops);
183
184u32 ide_read_24 (ide_drive_t *drive)
185{
186 u8 hcyl = HWIF(drive)->INB(IDE_HCYL_REG);
187 u8 lcyl = HWIF(drive)->INB(IDE_LCYL_REG);
188 u8 sect = HWIF(drive)->INB(IDE_SECTOR_REG);
189 return (hcyl<<16)|(lcyl<<8)|sect;
190}
191
192void SELECT_DRIVE (ide_drive_t *drive)
193{
194 if (HWIF(drive)->selectproc)
195 HWIF(drive)->selectproc(drive);
196 HWIF(drive)->OUTB(drive->select.all, IDE_SELECT_REG);
197}
198
199EXPORT_SYMBOL(SELECT_DRIVE);
200
201void SELECT_INTERRUPT (ide_drive_t *drive)
202{
203 if (HWIF(drive)->intrproc)
204 HWIF(drive)->intrproc(drive);
205 else
206 HWIF(drive)->OUTB(drive->ctl|2, IDE_CONTROL_REG);
207}
208
209void SELECT_MASK (ide_drive_t *drive, int mask)
210{
211 if (HWIF(drive)->maskproc)
212 HWIF(drive)->maskproc(drive, mask);
213}
214
215void QUIRK_LIST (ide_drive_t *drive)
216{
217 if (HWIF(drive)->quirkproc)
218 drive->quirk_list = HWIF(drive)->quirkproc(drive);
219}
220
221/*
222 * Some localbus EIDE interfaces require a special access sequence
223 * when using 32-bit I/O instructions to transfer data. We call this
224 * the "vlb_sync" sequence, which consists of three successive reads
225 * of the sector count register location, with interrupts disabled
226 * to ensure that the reads all happen together.
227 */
228static void ata_vlb_sync(ide_drive_t *drive, unsigned long port)
229{
230 (void) HWIF(drive)->INB(port);
231 (void) HWIF(drive)->INB(port);
232 (void) HWIF(drive)->INB(port);
233}
234
235/*
236 * This is used for most PIO data transfers *from* the IDE interface
237 */
238static void ata_input_data(ide_drive_t *drive, void *buffer, u32 wcount)
239{
240 ide_hwif_t *hwif = HWIF(drive);
241 u8 io_32bit = drive->io_32bit;
242
243 if (io_32bit) {
244 if (io_32bit & 2) {
245 unsigned long flags;
246 local_irq_save(flags);
247 ata_vlb_sync(drive, IDE_NSECTOR_REG);
248 hwif->INSL(IDE_DATA_REG, buffer, wcount);
249 local_irq_restore(flags);
250 } else
251 hwif->INSL(IDE_DATA_REG, buffer, wcount);
252 } else {
253 hwif->INSW(IDE_DATA_REG, buffer, wcount<<1);
254 }
255}
256
257/*
258 * This is used for most PIO data transfers *to* the IDE interface
259 */
260static void ata_output_data(ide_drive_t *drive, void *buffer, u32 wcount)
261{
262 ide_hwif_t *hwif = HWIF(drive);
263 u8 io_32bit = drive->io_32bit;
264
265 if (io_32bit) {
266 if (io_32bit & 2) {
267 unsigned long flags;
268 local_irq_save(flags);
269 ata_vlb_sync(drive, IDE_NSECTOR_REG);
270 hwif->OUTSL(IDE_DATA_REG, buffer, wcount);
271 local_irq_restore(flags);
272 } else
273 hwif->OUTSL(IDE_DATA_REG, buffer, wcount);
274 } else {
275 hwif->OUTSW(IDE_DATA_REG, buffer, wcount<<1);
276 }
277}
278
279/*
280 * The following routines are mainly used by the ATAPI drivers.
281 *
282 * These routines will round up any request for an odd number of bytes,
283 * so if an odd bytecount is specified, be sure that there's at least one
284 * extra byte allocated for the buffer.
285 */
286
287static void atapi_input_bytes(ide_drive_t *drive, void *buffer, u32 bytecount)
288{
289 ide_hwif_t *hwif = HWIF(drive);
290
291 ++bytecount;
292#if defined(CONFIG_ATARI) || defined(CONFIG_Q40)
293 if (MACH_IS_ATARI || MACH_IS_Q40) {
294 /* Atari has a byte-swapped IDE interface */
295 insw_swapw(IDE_DATA_REG, buffer, bytecount / 2);
296 return;
297 }
298#endif /* CONFIG_ATARI || CONFIG_Q40 */
299 hwif->ata_input_data(drive, buffer, bytecount / 4);
300 if ((bytecount & 0x03) >= 2)
301 hwif->INSW(IDE_DATA_REG, ((u8 *)buffer)+(bytecount & ~0x03), 1);
302}
303
304static void atapi_output_bytes(ide_drive_t *drive, void *buffer, u32 bytecount)
305{
306 ide_hwif_t *hwif = HWIF(drive);
307
308 ++bytecount;
309#if defined(CONFIG_ATARI) || defined(CONFIG_Q40)
310 if (MACH_IS_ATARI || MACH_IS_Q40) {
311 /* Atari has a byte-swapped IDE interface */
312 outsw_swapw(IDE_DATA_REG, buffer, bytecount / 2);
313 return;
314 }
315#endif /* CONFIG_ATARI || CONFIG_Q40 */
316 hwif->ata_output_data(drive, buffer, bytecount / 4);
317 if ((bytecount & 0x03) >= 2)
318 hwif->OUTSW(IDE_DATA_REG, ((u8*)buffer)+(bytecount & ~0x03), 1);
319}
320
321void default_hwif_transport(ide_hwif_t *hwif)
322{
323 hwif->ata_input_data = ata_input_data;
324 hwif->ata_output_data = ata_output_data;
325 hwif->atapi_input_bytes = atapi_input_bytes;
326 hwif->atapi_output_bytes = atapi_output_bytes;
327}
328
Linus Torvalds1da177e2005-04-16 15:20:36 -0700329/*
330 * Beginning of Taskfile OPCODE Library and feature sets.
331 */
332void ide_fix_driveid (struct hd_driveid *id)
333{
334#ifndef __LITTLE_ENDIAN
335# ifdef __BIG_ENDIAN
336 int i;
337 u16 *stringcast;
338
339 id->config = __le16_to_cpu(id->config);
340 id->cyls = __le16_to_cpu(id->cyls);
341 id->reserved2 = __le16_to_cpu(id->reserved2);
342 id->heads = __le16_to_cpu(id->heads);
343 id->track_bytes = __le16_to_cpu(id->track_bytes);
344 id->sector_bytes = __le16_to_cpu(id->sector_bytes);
345 id->sectors = __le16_to_cpu(id->sectors);
346 id->vendor0 = __le16_to_cpu(id->vendor0);
347 id->vendor1 = __le16_to_cpu(id->vendor1);
348 id->vendor2 = __le16_to_cpu(id->vendor2);
349 stringcast = (u16 *)&id->serial_no[0];
350 for (i = 0; i < (20/2); i++)
351 stringcast[i] = __le16_to_cpu(stringcast[i]);
352 id->buf_type = __le16_to_cpu(id->buf_type);
353 id->buf_size = __le16_to_cpu(id->buf_size);
354 id->ecc_bytes = __le16_to_cpu(id->ecc_bytes);
355 stringcast = (u16 *)&id->fw_rev[0];
356 for (i = 0; i < (8/2); i++)
357 stringcast[i] = __le16_to_cpu(stringcast[i]);
358 stringcast = (u16 *)&id->model[0];
359 for (i = 0; i < (40/2); i++)
360 stringcast[i] = __le16_to_cpu(stringcast[i]);
361 id->dword_io = __le16_to_cpu(id->dword_io);
362 id->reserved50 = __le16_to_cpu(id->reserved50);
363 id->field_valid = __le16_to_cpu(id->field_valid);
364 id->cur_cyls = __le16_to_cpu(id->cur_cyls);
365 id->cur_heads = __le16_to_cpu(id->cur_heads);
366 id->cur_sectors = __le16_to_cpu(id->cur_sectors);
367 id->cur_capacity0 = __le16_to_cpu(id->cur_capacity0);
368 id->cur_capacity1 = __le16_to_cpu(id->cur_capacity1);
369 id->lba_capacity = __le32_to_cpu(id->lba_capacity);
370 id->dma_1word = __le16_to_cpu(id->dma_1word);
371 id->dma_mword = __le16_to_cpu(id->dma_mword);
372 id->eide_pio_modes = __le16_to_cpu(id->eide_pio_modes);
373 id->eide_dma_min = __le16_to_cpu(id->eide_dma_min);
374 id->eide_dma_time = __le16_to_cpu(id->eide_dma_time);
375 id->eide_pio = __le16_to_cpu(id->eide_pio);
376 id->eide_pio_iordy = __le16_to_cpu(id->eide_pio_iordy);
377 for (i = 0; i < 2; ++i)
378 id->words69_70[i] = __le16_to_cpu(id->words69_70[i]);
379 for (i = 0; i < 4; ++i)
380 id->words71_74[i] = __le16_to_cpu(id->words71_74[i]);
381 id->queue_depth = __le16_to_cpu(id->queue_depth);
382 for (i = 0; i < 4; ++i)
383 id->words76_79[i] = __le16_to_cpu(id->words76_79[i]);
384 id->major_rev_num = __le16_to_cpu(id->major_rev_num);
385 id->minor_rev_num = __le16_to_cpu(id->minor_rev_num);
386 id->command_set_1 = __le16_to_cpu(id->command_set_1);
387 id->command_set_2 = __le16_to_cpu(id->command_set_2);
388 id->cfsse = __le16_to_cpu(id->cfsse);
389 id->cfs_enable_1 = __le16_to_cpu(id->cfs_enable_1);
390 id->cfs_enable_2 = __le16_to_cpu(id->cfs_enable_2);
391 id->csf_default = __le16_to_cpu(id->csf_default);
392 id->dma_ultra = __le16_to_cpu(id->dma_ultra);
393 id->trseuc = __le16_to_cpu(id->trseuc);
394 id->trsEuc = __le16_to_cpu(id->trsEuc);
395 id->CurAPMvalues = __le16_to_cpu(id->CurAPMvalues);
396 id->mprc = __le16_to_cpu(id->mprc);
397 id->hw_config = __le16_to_cpu(id->hw_config);
398 id->acoustic = __le16_to_cpu(id->acoustic);
399 id->msrqs = __le16_to_cpu(id->msrqs);
400 id->sxfert = __le16_to_cpu(id->sxfert);
401 id->sal = __le16_to_cpu(id->sal);
402 id->spg = __le32_to_cpu(id->spg);
403 id->lba_capacity_2 = __le64_to_cpu(id->lba_capacity_2);
404 for (i = 0; i < 22; i++)
405 id->words104_125[i] = __le16_to_cpu(id->words104_125[i]);
406 id->last_lun = __le16_to_cpu(id->last_lun);
407 id->word127 = __le16_to_cpu(id->word127);
408 id->dlf = __le16_to_cpu(id->dlf);
409 id->csfo = __le16_to_cpu(id->csfo);
410 for (i = 0; i < 26; i++)
411 id->words130_155[i] = __le16_to_cpu(id->words130_155[i]);
412 id->word156 = __le16_to_cpu(id->word156);
413 for (i = 0; i < 3; i++)
414 id->words157_159[i] = __le16_to_cpu(id->words157_159[i]);
415 id->cfa_power = __le16_to_cpu(id->cfa_power);
416 for (i = 0; i < 14; i++)
417 id->words161_175[i] = __le16_to_cpu(id->words161_175[i]);
418 for (i = 0; i < 31; i++)
419 id->words176_205[i] = __le16_to_cpu(id->words176_205[i]);
420 for (i = 0; i < 48; i++)
421 id->words206_254[i] = __le16_to_cpu(id->words206_254[i]);
422 id->integrity_word = __le16_to_cpu(id->integrity_word);
423# else
424# error "Please fix <asm/byteorder.h>"
425# endif
426#endif
427}
428
429/* FIXME: exported for use by the USB storage (isd200.c) code only */
430EXPORT_SYMBOL(ide_fix_driveid);
431
432void ide_fixstring (u8 *s, const int bytecount, const int byteswap)
433{
434 u8 *p = s, *end = &s[bytecount & ~1]; /* bytecount must be even */
435
436 if (byteswap) {
437 /* convert from big-endian to host byte order */
438 for (p = end ; p != s;) {
439 unsigned short *pp = (unsigned short *) (p -= 2);
440 *pp = ntohs(*pp);
441 }
442 }
443 /* strip leading blanks */
444 while (s != end && *s == ' ')
445 ++s;
446 /* compress internal blanks and strip trailing blanks */
447 while (s != end && *s) {
448 if (*s++ != ' ' || (s != end && *s && *s != ' '))
449 *p++ = *(s-1);
450 }
451 /* wipe out trailing garbage */
452 while (p != end)
453 *p++ = '\0';
454}
455
456EXPORT_SYMBOL(ide_fixstring);
457
458/*
459 * Needed for PCI irq sharing
460 */
461int drive_is_ready (ide_drive_t *drive)
462{
463 ide_hwif_t *hwif = HWIF(drive);
464 u8 stat = 0;
465
466 if (drive->waiting_for_dma)
467 return hwif->ide_dma_test_irq(drive);
468
469#if 0
470 /* need to guarantee 400ns since last command was issued */
471 udelay(1);
472#endif
473
474#ifdef CONFIG_IDEPCI_SHARE_IRQ
475 /*
476 * We do a passive status test under shared PCI interrupts on
477 * cards that truly share the ATA side interrupt, but may also share
478 * an interrupt with another pci card/device. We make no assumptions
479 * about possible isa-pnp and pci-pnp issues yet.
480 */
481 if (IDE_CONTROL_REG)
482 stat = hwif->INB(IDE_ALTSTATUS_REG);
483 else
484#endif /* CONFIG_IDEPCI_SHARE_IRQ */
485 /* Note: this may clear a pending IRQ!! */
486 stat = hwif->INB(IDE_STATUS_REG);
487
488 if (stat & BUSY_STAT)
489 /* drive busy: definitely not interrupting */
490 return 0;
491
492 /* drive ready: *might* be interrupting */
493 return 1;
494}
495
496EXPORT_SYMBOL(drive_is_ready);
497
498/*
499 * Global for All, and taken from ide-pmac.c. Can be called
500 * with spinlock held & IRQs disabled, so don't schedule !
501 */
502int wait_for_ready (ide_drive_t *drive, int timeout)
503{
504 ide_hwif_t *hwif = HWIF(drive);
505 u8 stat = 0;
506
507 while(--timeout) {
508 stat = hwif->INB(IDE_STATUS_REG);
509 if (!(stat & BUSY_STAT)) {
510 if (drive->ready_stat == 0)
511 break;
512 else if ((stat & drive->ready_stat)||(stat & ERR_STAT))
513 break;
514 }
515 mdelay(1);
516 }
517 if ((stat & ERR_STAT) || timeout <= 0) {
518 if (stat & ERR_STAT) {
519 printk(KERN_ERR "%s: wait_for_ready, "
520 "error status: %x\n", drive->name, stat);
521 }
522 return 1;
523 }
524 return 0;
525}
526
Linus Torvalds1da177e2005-04-16 15:20:36 -0700527/*
528 * This routine busy-waits for the drive status to be not "busy".
529 * It then checks the status for all of the "good" bits and none
530 * of the "bad" bits, and if all is okay it returns 0. All other
531 * cases return 1 after invoking ide_error() -- caller should just return.
532 *
533 * This routine should get fixed to not hog the cpu during extra long waits..
534 * That could be done by busy-waiting for the first jiffy or two, and then
535 * setting a timer to wake up at half second intervals thereafter,
536 * until timeout is achieved, before timing out.
537 */
538int ide_wait_stat (ide_startstop_t *startstop, ide_drive_t *drive, u8 good, u8 bad, unsigned long timeout)
539{
540 ide_hwif_t *hwif = HWIF(drive);
541 u8 stat;
542 int i;
543 unsigned long flags;
544
545 /* bail early if we've exceeded max_failures */
546 if (drive->max_failures && (drive->failures > drive->max_failures)) {
547 *startstop = ide_stopped;
548 return 1;
549 }
550
551 udelay(1); /* spec allows drive 400ns to assert "BUSY" */
552 if ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) {
553 local_irq_set(flags);
554 timeout += jiffies;
555 while ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) {
556 if (time_after(jiffies, timeout)) {
557 /*
558 * One last read after the timeout in case
559 * heavy interrupt load made us not make any
560 * progress during the timeout..
561 */
562 stat = hwif->INB(IDE_STATUS_REG);
563 if (!(stat & BUSY_STAT))
564 break;
565
566 local_irq_restore(flags);
567 *startstop = ide_error(drive, "status timeout", stat);
568 return 1;
569 }
570 }
571 local_irq_restore(flags);
572 }
573 /*
574 * Allow status to settle, then read it again.
575 * A few rare drives vastly violate the 400ns spec here,
576 * so we'll wait up to 10usec for a "good" status
577 * rather than expensively fail things immediately.
578 * This fix courtesy of Matthew Faupel & Niccolo Rigacci.
579 */
580 for (i = 0; i < 10; i++) {
581 udelay(1);
582 if (OK_STAT((stat = hwif->INB(IDE_STATUS_REG)), good, bad))
583 return 0;
584 }
585 *startstop = ide_error(drive, "status error", stat);
586 return 1;
587}
588
589EXPORT_SYMBOL(ide_wait_stat);
590
591/*
592 * All hosts that use the 80c ribbon must use!
593 * The name is derived from upper byte of word 93 and the 80c ribbon.
594 */
595u8 eighty_ninty_three (ide_drive_t *drive)
596{
Alan Coxd7d76342005-09-13 01:25:04 -0700597 if(HWIF(drive)->udma_four == 0)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700598 return 0;
Alan Cox1a1276e2006-06-28 04:26:58 -0700599
600 /* Check for SATA but only if we are ATA5 or higher */
601 if (drive->id->hw_config == 0 && (drive->id->major_rev_num & 0x7FE0))
602 return 1;
Alan Coxd7d76342005-09-13 01:25:04 -0700603 if (!(drive->id->hw_config & 0x6000))
604 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700605#ifndef CONFIG_IDEDMA_IVB
Alan Coxd7d76342005-09-13 01:25:04 -0700606 if(!(drive->id->hw_config & 0x4000))
607 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700608#endif /* CONFIG_IDEDMA_IVB */
Alan Coxd7d76342005-09-13 01:25:04 -0700609 return 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700610}
611
612EXPORT_SYMBOL(eighty_ninty_three);
613
614int ide_ata66_check (ide_drive_t *drive, ide_task_t *args)
615{
616 if ((args->tfRegister[IDE_COMMAND_OFFSET] == WIN_SETFEATURES) &&
617 (args->tfRegister[IDE_SECTOR_OFFSET] > XFER_UDMA_2) &&
618 (args->tfRegister[IDE_FEATURE_OFFSET] == SETFEATURES_XFER)) {
619#ifndef CONFIG_IDEDMA_IVB
620 if ((drive->id->hw_config & 0x6000) == 0) {
621#else /* !CONFIG_IDEDMA_IVB */
622 if (((drive->id->hw_config & 0x2000) == 0) ||
623 ((drive->id->hw_config & 0x4000) == 0)) {
624#endif /* CONFIG_IDEDMA_IVB */
625 printk("%s: Speed warnings UDMA 3/4/5 is not "
626 "functional.\n", drive->name);
627 return 1;
628 }
629 if (!HWIF(drive)->udma_four) {
630 printk("%s: Speed warnings UDMA 3/4/5 is not "
631 "functional.\n",
632 HWIF(drive)->name);
633 return 1;
634 }
635 }
636 return 0;
637}
638
639/*
640 * Backside of HDIO_DRIVE_CMD call of SETFEATURES_XFER.
641 * 1 : Safe to update drive->id DMA registers.
642 * 0 : OOPs not allowed.
643 */
644int set_transfer (ide_drive_t *drive, ide_task_t *args)
645{
646 if ((args->tfRegister[IDE_COMMAND_OFFSET] == WIN_SETFEATURES) &&
647 (args->tfRegister[IDE_SECTOR_OFFSET] >= XFER_SW_DMA_0) &&
648 (args->tfRegister[IDE_FEATURE_OFFSET] == SETFEATURES_XFER) &&
649 (drive->id->dma_ultra ||
650 drive->id->dma_mword ||
651 drive->id->dma_1word))
652 return 1;
653
654 return 0;
655}
656
657#ifdef CONFIG_BLK_DEV_IDEDMA
658static u8 ide_auto_reduce_xfer (ide_drive_t *drive)
659{
660 if (!drive->crc_count)
661 return drive->current_speed;
662 drive->crc_count = 0;
663
664 switch(drive->current_speed) {
665 case XFER_UDMA_7: return XFER_UDMA_6;
666 case XFER_UDMA_6: return XFER_UDMA_5;
667 case XFER_UDMA_5: return XFER_UDMA_4;
668 case XFER_UDMA_4: return XFER_UDMA_3;
669 case XFER_UDMA_3: return XFER_UDMA_2;
670 case XFER_UDMA_2: return XFER_UDMA_1;
671 case XFER_UDMA_1: return XFER_UDMA_0;
672 /*
673 * OOPS we do not goto non Ultra DMA modes
674 * without iCRC's available we force
675 * the system to PIO and make the user
676 * invoke the ATA-1 ATA-2 DMA modes.
677 */
678 case XFER_UDMA_0:
679 default: return XFER_PIO_4;
680 }
681}
682#endif /* CONFIG_BLK_DEV_IDEDMA */
683
684/*
685 * Update the
686 */
687int ide_driveid_update (ide_drive_t *drive)
688{
689 ide_hwif_t *hwif = HWIF(drive);
690 struct hd_driveid *id;
691#if 0
692 id = kmalloc(SECTOR_WORDS*4, GFP_ATOMIC);
693 if (!id)
694 return 0;
695
696 taskfile_lib_get_identify(drive, (char *)&id);
697
698 ide_fix_driveid(id);
699 if (id) {
700 drive->id->dma_ultra = id->dma_ultra;
701 drive->id->dma_mword = id->dma_mword;
702 drive->id->dma_1word = id->dma_1word;
703 /* anything more ? */
704 kfree(id);
705 }
706 return 1;
707#else
708 /*
709 * Re-read drive->id for possible DMA mode
710 * change (copied from ide-probe.c)
711 */
712 unsigned long timeout, flags;
713
714 SELECT_MASK(drive, 1);
715 if (IDE_CONTROL_REG)
716 hwif->OUTB(drive->ctl,IDE_CONTROL_REG);
717 msleep(50);
718 hwif->OUTB(WIN_IDENTIFY, IDE_COMMAND_REG);
719 timeout = jiffies + WAIT_WORSTCASE;
720 do {
721 if (time_after(jiffies, timeout)) {
722 SELECT_MASK(drive, 0);
723 return 0; /* drive timed-out */
724 }
725 msleep(50); /* give drive a breather */
726 } while (hwif->INB(IDE_ALTSTATUS_REG) & BUSY_STAT);
727 msleep(50); /* wait for IRQ and DRQ_STAT */
728 if (!OK_STAT(hwif->INB(IDE_STATUS_REG),DRQ_STAT,BAD_R_STAT)) {
729 SELECT_MASK(drive, 0);
730 printk("%s: CHECK for good STATUS\n", drive->name);
731 return 0;
732 }
733 local_irq_save(flags);
734 SELECT_MASK(drive, 0);
735 id = kmalloc(SECTOR_WORDS*4, GFP_ATOMIC);
736 if (!id) {
737 local_irq_restore(flags);
738 return 0;
739 }
740 ata_input_data(drive, id, SECTOR_WORDS);
741 (void) hwif->INB(IDE_STATUS_REG); /* clear drive IRQ */
742 local_irq_enable();
743 local_irq_restore(flags);
744 ide_fix_driveid(id);
745 if (id) {
746 drive->id->dma_ultra = id->dma_ultra;
747 drive->id->dma_mword = id->dma_mword;
748 drive->id->dma_1word = id->dma_1word;
749 /* anything more ? */
750 kfree(id);
751 }
752
753 return 1;
754#endif
755}
756
757/*
758 * Similar to ide_wait_stat(), except it never calls ide_error internally.
759 * This is a kludge to handle the new ide_config_drive_speed() function,
760 * and should not otherwise be used anywhere. Eventually, the tuneproc's
761 * should be updated to return ide_startstop_t, in which case we can get
762 * rid of this abomination again. :) -ml
763 *
764 * It is gone..........
765 *
766 * const char *msg == consider adding for verbose errors.
767 */
768int ide_config_drive_speed (ide_drive_t *drive, u8 speed)
769{
770 ide_hwif_t *hwif = HWIF(drive);
771 int i, error = 1;
772 u8 stat;
773
774// while (HWGROUP(drive)->busy)
775// msleep(50);
776
777#ifdef CONFIG_BLK_DEV_IDEDMA
778 if (hwif->ide_dma_check) /* check if host supports DMA */
779 hwif->ide_dma_host_off(drive);
780#endif
781
782 /*
783 * Don't use ide_wait_cmd here - it will
784 * attempt to set_geometry and recalibrate,
785 * but for some reason these don't work at
786 * this point (lost interrupt).
787 */
788 /*
789 * Select the drive, and issue the SETFEATURES command
790 */
791 disable_irq_nosync(hwif->irq);
792
793 /*
794 * FIXME: we race against the running IRQ here if
795 * this is called from non IRQ context. If we use
796 * disable_irq() we hang on the error path. Work
797 * is needed.
798 */
799
800 udelay(1);
801 SELECT_DRIVE(drive);
802 SELECT_MASK(drive, 0);
803 udelay(1);
804 if (IDE_CONTROL_REG)
805 hwif->OUTB(drive->ctl | 2, IDE_CONTROL_REG);
806 hwif->OUTB(speed, IDE_NSECTOR_REG);
807 hwif->OUTB(SETFEATURES_XFER, IDE_FEATURE_REG);
808 hwif->OUTB(WIN_SETFEATURES, IDE_COMMAND_REG);
809 if ((IDE_CONTROL_REG) && (drive->quirk_list == 2))
810 hwif->OUTB(drive->ctl, IDE_CONTROL_REG);
811 udelay(1);
812 /*
813 * Wait for drive to become non-BUSY
814 */
815 if ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) {
816 unsigned long flags, timeout;
817 local_irq_set(flags);
818 timeout = jiffies + WAIT_CMD;
819 while ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) {
820 if (time_after(jiffies, timeout))
821 break;
822 }
823 local_irq_restore(flags);
824 }
825
826 /*
827 * Allow status to settle, then read it again.
828 * A few rare drives vastly violate the 400ns spec here,
829 * so we'll wait up to 10usec for a "good" status
830 * rather than expensively fail things immediately.
831 * This fix courtesy of Matthew Faupel & Niccolo Rigacci.
832 */
833 for (i = 0; i < 10; i++) {
834 udelay(1);
835 if (OK_STAT((stat = hwif->INB(IDE_STATUS_REG)), DRIVE_READY, BUSY_STAT|DRQ_STAT|ERR_STAT)) {
836 error = 0;
837 break;
838 }
839 }
840
841 SELECT_MASK(drive, 0);
842
843 enable_irq(hwif->irq);
844
845 if (error) {
846 (void) ide_dump_status(drive, "set_drive_speed_status", stat);
847 return error;
848 }
849
850 drive->id->dma_ultra &= ~0xFF00;
851 drive->id->dma_mword &= ~0x0F00;
852 drive->id->dma_1word &= ~0x0F00;
853
854#ifdef CONFIG_BLK_DEV_IDEDMA
855 if (speed >= XFER_SW_DMA_0)
856 hwif->ide_dma_host_on(drive);
857 else if (hwif->ide_dma_check) /* check if host supports DMA */
858 hwif->ide_dma_off_quietly(drive);
859#endif
860
861 switch(speed) {
862 case XFER_UDMA_7: drive->id->dma_ultra |= 0x8080; break;
863 case XFER_UDMA_6: drive->id->dma_ultra |= 0x4040; break;
864 case XFER_UDMA_5: drive->id->dma_ultra |= 0x2020; break;
865 case XFER_UDMA_4: drive->id->dma_ultra |= 0x1010; break;
866 case XFER_UDMA_3: drive->id->dma_ultra |= 0x0808; break;
867 case XFER_UDMA_2: drive->id->dma_ultra |= 0x0404; break;
868 case XFER_UDMA_1: drive->id->dma_ultra |= 0x0202; break;
869 case XFER_UDMA_0: drive->id->dma_ultra |= 0x0101; break;
870 case XFER_MW_DMA_2: drive->id->dma_mword |= 0x0404; break;
871 case XFER_MW_DMA_1: drive->id->dma_mword |= 0x0202; break;
872 case XFER_MW_DMA_0: drive->id->dma_mword |= 0x0101; break;
873 case XFER_SW_DMA_2: drive->id->dma_1word |= 0x0404; break;
874 case XFER_SW_DMA_1: drive->id->dma_1word |= 0x0202; break;
875 case XFER_SW_DMA_0: drive->id->dma_1word |= 0x0101; break;
876 default: break;
877 }
878 if (!drive->init_speed)
879 drive->init_speed = speed;
880 drive->current_speed = speed;
881 return error;
882}
883
884EXPORT_SYMBOL(ide_config_drive_speed);
885
886
887/*
888 * This should get invoked any time we exit the driver to
889 * wait for an interrupt response from a drive. handler() points
890 * at the appropriate code to handle the next interrupt, and a
891 * timer is started to prevent us from waiting forever in case
892 * something goes wrong (see the ide_timer_expiry() handler later on).
893 *
894 * See also ide_execute_command
895 */
896static void __ide_set_handler (ide_drive_t *drive, ide_handler_t *handler,
897 unsigned int timeout, ide_expiry_t *expiry)
898{
899 ide_hwgroup_t *hwgroup = HWGROUP(drive);
900
901 if (hwgroup->handler != NULL) {
902 printk(KERN_CRIT "%s: ide_set_handler: handler not null; "
903 "old=%p, new=%p\n",
904 drive->name, hwgroup->handler, handler);
905 }
906 hwgroup->handler = handler;
907 hwgroup->expiry = expiry;
908 hwgroup->timer.expires = jiffies + timeout;
909 add_timer(&hwgroup->timer);
910}
911
912void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler,
913 unsigned int timeout, ide_expiry_t *expiry)
914{
915 unsigned long flags;
916 spin_lock_irqsave(&ide_lock, flags);
917 __ide_set_handler(drive, handler, timeout, expiry);
918 spin_unlock_irqrestore(&ide_lock, flags);
919}
920
921EXPORT_SYMBOL(ide_set_handler);
922
923/**
924 * ide_execute_command - execute an IDE command
925 * @drive: IDE drive to issue the command against
926 * @command: command byte to write
927 * @handler: handler for next phase
928 * @timeout: timeout for command
929 * @expiry: handler to run on timeout
930 *
931 * Helper function to issue an IDE command. This handles the
932 * atomicity requirements, command timing and ensures that the
933 * handler and IRQ setup do not race. All IDE command kick off
934 * should go via this function or do equivalent locking.
935 */
936
937void ide_execute_command(ide_drive_t *drive, task_ioreg_t cmd, ide_handler_t *handler, unsigned timeout, ide_expiry_t *expiry)
938{
939 unsigned long flags;
940 ide_hwgroup_t *hwgroup = HWGROUP(drive);
941 ide_hwif_t *hwif = HWIF(drive);
942
943 spin_lock_irqsave(&ide_lock, flags);
944
Eric Sesterhenn125e1872006-06-23 02:06:06 -0700945 BUG_ON(hwgroup->handler);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700946 hwgroup->handler = handler;
947 hwgroup->expiry = expiry;
948 hwgroup->timer.expires = jiffies + timeout;
949 add_timer(&hwgroup->timer);
950 hwif->OUTBSYNC(drive, cmd, IDE_COMMAND_REG);
951 /* Drive takes 400nS to respond, we must avoid the IRQ being
952 serviced before that.
953
954 FIXME: we could skip this delay with care on non shared
955 devices
956 */
957 ndelay(400);
958 spin_unlock_irqrestore(&ide_lock, flags);
959}
960
961EXPORT_SYMBOL(ide_execute_command);
962
963
964/* needed below */
965static ide_startstop_t do_reset1 (ide_drive_t *, int);
966
967/*
968 * atapi_reset_pollfunc() gets invoked to poll the interface for completion every 50ms
969 * during an atapi drive reset operation. If the drive has not yet responded,
970 * and we have not yet hit our maximum waiting time, then the timer is restarted
971 * for another 50ms.
972 */
973static ide_startstop_t atapi_reset_pollfunc (ide_drive_t *drive)
974{
975 ide_hwgroup_t *hwgroup = HWGROUP(drive);
976 ide_hwif_t *hwif = HWIF(drive);
977 u8 stat;
978
979 SELECT_DRIVE(drive);
980 udelay (10);
981
982 if (OK_STAT(stat = hwif->INB(IDE_STATUS_REG), 0, BUSY_STAT)) {
983 printk("%s: ATAPI reset complete\n", drive->name);
984 } else {
985 if (time_before(jiffies, hwgroup->poll_timeout)) {
Eric Sesterhenn125e1872006-06-23 02:06:06 -0700986 BUG_ON(HWGROUP(drive)->handler != NULL);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700987 ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL);
988 /* continue polling */
989 return ide_started;
990 }
991 /* end of polling */
992 hwgroup->polling = 0;
993 printk("%s: ATAPI reset timed-out, status=0x%02x\n",
994 drive->name, stat);
995 /* do it the old fashioned way */
996 return do_reset1(drive, 1);
997 }
998 /* done polling */
999 hwgroup->polling = 0;
1000 return ide_stopped;
1001}
1002
1003/*
1004 * reset_pollfunc() gets invoked to poll the interface for completion every 50ms
1005 * during an ide reset operation. If the drives have not yet responded,
1006 * and we have not yet hit our maximum waiting time, then the timer is restarted
1007 * for another 50ms.
1008 */
1009static ide_startstop_t reset_pollfunc (ide_drive_t *drive)
1010{
1011 ide_hwgroup_t *hwgroup = HWGROUP(drive);
1012 ide_hwif_t *hwif = HWIF(drive);
1013 u8 tmp;
1014
1015 if (hwif->reset_poll != NULL) {
1016 if (hwif->reset_poll(drive)) {
1017 printk(KERN_ERR "%s: host reset_poll failure for %s.\n",
1018 hwif->name, drive->name);
1019 return ide_stopped;
1020 }
1021 }
1022
1023 if (!OK_STAT(tmp = hwif->INB(IDE_STATUS_REG), 0, BUSY_STAT)) {
1024 if (time_before(jiffies, hwgroup->poll_timeout)) {
Eric Sesterhenn125e1872006-06-23 02:06:06 -07001025 BUG_ON(HWGROUP(drive)->handler != NULL);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001026 ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL);
1027 /* continue polling */
1028 return ide_started;
1029 }
1030 printk("%s: reset timed-out, status=0x%02x\n", hwif->name, tmp);
1031 drive->failures++;
1032 } else {
1033 printk("%s: reset: ", hwif->name);
1034 if ((tmp = hwif->INB(IDE_ERROR_REG)) == 1) {
1035 printk("success\n");
1036 drive->failures = 0;
1037 } else {
1038 drive->failures++;
1039 printk("master: ");
1040 switch (tmp & 0x7f) {
1041 case 1: printk("passed");
1042 break;
1043 case 2: printk("formatter device error");
1044 break;
1045 case 3: printk("sector buffer error");
1046 break;
1047 case 4: printk("ECC circuitry error");
1048 break;
1049 case 5: printk("controlling MPU error");
1050 break;
1051 default:printk("error (0x%02x?)", tmp);
1052 }
1053 if (tmp & 0x80)
1054 printk("; slave: failed");
1055 printk("\n");
1056 }
1057 }
1058 hwgroup->polling = 0; /* done polling */
1059 return ide_stopped;
1060}
1061
1062static void check_dma_crc(ide_drive_t *drive)
1063{
1064#ifdef CONFIG_BLK_DEV_IDEDMA
1065 if (drive->crc_count) {
1066 (void) HWIF(drive)->ide_dma_off_quietly(drive);
1067 ide_set_xfer_rate(drive, ide_auto_reduce_xfer(drive));
1068 if (drive->current_speed >= XFER_SW_DMA_0)
1069 (void) HWIF(drive)->ide_dma_on(drive);
1070 } else
1071 (void)__ide_dma_off(drive);
1072#endif
1073}
1074
1075static void ide_disk_pre_reset(ide_drive_t *drive)
1076{
1077 int legacy = (drive->id->cfs_enable_2 & 0x0400) ? 0 : 1;
1078
1079 drive->special.all = 0;
1080 drive->special.b.set_geometry = legacy;
1081 drive->special.b.recalibrate = legacy;
1082 if (OK_TO_RESET_CONTROLLER)
1083 drive->mult_count = 0;
1084 if (!drive->keep_settings && !drive->using_dma)
1085 drive->mult_req = 0;
1086 if (drive->mult_req != drive->mult_count)
1087 drive->special.b.set_multmode = 1;
1088}
1089
1090static void pre_reset(ide_drive_t *drive)
1091{
1092 if (drive->media == ide_disk)
1093 ide_disk_pre_reset(drive);
1094 else
1095 drive->post_reset = 1;
1096
1097 if (!drive->keep_settings) {
1098 if (drive->using_dma) {
1099 check_dma_crc(drive);
1100 } else {
1101 drive->unmask = 0;
1102 drive->io_32bit = 0;
1103 }
1104 return;
1105 }
1106 if (drive->using_dma)
1107 check_dma_crc(drive);
1108
1109 if (HWIF(drive)->pre_reset != NULL)
1110 HWIF(drive)->pre_reset(drive);
1111
1112}
1113
1114/*
1115 * do_reset1() attempts to recover a confused drive by resetting it.
1116 * Unfortunately, resetting a disk drive actually resets all devices on
1117 * the same interface, so it can really be thought of as resetting the
1118 * interface rather than resetting the drive.
1119 *
1120 * ATAPI devices have their own reset mechanism which allows them to be
1121 * individually reset without clobbering other devices on the same interface.
1122 *
1123 * Unfortunately, the IDE interface does not generate an interrupt to let
1124 * us know when the reset operation has finished, so we must poll for this.
1125 * Equally poor, though, is the fact that this may a very long time to complete,
1126 * (up to 30 seconds worstcase). So, instead of busy-waiting here for it,
1127 * we set a timer to poll at 50ms intervals.
1128 */
1129static ide_startstop_t do_reset1 (ide_drive_t *drive, int do_not_try_atapi)
1130{
1131 unsigned int unit;
1132 unsigned long flags;
1133 ide_hwif_t *hwif;
1134 ide_hwgroup_t *hwgroup;
1135
1136 spin_lock_irqsave(&ide_lock, flags);
1137 hwif = HWIF(drive);
1138 hwgroup = HWGROUP(drive);
1139
1140 /* We must not reset with running handlers */
Eric Sesterhenn125e1872006-06-23 02:06:06 -07001141 BUG_ON(hwgroup->handler != NULL);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001142
1143 /* For an ATAPI device, first try an ATAPI SRST. */
1144 if (drive->media != ide_disk && !do_not_try_atapi) {
1145 pre_reset(drive);
1146 SELECT_DRIVE(drive);
1147 udelay (20);
Alan Cox68ad9912005-06-27 15:24:25 -07001148 hwif->OUTBSYNC(drive, WIN_SRST, IDE_COMMAND_REG);
1149 ndelay(400);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001150 hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE;
1151 hwgroup->polling = 1;
1152 __ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL);
1153 spin_unlock_irqrestore(&ide_lock, flags);
1154 return ide_started;
1155 }
1156
1157 /*
1158 * First, reset any device state data we were maintaining
1159 * for any of the drives on this interface.
1160 */
1161 for (unit = 0; unit < MAX_DRIVES; ++unit)
1162 pre_reset(&hwif->drives[unit]);
1163
1164#if OK_TO_RESET_CONTROLLER
1165 if (!IDE_CONTROL_REG) {
1166 spin_unlock_irqrestore(&ide_lock, flags);
1167 return ide_stopped;
1168 }
1169
1170 /*
1171 * Note that we also set nIEN while resetting the device,
1172 * to mask unwanted interrupts from the interface during the reset.
1173 * However, due to the design of PC hardware, this will cause an
1174 * immediate interrupt due to the edge transition it produces.
1175 * This single interrupt gives us a "fast poll" for drives that
1176 * recover from reset very quickly, saving us the first 50ms wait time.
1177 */
1178 /* set SRST and nIEN */
1179 hwif->OUTBSYNC(drive, drive->ctl|6,IDE_CONTROL_REG);
1180 /* more than enough time */
1181 udelay(10);
1182 if (drive->quirk_list == 2) {
1183 /* clear SRST and nIEN */
1184 hwif->OUTBSYNC(drive, drive->ctl, IDE_CONTROL_REG);
1185 } else {
1186 /* clear SRST, leave nIEN */
1187 hwif->OUTBSYNC(drive, drive->ctl|2, IDE_CONTROL_REG);
1188 }
1189 /* more than enough time */
1190 udelay(10);
1191 hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE;
1192 hwgroup->polling = 1;
1193 __ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL);
1194
1195 /*
1196 * Some weird controller like resetting themselves to a strange
1197 * state when the disks are reset this way. At least, the Winbond
1198 * 553 documentation says that
1199 */
1200 if (hwif->resetproc != NULL) {
1201 hwif->resetproc(drive);
1202 }
1203
1204#endif /* OK_TO_RESET_CONTROLLER */
1205
1206 spin_unlock_irqrestore(&ide_lock, flags);
1207 return ide_started;
1208}
1209
1210/*
1211 * ide_do_reset() is the entry point to the drive/interface reset code.
1212 */
1213
1214ide_startstop_t ide_do_reset (ide_drive_t *drive)
1215{
1216 return do_reset1(drive, 0);
1217}
1218
1219EXPORT_SYMBOL(ide_do_reset);
1220
1221/*
1222 * ide_wait_not_busy() waits for the currently selected device on the hwif
1223 * to report a non-busy status, see comments in probe_hwif().
1224 */
1225int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout)
1226{
1227 u8 stat = 0;
1228
1229 while(timeout--) {
1230 /*
1231 * Turn this into a schedule() sleep once I'm sure
1232 * about locking issues (2.5 work ?).
1233 */
1234 mdelay(1);
1235 stat = hwif->INB(hwif->io_ports[IDE_STATUS_OFFSET]);
1236 if ((stat & BUSY_STAT) == 0)
1237 return 0;
1238 /*
1239 * Assume a value of 0xff means nothing is connected to
1240 * the interface and it doesn't implement the pull-down
1241 * resistor on D7.
1242 */
1243 if (stat == 0xff)
1244 return -ENODEV;
Ingo Molnar6842f8c2006-02-03 03:04:55 -08001245 touch_softlockup_watchdog();
Linus Torvalds1da177e2005-04-16 15:20:36 -07001246 }
1247 return -EBUSY;
1248}
1249
1250EXPORT_SYMBOL_GPL(ide_wait_not_busy);
1251