blob: 52e16c6436f9bac0733022622fa252d217b40369 [file] [log] [blame]
Jesper Nilsson538380d2008-01-25 16:15:44 +01001#include <linux/types.h>
Mikael Starvik51533b62005-07-27 11:44:44 -07002#include <asm/delay.h>
Jesper Nilsson538380d2008-01-25 16:15:44 +01003#include <irq.h>
4#include <hwregs/intr_vect.h>
5#include <hwregs/intr_vect_defs.h>
Mikael Starvik51533b62005-07-27 11:44:44 -07006#include <asm/tlbflush.h>
7#include <asm/mmu_context.h>
Jesper Nilsson538380d2008-01-25 16:15:44 +01008#include <hwregs/asm/mmu_defs_asm.h>
9#include <hwregs/supp_reg.h>
Mikael Starvik51533b62005-07-27 11:44:44 -070010#include <asm/atomic.h>
11
12#include <linux/err.h>
13#include <linux/init.h>
14#include <linux/timex.h>
15#include <linux/sched.h>
16#include <linux/kernel.h>
17#include <linux/cpumask.h>
18#include <linux/interrupt.h>
David S. Millerc8923c62005-10-13 14:41:23 -070019#include <linux/module.h>
Mikael Starvik51533b62005-07-27 11:44:44 -070020
21#define IPI_SCHEDULE 1
22#define IPI_CALL 2
23#define IPI_FLUSH_TLB 4
Jesper Nilsson538380d2008-01-25 16:15:44 +010024#define IPI_BOOT 8
Mikael Starvik51533b62005-07-27 11:44:44 -070025
26#define FLUSH_ALL (void*)0xffffffff
27
28/* Vector of locks used for various atomic operations */
29spinlock_t cris_atomic_locks[] = { [0 ... LOCK_COUNT - 1] = SPIN_LOCK_UNLOCKED};
30
31/* CPU masks */
32cpumask_t cpu_online_map = CPU_MASK_NONE;
Greg Bankse16b38f2006-10-02 02:17:40 -070033EXPORT_SYMBOL(cpu_online_map);
Mikael Starvik51533b62005-07-27 11:44:44 -070034cpumask_t phys_cpu_present_map = CPU_MASK_NONE;
Jesper Nilsson538380d2008-01-25 16:15:44 +010035cpumask_t cpu_possible_map;
36EXPORT_SYMBOL(cpu_possible_map);
David S. Millerc8923c62005-10-13 14:41:23 -070037EXPORT_SYMBOL(phys_cpu_present_map);
Mikael Starvik51533b62005-07-27 11:44:44 -070038
39/* Variables used during SMP boot */
40volatile int cpu_now_booting = 0;
41volatile struct thread_info *smp_init_current_idle_thread;
42
43/* Variables used during IPI */
44static DEFINE_SPINLOCK(call_lock);
45static DEFINE_SPINLOCK(tlbstate_lock);
46
47struct call_data_struct {
48 void (*func) (void *info);
49 void *info;
50 int wait;
51};
52
53static struct call_data_struct * call_data;
54
55static struct mm_struct* flush_mm;
56static struct vm_area_struct* flush_vma;
57static unsigned long flush_addr;
58
59extern int setup_irq(int, struct irqaction *);
60
61/* Mode registers */
Jesper Nilsson538380d2008-01-25 16:15:44 +010062static unsigned long irq_regs[NR_CPUS] = {
Mikael Starvik51533b62005-07-27 11:44:44 -070063 regi_irq,
64 regi_irq2
65};
66
Jesper Nilsson538380d2008-01-25 16:15:44 +010067static irqreturn_t crisv32_ipi_interrupt(int irq, void *dev_id);
Mikael Starvik51533b62005-07-27 11:44:44 -070068static int send_ipi(int vector, int wait, cpumask_t cpu_mask);
Thomas Gleixnere5f71782007-10-16 01:26:38 -070069static struct irqaction irq_ipi = {
70 .handler = crisv32_ipi_interrupt,
71 .flags = IRQF_DISABLED,
72 .mask = CPU_MASK_NONE,
73 .name = "ipi",
74};
Mikael Starvik51533b62005-07-27 11:44:44 -070075
76extern void cris_mmu_init(void);
77extern void cris_timer_init(void);
78
79/* SMP initialization */
80void __init smp_prepare_cpus(unsigned int max_cpus)
81{
82 int i;
83
84 /* From now on we can expect IPIs so set them up */
85 setup_irq(IPI_INTR_VECT, &irq_ipi);
86
87 /* Mark all possible CPUs as present */
88 for (i = 0; i < max_cpus; i++)
89 cpu_set(i, phys_cpu_present_map);
90}
91
92void __devinit smp_prepare_boot_cpu(void)
93{
94 /* PGD pointer has moved after per_cpu initialization so
95 * update the MMU.
96 */
97 pgd_t **pgd;
98 pgd = (pgd_t**)&per_cpu(current_pgd, smp_processor_id());
99
100 SUPP_BANK_SEL(1);
101 SUPP_REG_WR(RW_MM_TLB_PGD, pgd);
102 SUPP_BANK_SEL(2);
103 SUPP_REG_WR(RW_MM_TLB_PGD, pgd);
104
105 cpu_set(0, cpu_online_map);
106 cpu_set(0, phys_cpu_present_map);
Jesper Nilsson538380d2008-01-25 16:15:44 +0100107 cpu_set(0, cpu_possible_map);
Mikael Starvik51533b62005-07-27 11:44:44 -0700108}
109
110void __init smp_cpus_done(unsigned int max_cpus)
111{
112}
113
114/* Bring one cpu online.*/
115static int __init
116smp_boot_one_cpu(int cpuid)
117{
118 unsigned timeout;
119 struct task_struct *idle;
Jesper Nilsson538380d2008-01-25 16:15:44 +0100120 cpumask_t cpu_mask = CPU_MASK_NONE;
Mikael Starvik51533b62005-07-27 11:44:44 -0700121
122 idle = fork_idle(cpuid);
123 if (IS_ERR(idle))
124 panic("SMP: fork failed for CPU:%d", cpuid);
125
Al Viro718d6112006-01-12 01:06:04 -0800126 task_thread_info(idle)->cpu = cpuid;
Mikael Starvik51533b62005-07-27 11:44:44 -0700127
128 /* Information to the CPU that is about to boot */
Al Viro718d6112006-01-12 01:06:04 -0800129 smp_init_current_idle_thread = task_thread_info(idle);
Mikael Starvik51533b62005-07-27 11:44:44 -0700130 cpu_now_booting = cpuid;
131
Jesper Nilsson538380d2008-01-25 16:15:44 +0100132 /* Kick it */
133 cpu_set(cpuid, cpu_online_map);
134 cpu_set(cpuid, cpu_mask);
135 send_ipi(IPI_BOOT, 0, cpu_mask);
136 cpu_clear(cpuid, cpu_online_map);
137
Mikael Starvik51533b62005-07-27 11:44:44 -0700138 /* Wait for CPU to come online */
139 for (timeout = 0; timeout < 10000; timeout++) {
140 if(cpu_online(cpuid)) {
141 cpu_now_booting = 0;
142 smp_init_current_idle_thread = NULL;
143 return 0; /* CPU online */
144 }
145 udelay(100);
146 barrier();
147 }
148
149 put_task_struct(idle);
150 idle = NULL;
151
152 printk(KERN_CRIT "SMP: CPU:%d is stuck.\n", cpuid);
153 return -1;
154}
155
Simon Arlott49b4ff32007-10-20 01:08:50 +0200156/* Secondary CPUs starts using C here. Here we need to setup CPU
Mikael Starvik51533b62005-07-27 11:44:44 -0700157 * specific stuff such as the local timer and the MMU. */
158void __init smp_callin(void)
159{
160 extern void cpu_idle(void);
161
162 int cpu = cpu_now_booting;
163 reg_intr_vect_rw_mask vect_mask = {0};
164
165 /* Initialise the idle task for this CPU */
166 atomic_inc(&init_mm.mm_count);
167 current->active_mm = &init_mm;
168
169 /* Set up MMU */
170 cris_mmu_init();
171 __flush_tlb_all();
172
173 /* Setup local timer. */
174 cris_timer_init();
175
176 /* Enable IRQ and idle */
177 REG_WR(intr_vect, irq_regs[cpu], rw_mask, vect_mask);
178 unmask_irq(IPI_INTR_VECT);
Jesper Nilsson538380d2008-01-25 16:15:44 +0100179 unmask_irq(TIMER0_INTR_VECT);
Nick Piggin5bfb5d62005-11-08 21:39:01 -0800180 preempt_disable();
Manfred Spraule545a612008-09-07 16:57:22 +0200181 notify_cpu_starting(cpu);
Mikael Starvik51533b62005-07-27 11:44:44 -0700182 local_irq_enable();
183
184 cpu_set(cpu, cpu_online_map);
185 cpu_idle();
186}
187
188/* Stop execution on this CPU.*/
189void stop_this_cpu(void* dummy)
190{
191 local_irq_disable();
192 asm volatile("halt");
193}
194
195/* Other calls */
196void smp_send_stop(void)
197{
Jens Axboe8691e5a2008-06-06 11:18:06 +0200198 smp_call_function(stop_this_cpu, NULL, 0);
Mikael Starvik51533b62005-07-27 11:44:44 -0700199}
200
201int setup_profiling_timer(unsigned int multiplier)
202{
203 return -EINVAL;
204}
205
206
207/* cache_decay_ticks is used by the scheduler to decide if a process
208 * is "hot" on one CPU. A higher value means a higher penalty to move
209 * a process to another CPU. Our cache is rather small so we report
210 * 1 tick.
211 */
212unsigned long cache_decay_ticks = 1;
213
Gautham R Shenoyb282b6f2007-01-10 23:15:34 -0800214int __cpuinit __cpu_up(unsigned int cpu)
Mikael Starvik51533b62005-07-27 11:44:44 -0700215{
216 smp_boot_one_cpu(cpu);
217 return cpu_online(cpu) ? 0 : -ENOSYS;
218}
219
220void smp_send_reschedule(int cpu)
221{
222 cpumask_t cpu_mask = CPU_MASK_NONE;
223 cpu_set(cpu, cpu_mask);
224 send_ipi(IPI_SCHEDULE, 0, cpu_mask);
225}
226
227/* TLB flushing
228 *
229 * Flush needs to be done on the local CPU and on any other CPU that
230 * may have the same mapping. The mm->cpu_vm_mask is used to keep track
231 * of which CPUs that a specific process has been executed on.
232 */
233void flush_tlb_common(struct mm_struct* mm, struct vm_area_struct* vma, unsigned long addr)
234{
235 unsigned long flags;
236 cpumask_t cpu_mask;
237
238 spin_lock_irqsave(&tlbstate_lock, flags);
239 cpu_mask = (mm == FLUSH_ALL ? CPU_MASK_ALL : mm->cpu_vm_mask);
240 cpu_clear(smp_processor_id(), cpu_mask);
241 flush_mm = mm;
242 flush_vma = vma;
243 flush_addr = addr;
244 send_ipi(IPI_FLUSH_TLB, 1, cpu_mask);
245 spin_unlock_irqrestore(&tlbstate_lock, flags);
246}
247
248void flush_tlb_all(void)
249{
250 __flush_tlb_all();
251 flush_tlb_common(FLUSH_ALL, FLUSH_ALL, 0);
252}
253
254void flush_tlb_mm(struct mm_struct *mm)
255{
256 __flush_tlb_mm(mm);
257 flush_tlb_common(mm, FLUSH_ALL, 0);
258 /* No more mappings in other CPUs */
259 cpus_clear(mm->cpu_vm_mask);
260 cpu_set(smp_processor_id(), mm->cpu_vm_mask);
261}
262
263void flush_tlb_page(struct vm_area_struct *vma,
264 unsigned long addr)
265{
266 __flush_tlb_page(vma, addr);
267 flush_tlb_common(vma->vm_mm, vma, addr);
268}
269
270/* Inter processor interrupts
271 *
272 * The IPIs are used for:
273 * * Force a schedule on a CPU
274 * * FLush TLB on other CPUs
275 * * Call a function on other CPUs
276 */
277
278int send_ipi(int vector, int wait, cpumask_t cpu_mask)
279{
280 int i = 0;
281 reg_intr_vect_rw_ipi ipi = REG_RD(intr_vect, irq_regs[i], rw_ipi);
282 int ret = 0;
283
284 /* Calculate CPUs to send to. */
285 cpus_and(cpu_mask, cpu_mask, cpu_online_map);
286
287 /* Send the IPI. */
288 for_each_cpu_mask(i, cpu_mask)
289 {
290 ipi.vector |= vector;
291 REG_WR(intr_vect, irq_regs[i], rw_ipi, ipi);
292 }
293
294 /* Wait for IPI to finish on other CPUS */
295 if (wait) {
296 for_each_cpu_mask(i, cpu_mask) {
297 int j;
298 for (j = 0 ; j < 1000; j++) {
299 ipi = REG_RD(intr_vect, irq_regs[i], rw_ipi);
300 if (!ipi.vector)
301 break;
302 udelay(100);
303 }
304
305 /* Timeout? */
306 if (ipi.vector) {
307 printk("SMP call timeout from %d to %d\n", smp_processor_id(), i);
308 ret = -ETIMEDOUT;
309 dump_stack();
310 }
311 }
312 }
313 return ret;
314}
315
316/*
317 * You must not call this function with disabled interrupts or from a
318 * hardware interrupt handler or from a bottom half handler.
319 */
Jens Axboe8691e5a2008-06-06 11:18:06 +0200320int smp_call_function(void (*func)(void *info), void *info, int wait)
Mikael Starvik51533b62005-07-27 11:44:44 -0700321{
322 cpumask_t cpu_mask = CPU_MASK_ALL;
323 struct call_data_struct data;
324 int ret;
325
326 cpu_clear(smp_processor_id(), cpu_mask);
327
328 WARN_ON(irqs_disabled());
329
330 data.func = func;
331 data.info = info;
332 data.wait = wait;
333
334 spin_lock(&call_lock);
335 call_data = &data;
336 ret = send_ipi(IPI_CALL, wait, cpu_mask);
337 spin_unlock(&call_lock);
338
339 return ret;
340}
341
Jesper Nilsson538380d2008-01-25 16:15:44 +0100342irqreturn_t crisv32_ipi_interrupt(int irq, void *dev_id)
Mikael Starvik51533b62005-07-27 11:44:44 -0700343{
344 void (*func) (void *info) = call_data->func;
345 void *info = call_data->info;
346 reg_intr_vect_rw_ipi ipi;
347
348 ipi = REG_RD(intr_vect, irq_regs[smp_processor_id()], rw_ipi);
349
350 if (ipi.vector & IPI_CALL) {
351 func(info);
352 }
353 if (ipi.vector & IPI_FLUSH_TLB) {
354 if (flush_mm == FLUSH_ALL)
355 __flush_tlb_all();
356 else if (flush_vma == FLUSH_ALL)
357 __flush_tlb_mm(flush_mm);
358 else
359 __flush_tlb_page(flush_vma, flush_addr);
360 }
361
362 ipi.vector = 0;
363 REG_WR(intr_vect, irq_regs[smp_processor_id()], rw_ipi, ipi);
364
365 return IRQ_HANDLED;
366}
367