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LeafOS / LeafOS-Devices / android_kernel_realme_mt6785 / cf39c8e5352b4fb9efedfe7e9acb566a85ed847c / . / drivers / pinctrl / sh-pfc / pfc-sh7203.c
blob: bf3d8f28768d2ce56f0069c802c8478106e293e7 [file] [log] [blame]
Laurent Pinchartccda5522012-12-15 23:51:29 +0100[diff] [blame]1/*
2 * SH7203 Pinmux
3 *
4 * Copyright (C) 2008 Magnus Damm
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/kernel.h>
12#include <linux/gpio.h>
Laurent Pinchartccda5522012-12-15 23:51:29 +0100[diff] [blame]13#include <cpu/sh7203.h>
14
Laurent Pinchartc3323802012-12-15 23:51:55 +0100[diff] [blame]15#include "sh_pfc.h"
16
Laurent Pinchartccda5522012-12-15 23:51:29 +0100[diff] [blame]17enum {
18 PINMUX_RESERVED = 0,
19
20 PINMUX_DATA_BEGIN,
21 PA7_DATA, PA6_DATA, PA5_DATA, PA4_DATA,
22 PA3_DATA, PA2_DATA, PA1_DATA, PA0_DATA,
23 PB12_DATA,
24 PB11_DATA, PB10_DATA, PB9_DATA, PB8_DATA,
25 PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA,
26 PB3_DATA, PB2_DATA, PB1_DATA, PB0_DATA,
27 PC14_DATA, PC13_DATA, PC12_DATA,
28 PC11_DATA, PC10_DATA, PC9_DATA, PC8_DATA,
29 PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA,
30 PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA,
31 PD15_DATA, PD14_DATA, PD13_DATA, PD12_DATA,
32 PD11_DATA, PD10_DATA, PD9_DATA, PD8_DATA,
33 PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA,
34 PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA,
35 PE15_DATA, PE14_DATA, PE13_DATA, PE12_DATA,
36 PE11_DATA, PE10_DATA, PE9_DATA, PE8_DATA,
37 PE7_DATA, PE6_DATA, PE5_DATA, PE4_DATA,
38 PE3_DATA, PE2_DATA, PE1_DATA, PE0_DATA,
39 PF30_DATA, PF29_DATA, PF28_DATA,
40 PF27_DATA, PF26_DATA, PF25_DATA, PF24_DATA,
41 PF23_DATA, PF22_DATA, PF21_DATA, PF20_DATA,
42 PF19_DATA, PF18_DATA, PF17_DATA, PF16_DATA,
43 PF15_DATA, PF14_DATA, PF13_DATA, PF12_DATA,
44 PF11_DATA, PF10_DATA, PF9_DATA, PF8_DATA,
45 PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA,
46 PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA,
47 PINMUX_DATA_END,
48
49 PINMUX_INPUT_BEGIN,
50 FORCE_IN,
51 PA7_IN, PA6_IN, PA5_IN, PA4_IN,
52 PA3_IN, PA2_IN, PA1_IN, PA0_IN,
53 PB11_IN, PB10_IN, PB9_IN, PB8_IN,
54 PC14_IN, PC13_IN, PC12_IN,
55 PC11_IN, PC10_IN, PC9_IN, PC8_IN,
56 PC7_IN, PC6_IN, PC5_IN, PC4_IN,
57 PC3_IN, PC2_IN, PC1_IN, PC0_IN,
58 PD15_IN, PD14_IN, PD13_IN, PD12_IN,
59 PD11_IN, PD10_IN, PD9_IN, PD8_IN,
60 PD7_IN, PD6_IN, PD5_IN, PD4_IN,
61 PD3_IN, PD2_IN, PD1_IN, PD0_IN,
62 PE15_IN, PE14_IN, PE13_IN, PE12_IN,
63 PE11_IN, PE10_IN, PE9_IN, PE8_IN,
64 PE7_IN, PE6_IN, PE5_IN, PE4_IN,
65 PE3_IN, PE2_IN, PE1_IN, PE0_IN,
66 PF30_IN, PF29_IN, PF28_IN,
67 PF27_IN, PF26_IN, PF25_IN, PF24_IN,
68 PF23_IN, PF22_IN, PF21_IN, PF20_IN,
69 PF19_IN, PF18_IN, PF17_IN, PF16_IN,
70 PF15_IN, PF14_IN, PF13_IN, PF12_IN,
71 PF11_IN, PF10_IN, PF9_IN, PF8_IN,
72 PF7_IN, PF6_IN, PF5_IN, PF4_IN,
73 PF3_IN, PF2_IN, PF1_IN, PF0_IN,
74 PINMUX_INPUT_END,
75
76 PINMUX_OUTPUT_BEGIN,
77 FORCE_OUT,
78 PB11_OUT, PB10_OUT, PB9_OUT, PB8_OUT,
79 PC14_OUT, PC13_OUT, PC12_OUT,
80 PC11_OUT, PC10_OUT, PC9_OUT, PC8_OUT,
81 PC7_OUT, PC6_OUT, PC5_OUT, PC4_OUT,
82 PC3_OUT, PC2_OUT, PC1_OUT, PC0_OUT,
83 PD15_OUT, PD14_OUT, PD13_OUT, PD12_OUT,
84 PD11_OUT, PD10_OUT, PD9_OUT, PD8_OUT,
85 PD7_OUT, PD6_OUT, PD5_OUT, PD4_OUT,
86 PD3_OUT, PD2_OUT, PD1_OUT, PD0_OUT,
87 PE15_OUT, PE14_OUT, PE13_OUT, PE12_OUT,
88 PE11_OUT, PE10_OUT, PE9_OUT, PE8_OUT,
89 PE7_OUT, PE6_OUT, PE5_OUT, PE4_OUT,
90 PE3_OUT, PE2_OUT, PE1_OUT, PE0_OUT,
91 PF30_OUT, PF29_OUT, PF28_OUT,
92 PF27_OUT, PF26_OUT, PF25_OUT, PF24_OUT,
93 PF23_OUT, PF22_OUT, PF21_OUT, PF20_OUT,
94 PF19_OUT, PF18_OUT, PF17_OUT, PF16_OUT,
95 PF15_OUT, PF14_OUT, PF13_OUT, PF12_OUT,
96 PF11_OUT, PF10_OUT, PF9_OUT, PF8_OUT,
97 PF7_OUT, PF6_OUT, PF5_OUT, PF4_OUT,
98 PF3_OUT, PF2_OUT, PF1_OUT, PF0_OUT,
99 PINMUX_OUTPUT_END,
100
101 PINMUX_FUNCTION_BEGIN,
102 PB11_IOR_IN, PB11_IOR_OUT,
103 PB10_IOR_IN, PB10_IOR_OUT,
104 PB9_IOR_IN, PB9_IOR_OUT,
105 PB8_IOR_IN, PB8_IOR_OUT,
106 PB12MD_00, PB12MD_01, PB12MD_10, PB12MD_11,
107 PB11MD_0, PB11MD_1,
108 PB10MD_0, PB10MD_1,
109 PB9MD_00, PB9MD_01, PB9MD_10,
110 PB8MD_00, PB8MD_01, PB8MD_10,
111 PB7MD_00, PB7MD_01, PB7MD_10, PB7MD_11,
112 PB6MD_00, PB6MD_01, PB6MD_10, PB6MD_11,
113 PB5MD_00, PB5MD_01, PB5MD_10, PB5MD_11,
114 PB4MD_00, PB4MD_01, PB4MD_10, PB4MD_11,
115 PB3MD_00, PB3MD_01, PB3MD_10, PB3MD_11,
116 PB2MD_00, PB2MD_01, PB2MD_10, PB2MD_11,
117 PB1MD_00, PB1MD_01, PB1MD_10, PB1MD_11,
118 PB0MD_00, PB0MD_01, PB0MD_10, PB0MD_11,
119
120 PB12IRQ_00, PB12IRQ_01, PB12IRQ_10,
121
122 PC14MD_0, PC14MD_1,
123 PC13MD_0, PC13MD_1,
124 PC12MD_0, PC12MD_1,
125 PC11MD_00, PC11MD_01, PC11MD_10,
126 PC10MD_00, PC10MD_01, PC10MD_10,
127 PC9MD_0, PC9MD_1,
128 PC8MD_0, PC8MD_1,
129 PC7MD_0, PC7MD_1,
130 PC6MD_0, PC6MD_1,
131 PC5MD_0, PC5MD_1,
132 PC4MD_0, PC4MD_1,
133 PC3MD_0, PC3MD_1,
134 PC2MD_0, PC2MD_1,
135 PC1MD_0, PC1MD_1,
136 PC0MD_00, PC0MD_01, PC0MD_10,
137
138 PD15MD_000, PD15MD_001, PD15MD_010, PD15MD_100, PD15MD_101,
139 PD14MD_000, PD14MD_001, PD14MD_010, PD14MD_101,
140 PD13MD_000, PD13MD_001, PD13MD_010, PD13MD_100, PD13MD_101,
141 PD12MD_000, PD12MD_001, PD12MD_010, PD12MD_100, PD12MD_101,
142 PD11MD_000, PD11MD_001, PD11MD_010, PD11MD_100, PD11MD_101,
143 PD10MD_000, PD10MD_001, PD10MD_010, PD10MD_100, PD10MD_101,
144 PD9MD_000, PD9MD_001, PD9MD_010, PD9MD_100, PD9MD_101,
145 PD8MD_000, PD8MD_001, PD8MD_010, PD8MD_100, PD8MD_101,
146 PD7MD_000, PD7MD_001, PD7MD_010, PD7MD_011, PD7MD_100, PD7MD_101,
147 PD6MD_000, PD6MD_001, PD6MD_010, PD6MD_011, PD6MD_100, PD6MD_101,
148 PD5MD_000, PD5MD_001, PD5MD_010, PD5MD_011, PD5MD_100, PD5MD_101,
149 PD4MD_000, PD4MD_001, PD4MD_010, PD4MD_011, PD4MD_100, PD4MD_101,
150 PD3MD_000, PD3MD_001, PD3MD_010, PD3MD_011, PD3MD_100, PD3MD_101,
151 PD2MD_000, PD2MD_001, PD2MD_010, PD2MD_011, PD2MD_100, PD2MD_101,
152 PD1MD_000, PD1MD_001, PD1MD_010, PD1MD_011, PD1MD_100, PD1MD_101,
153 PD0MD_000, PD0MD_001, PD0MD_010, PD0MD_011, PD0MD_100, PD0MD_101,
154
155 PE15MD_00, PE15MD_01, PE15MD_11,
156 PE14MD_00, PE14MD_01, PE14MD_11,
157 PE13MD_00, PE13MD_11,
158 PE12MD_00, PE12MD_11,
159 PE11MD_000, PE11MD_001, PE11MD_010, PE11MD_100,
160 PE10MD_000, PE10MD_001, PE10MD_010, PE10MD_100,
161 PE9MD_00, PE9MD_01, PE9MD_10, PE9MD_11,
162 PE8MD_00, PE8MD_01, PE8MD_10, PE8MD_11,
163 PE7MD_000, PE7MD_001, PE7MD_010, PE7MD_011, PE7MD_100,
164 PE6MD_000, PE6MD_001, PE6MD_010, PE6MD_011, PE6MD_100,
165 PE5MD_000, PE5MD_001, PE5MD_010, PE5MD_011, PE5MD_100,
166 PE4MD_000, PE4MD_001, PE4MD_010, PE4MD_011, PE4MD_100,
167 PE3MD_00, PE3MD_01, PE3MD_11,
168 PE2MD_00, PE2MD_01, PE2MD_11,
169 PE1MD_00, PE1MD_01, PE1MD_10, PE1MD_11,
170 PE0MD_000, PE0MD_001, PE0MD_011, PE0MD_100,
171
172 PF30MD_0, PF30MD_1,
173 PF29MD_0, PF29MD_1,
174 PF28MD_0, PF28MD_1,
175 PF27MD_0, PF27MD_1,
176 PF26MD_0, PF26MD_1,
177 PF25MD_0, PF25MD_1,
178 PF24MD_0, PF24MD_1,
179 PF23MD_00, PF23MD_01, PF23MD_10,
180 PF22MD_00, PF22MD_01, PF22MD_10,
181 PF21MD_00, PF21MD_01, PF21MD_10,
182 PF20MD_00, PF20MD_01, PF20MD_10,
183 PF19MD_00, PF19MD_01, PF19MD_10,
184 PF18MD_00, PF18MD_01, PF18MD_10,
185 PF17MD_00, PF17MD_01, PF17MD_10,
186 PF16MD_00, PF16MD_01, PF16MD_10,
187 PF15MD_00, PF15MD_01, PF15MD_10,
188 PF14MD_00, PF14MD_01, PF14MD_10,
189 PF13MD_00, PF13MD_01, PF13MD_10,
190 PF12MD_00, PF12MD_01, PF12MD_10,
191 PF11MD_00, PF11MD_01, PF11MD_10,
192 PF10MD_00, PF10MD_01, PF10MD_10,
193 PF9MD_00, PF9MD_01, PF9MD_10,
194 PF8MD_00, PF8MD_01, PF8MD_10,
195 PF7MD_00, PF7MD_01, PF7MD_10, PF7MD_11,
196 PF6MD_00, PF6MD_01, PF6MD_10, PF6MD_11,
197 PF5MD_00, PF5MD_01, PF5MD_10, PF5MD_11,
198 PF4MD_00, PF4MD_01, PF4MD_10, PF4MD_11,
199 PF3MD_00, PF3MD_01, PF3MD_10, PF3MD_11,
200 PF2MD_00, PF2MD_01, PF2MD_10, PF2MD_11,
201 PF1MD_00, PF1MD_01, PF1MD_10, PF1MD_11,
202 PF0MD_00, PF0MD_01, PF0MD_10, PF0MD_11,
203 PINMUX_FUNCTION_END,
204
205 PINMUX_MARK_BEGIN,
206 PINT7_PB_MARK, PINT6_PB_MARK, PINT5_PB_MARK, PINT4_PB_MARK,
207 PINT3_PB_MARK, PINT2_PB_MARK, PINT1_PB_MARK, PINT0_PB_MARK,
208 PINT7_PD_MARK, PINT6_PD_MARK, PINT5_PD_MARK, PINT4_PD_MARK,
209 PINT3_PD_MARK, PINT2_PD_MARK, PINT1_PD_MARK, PINT0_PD_MARK,
210 IRQ7_PB_MARK, IRQ6_PB_MARK, IRQ5_PB_MARK, IRQ4_PB_MARK,
211 IRQ3_PB_MARK, IRQ2_PB_MARK, IRQ1_PB_MARK, IRQ0_PB_MARK,
212 IRQ7_PD_MARK, IRQ6_PD_MARK, IRQ5_PD_MARK, IRQ4_PD_MARK,
213 IRQ3_PD_MARK, IRQ2_PD_MARK, IRQ1_PD_MARK, IRQ0_PD_MARK,
214 IRQ7_PE_MARK, IRQ6_PE_MARK, IRQ5_PE_MARK, IRQ4_PE_MARK,
215 IRQ3_PE_MARK, IRQ2_PE_MARK, IRQ1_PE_MARK, IRQ0_PE_MARK,
216 WDTOVF_MARK, IRQOUT_MARK, REFOUT_MARK, IRQOUT_REFOUT_MARK,
217 UBCTRG_MARK,
218 CTX1_MARK, CRX1_MARK, CTX0_MARK, CTX0_CTX1_MARK,
219 CRX0_MARK, CRX0_CRX1_MARK,
220 SDA3_MARK, SCL3_MARK,
221 SDA2_MARK, SCL2_MARK,
222 SDA1_MARK, SCL1_MARK,
223 SDA0_MARK, SCL0_MARK,
224 TEND0_PD_MARK, TEND0_PE_MARK, DACK0_PD_MARK, DACK0_PE_MARK,
225 DREQ0_PD_MARK, DREQ0_PE_MARK, TEND1_PD_MARK, TEND1_PE_MARK,
226 DACK1_PD_MARK, DACK1_PE_MARK, DREQ1_PD_MARK, DREQ1_PE_MARK,
227 DACK2_MARK, DREQ2_MARK, DACK3_MARK, DREQ3_MARK,
228 ADTRG_PD_MARK, ADTRG_PE_MARK,
229 D31_MARK, D30_MARK, D29_MARK, D28_MARK,
230 D27_MARK, D26_MARK, D25_MARK, D24_MARK,
231 D23_MARK, D22_MARK, D21_MARK, D20_MARK,
232 D19_MARK, D18_MARK, D17_MARK, D16_MARK,
233 A25_MARK, A24_MARK, A23_MARK, A22_MARK,
234 A21_MARK, CS4_MARK, MRES_MARK, BS_MARK,
235 IOIS16_MARK, CS1_MARK, CS6_CE1B_MARK, CE2B_MARK,
236 CS5_CE1A_MARK, CE2A_MARK, FRAME_MARK, WAIT_MARK,
237 RDWR_MARK, CKE_MARK, CASU_MARK, BREQ_MARK,
238 RASU_MARK, BACK_MARK, CASL_MARK, RASL_MARK,
239 WE3_DQMUU_AH_ICIO_WR_MARK, WE2_DQMUL_ICIORD_MARK,
240 WE1_DQMLU_WE_MARK, WE0_DQMLL_MARK,
241 CS3_MARK, CS2_MARK, A1_MARK, A0_MARK, CS7_MARK,
242 TIOC4D_MARK, TIOC4C_MARK, TIOC4B_MARK, TIOC4A_MARK,
243 TIOC3D_MARK, TIOC3C_MARK, TIOC3B_MARK, TIOC3A_MARK,
244 TIOC2B_MARK, TIOC1B_MARK, TIOC2A_MARK, TIOC1A_MARK,
245 TIOC0D_MARK, TIOC0C_MARK, TIOC0B_MARK, TIOC0A_MARK,
246 TCLKD_PD_MARK, TCLKC_PD_MARK, TCLKB_PD_MARK, TCLKA_PD_MARK,
247 TCLKD_PF_MARK, TCLKC_PF_MARK, TCLKB_PF_MARK, TCLKA_PF_MARK,
248 SCS0_PD_MARK, SSO0_PD_MARK, SSI0_PD_MARK, SSCK0_PD_MARK,
249 SCS0_PF_MARK, SSO0_PF_MARK, SSI0_PF_MARK, SSCK0_PF_MARK,
250 SCS1_PD_MARK, SSO1_PD_MARK, SSI1_PD_MARK, SSCK1_PD_MARK,
251 SCS1_PF_MARK, SSO1_PF_MARK, SSI1_PF_MARK, SSCK1_PF_MARK,
252 TXD0_MARK, RXD0_MARK, SCK0_MARK,
253 TXD1_MARK, RXD1_MARK, SCK1_MARK,
254 TXD2_MARK, RXD2_MARK, SCK2_MARK,
255 RTS3_MARK, CTS3_MARK, TXD3_MARK,
256 RXD3_MARK, SCK3_MARK,
257 AUDIO_CLK_MARK,
258 SSIDATA3_MARK, SSIWS3_MARK, SSISCK3_MARK,
259 SSIDATA2_MARK, SSIWS2_MARK, SSISCK2_MARK,
260 SSIDATA1_MARK, SSIWS1_MARK, SSISCK1_MARK,
261 SSIDATA0_MARK, SSIWS0_MARK, SSISCK0_MARK,
262 FCE_MARK, FRB_MARK,
263 NAF7_MARK, NAF6_MARK, NAF5_MARK, NAF4_MARK,
264 NAF3_MARK, NAF2_MARK, NAF1_MARK, NAF0_MARK,
265 FSC_MARK, FOE_MARK, FCDE_MARK, FWE_MARK,
266 LCD_VEPWC_MARK, LCD_VCPWC_MARK, LCD_CLK_MARK, LCD_FLM_MARK,
267 LCD_M_DISP_MARK, LCD_CL2_MARK, LCD_CL1_MARK, LCD_DON_MARK,
268 LCD_DATA15_MARK, LCD_DATA14_MARK, LCD_DATA13_MARK, LCD_DATA12_MARK,
269 LCD_DATA11_MARK, LCD_DATA10_MARK, LCD_DATA9_MARK, LCD_DATA8_MARK,
270 LCD_DATA7_MARK, LCD_DATA6_MARK, LCD_DATA5_MARK, LCD_DATA4_MARK,
271 LCD_DATA3_MARK, LCD_DATA2_MARK, LCD_DATA1_MARK, LCD_DATA0_MARK,
272 PINMUX_MARK_END,
273};
274
Laurent Pinchart533743d2013-07-15 13:03:20 +0200[diff] [blame]275static const u16 pinmux_data[] = {
Laurent Pinchartccda5522012-12-15 23:51:29 +0100[diff] [blame]276 /* PA */
277 PINMUX_DATA(PA7_DATA, PA7_IN),
278 PINMUX_DATA(PA6_DATA, PA6_IN),
279 PINMUX_DATA(PA5_DATA, PA5_IN),
280 PINMUX_DATA(PA4_DATA, PA4_IN),
281 PINMUX_DATA(PA3_DATA, PA3_IN),
282 PINMUX_DATA(PA2_DATA, PA2_IN),
283 PINMUX_DATA(PA1_DATA, PA1_IN),
284 PINMUX_DATA(PA0_DATA, PA0_IN),
285
286 /* PB */
287 PINMUX_DATA(PB12_DATA, PB12MD_00, FORCE_OUT),
288 PINMUX_DATA(WDTOVF_MARK, PB12MD_01),
289 PINMUX_DATA(IRQOUT_MARK, PB12MD_10, PB12IRQ_00),
290 PINMUX_DATA(REFOUT_MARK, PB12MD_10, PB12IRQ_01),
291 PINMUX_DATA(IRQOUT_REFOUT_MARK, PB12MD_10, PB12IRQ_10),
292 PINMUX_DATA(UBCTRG_MARK, PB12MD_11),
293
294 PINMUX_DATA(PB11_DATA, PB11MD_0, PB11_IN, PB11_OUT),
295 PINMUX_DATA(CTX1_MARK, PB11MD_1),
296
297 PINMUX_DATA(PB10_DATA, PB10MD_0, PB10_IN, PB10_OUT),
298 PINMUX_DATA(CRX1_MARK, PB10MD_1),
299
300 PINMUX_DATA(PB9_DATA, PB9MD_00, PB9_IN, PB9_OUT),
301 PINMUX_DATA(CTX0_MARK, PB9MD_01),
302 PINMUX_DATA(CTX0_CTX1_MARK, PB9MD_10),
303
304 PINMUX_DATA(PB8_DATA, PB8MD_00, PB8_IN, PB8_OUT),
305 PINMUX_DATA(CRX0_MARK, PB8MD_01),
306 PINMUX_DATA(CRX0_CRX1_MARK, PB8MD_10),
307
308 PINMUX_DATA(PB7_DATA, PB7MD_00, FORCE_IN),
309 PINMUX_DATA(SDA3_MARK, PB7MD_01),
310 PINMUX_DATA(PINT7_PB_MARK, PB7MD_10),
311 PINMUX_DATA(IRQ7_PB_MARK, PB7MD_11),
312
313 PINMUX_DATA(PB6_DATA, PB6MD_00, FORCE_IN),
314 PINMUX_DATA(SCL3_MARK, PB6MD_01),
315 PINMUX_DATA(PINT6_PB_MARK, PB6MD_10),
316 PINMUX_DATA(IRQ6_PB_MARK, PB6MD_11),
317
318 PINMUX_DATA(PB5_DATA, PB5MD_00, FORCE_IN),
319 PINMUX_DATA(SDA2_MARK, PB6MD_01),
320 PINMUX_DATA(PINT5_PB_MARK, PB6MD_10),
321 PINMUX_DATA(IRQ5_PB_MARK, PB6MD_11),
322
323 PINMUX_DATA(PB4_DATA, PB4MD_00, FORCE_IN),
324 PINMUX_DATA(SCL2_MARK, PB4MD_01),
325 PINMUX_DATA(PINT4_PB_MARK, PB4MD_10),
326 PINMUX_DATA(IRQ4_PB_MARK, PB4MD_11),
327
328 PINMUX_DATA(PB3_DATA, PB3MD_00, FORCE_IN),
329 PINMUX_DATA(SDA1_MARK, PB3MD_01),
330 PINMUX_DATA(PINT3_PB_MARK, PB3MD_10),
331 PINMUX_DATA(IRQ3_PB_MARK, PB3MD_11),
332
333 PINMUX_DATA(PB2_DATA, PB2MD_00, FORCE_IN),
334 PINMUX_DATA(SCL1_MARK, PB2MD_01),
335 PINMUX_DATA(PINT2_PB_MARK, PB2MD_10),
336 PINMUX_DATA(IRQ2_PB_MARK, PB2MD_11),
337
338 PINMUX_DATA(PB1_DATA, PB1MD_00, FORCE_IN),
339 PINMUX_DATA(SDA0_MARK, PB1MD_01),
340 PINMUX_DATA(PINT1_PB_MARK, PB1MD_10),
341 PINMUX_DATA(IRQ1_PB_MARK, PB1MD_11),
342
343 PINMUX_DATA(PB0_DATA, PB0MD_00, FORCE_IN),
344 PINMUX_DATA(SCL0_MARK, PB0MD_01),
345 PINMUX_DATA(PINT0_PB_MARK, PB0MD_10),
346 PINMUX_DATA(IRQ0_PB_MARK, PB0MD_11),
347
348 /* PC */
349 PINMUX_DATA(PC14_DATA, PC14MD_0, PC14_IN, PC14_OUT),
350 PINMUX_DATA(WAIT_MARK, PC14MD_1),
351
352 PINMUX_DATA(PC13_DATA, PC13MD_0, PC13_IN, PC13_OUT),
353 PINMUX_DATA(RDWR_MARK, PC13MD_1),
354
355 PINMUX_DATA(PC12_DATA, PC12MD_0, PC12_IN, PC12_OUT),
356 PINMUX_DATA(CKE_MARK, PC12MD_1),
357
358 PINMUX_DATA(PC11_DATA, PC11MD_00, PC11_IN, PC11_OUT),
359 PINMUX_DATA(CASU_MARK, PC11MD_01),
360 PINMUX_DATA(BREQ_MARK, PC11MD_10),
361
362 PINMUX_DATA(PC10_DATA, PC10MD_00, PC10_IN, PC10_OUT),
363 PINMUX_DATA(RASU_MARK, PC10MD_01),
364 PINMUX_DATA(BACK_MARK, PC10MD_10),
365
366 PINMUX_DATA(PC9_DATA, PC9MD_0, PC9_IN, PC9_OUT),
367 PINMUX_DATA(CASL_MARK, PC9MD_1),
368
369 PINMUX_DATA(PC8_DATA, PC8MD_0, PC8_IN, PC8_OUT),
370 PINMUX_DATA(RASL_MARK, PC8MD_1),
371
372 PINMUX_DATA(PC7_DATA, PC7MD_0, PC7_IN, PC7_OUT),
373 PINMUX_DATA(WE3_DQMUU_AH_ICIO_WR_MARK, PC7MD_1),
374
375 PINMUX_DATA(PC6_DATA, PC6MD_0, PC6_IN, PC6_OUT),
376 PINMUX_DATA(WE2_DQMUL_ICIORD_MARK, PC6MD_1),
377
378 PINMUX_DATA(PC5_DATA, PC5MD_0, PC5_IN, PC5_OUT),
379 PINMUX_DATA(WE1_DQMLU_WE_MARK, PC5MD_1),
380
381 PINMUX_DATA(PC4_DATA, PC4MD_0, PC4_IN, PC4_OUT),
382 PINMUX_DATA(WE0_DQMLL_MARK, PC4MD_1),
383
384 PINMUX_DATA(PC3_DATA, PC3MD_0, PC3_IN, PC3_OUT),
385 PINMUX_DATA(CS3_MARK, PC3MD_1),
386
387 PINMUX_DATA(PC2_DATA, PC2MD_0, PC2_IN, PC2_OUT),
388 PINMUX_DATA(CS2_MARK, PC2MD_1),
389
390 PINMUX_DATA(PC1_DATA, PC1MD_0, PC1_IN, PC1_OUT),
391 PINMUX_DATA(A1_MARK, PC1MD_1),
392
393 PINMUX_DATA(PC0_DATA, PC0MD_00, PC0_IN, PC0_OUT),
394 PINMUX_DATA(A0_MARK, PC0MD_01),
395 PINMUX_DATA(CS7_MARK, PC0MD_10),
396
397 /* PD */
398 PINMUX_DATA(PD15_DATA, PD15MD_000, PD15_IN, PD15_OUT),
399 PINMUX_DATA(D31_MARK, PD15MD_001),
400 PINMUX_DATA(PINT7_PD_MARK, PD15MD_010),
401 PINMUX_DATA(ADTRG_PD_MARK, PD15MD_100),
402 PINMUX_DATA(TIOC4D_MARK, PD15MD_101),
403
404 PINMUX_DATA(PD14_DATA, PD14MD_000, PD14_IN, PD14_OUT),
405 PINMUX_DATA(D30_MARK, PD14MD_001),
406 PINMUX_DATA(PINT6_PD_MARK, PD14MD_010),
407 PINMUX_DATA(TIOC4C_MARK, PD14MD_101),
408
409 PINMUX_DATA(PD13_DATA, PD13MD_000, PD13_IN, PD13_OUT),
410 PINMUX_DATA(D29_MARK, PD13MD_001),
411 PINMUX_DATA(PINT5_PD_MARK, PD13MD_010),
412 PINMUX_DATA(TEND1_PD_MARK, PD13MD_100),
413 PINMUX_DATA(TIOC4B_MARK, PD13MD_101),
414
415 PINMUX_DATA(PD12_DATA, PD12MD_000, PD12_IN, PD12_OUT),
416 PINMUX_DATA(D28_MARK, PD12MD_001),
417 PINMUX_DATA(PINT4_PD_MARK, PD12MD_010),
418 PINMUX_DATA(DACK1_PD_MARK, PD12MD_100),
419 PINMUX_DATA(TIOC4A_MARK, PD12MD_101),
420
421 PINMUX_DATA(PD11_DATA, PD11MD_000, PD11_IN, PD11_OUT),
422 PINMUX_DATA(D27_MARK, PD11MD_001),
423 PINMUX_DATA(PINT3_PD_MARK, PD11MD_010),
424 PINMUX_DATA(DREQ1_PD_MARK, PD11MD_100),
425 PINMUX_DATA(TIOC3D_MARK, PD11MD_101),
426
427 PINMUX_DATA(PD10_DATA, PD10MD_000, PD10_IN, PD10_OUT),
428 PINMUX_DATA(D26_MARK, PD10MD_001),
429 PINMUX_DATA(PINT2_PD_MARK, PD10MD_010),
430 PINMUX_DATA(TEND0_PD_MARK, PD10MD_100),
431 PINMUX_DATA(TIOC3C_MARK, PD10MD_101),
432
433 PINMUX_DATA(PD9_DATA, PD9MD_000, PD9_IN, PD9_OUT),
434 PINMUX_DATA(D25_MARK, PD9MD_001),
435 PINMUX_DATA(PINT1_PD_MARK, PD9MD_010),
436 PINMUX_DATA(DACK0_PD_MARK, PD9MD_100),
437 PINMUX_DATA(TIOC3B_MARK, PD9MD_101),
438
439 PINMUX_DATA(PD8_DATA, PD8MD_000, PD8_IN, PD8_OUT),
440 PINMUX_DATA(D24_MARK, PD8MD_001),
441 PINMUX_DATA(PINT0_PD_MARK, PD8MD_010),
442 PINMUX_DATA(DREQ0_PD_MARK, PD8MD_100),
443 PINMUX_DATA(TIOC3A_MARK, PD8MD_101),
444
445 PINMUX_DATA(PD7_DATA, PD7MD_000, PD7_IN, PD7_OUT),
446 PINMUX_DATA(D23_MARK, PD7MD_001),
447 PINMUX_DATA(IRQ7_PD_MARK, PD7MD_010),
448 PINMUX_DATA(SCS1_PD_MARK, PD7MD_011),
449 PINMUX_DATA(TCLKD_PD_MARK, PD7MD_100),
450 PINMUX_DATA(TIOC2B_MARK, PD7MD_101),
451
452 PINMUX_DATA(PD6_DATA, PD6MD_000, PD6_IN, PD6_OUT),
453 PINMUX_DATA(D22_MARK, PD6MD_001),
454 PINMUX_DATA(IRQ6_PD_MARK, PD6MD_010),
455 PINMUX_DATA(SSO1_PD_MARK, PD6MD_011),
456 PINMUX_DATA(TCLKC_PD_MARK, PD6MD_100),
457 PINMUX_DATA(TIOC2A_MARK, PD6MD_101),
458
459 PINMUX_DATA(PD5_DATA, PD5MD_000, PD5_IN, PD5_OUT),
460 PINMUX_DATA(D21_MARK, PD5MD_001),
461 PINMUX_DATA(IRQ5_PD_MARK, PD5MD_010),
462 PINMUX_DATA(SSI1_PD_MARK, PD5MD_011),
463 PINMUX_DATA(TCLKB_PD_MARK, PD5MD_100),
464 PINMUX_DATA(TIOC1B_MARK, PD5MD_101),
465
466 PINMUX_DATA(PD4_DATA, PD4MD_000, PD4_IN, PD4_OUT),
467 PINMUX_DATA(D20_MARK, PD4MD_001),
468 PINMUX_DATA(IRQ4_PD_MARK, PD4MD_010),
469 PINMUX_DATA(SSCK1_PD_MARK, PD4MD_011),
470 PINMUX_DATA(TCLKA_PD_MARK, PD4MD_100),
471 PINMUX_DATA(TIOC1A_MARK, PD4MD_101),
472
473 PINMUX_DATA(PD3_DATA, PD3MD_000, PD3_IN, PD3_OUT),
474 PINMUX_DATA(D19_MARK, PD3MD_001),
475 PINMUX_DATA(IRQ3_PD_MARK, PD3MD_010),
476 PINMUX_DATA(SCS0_PD_MARK, PD3MD_011),
477 PINMUX_DATA(DACK3_MARK, PD3MD_100),
478 PINMUX_DATA(TIOC0D_MARK, PD3MD_101),
479
480 PINMUX_DATA(PD2_DATA, PD2MD_000, PD2_IN, PD2_OUT),
481 PINMUX_DATA(D18_MARK, PD2MD_001),
482 PINMUX_DATA(IRQ2_PD_MARK, PD2MD_010),
483 PINMUX_DATA(SSO0_PD_MARK, PD2MD_011),
484 PINMUX_DATA(DREQ3_MARK, PD2MD_100),
485 PINMUX_DATA(TIOC0C_MARK, PD2MD_101),
486
487 PINMUX_DATA(PD1_DATA, PD1MD_000, PD1_IN, PD1_OUT),
488 PINMUX_DATA(D17_MARK, PD1MD_001),
489 PINMUX_DATA(IRQ1_PD_MARK, PD1MD_010),
490 PINMUX_DATA(SSI0_PD_MARK, PD1MD_011),
491 PINMUX_DATA(DACK2_MARK, PD1MD_100),
492 PINMUX_DATA(TIOC0B_MARK, PD1MD_101),
493
494 PINMUX_DATA(PD0_DATA, PD0MD_000, PD0_IN, PD0_OUT),
495 PINMUX_DATA(D16_MARK, PD0MD_001),
496 PINMUX_DATA(IRQ0_PD_MARK, PD0MD_010),
497 PINMUX_DATA(SSCK0_PD_MARK, PD0MD_011),
498 PINMUX_DATA(DREQ2_MARK, PD0MD_100),
499 PINMUX_DATA(TIOC0A_MARK, PD0MD_101),
500
501 /* PE */
502 PINMUX_DATA(PE15_DATA, PE15MD_00, PE15_IN, PE15_OUT),
503 PINMUX_DATA(IOIS16_MARK, PE15MD_01),
504 PINMUX_DATA(RTS3_MARK, PE15MD_11),
505
506 PINMUX_DATA(PE14_DATA, PE14MD_00, PE14_IN, PE14_OUT),
507 PINMUX_DATA(CS1_MARK, PE14MD_01),
508 PINMUX_DATA(CTS3_MARK, PE14MD_11),
509
510 PINMUX_DATA(PE13_DATA, PE13MD_00, PE13_IN, PE13_OUT),
511 PINMUX_DATA(TXD3_MARK, PE13MD_11),
512
513 PINMUX_DATA(PE12_DATA, PE12MD_00, PE12_IN, PE12_OUT),
514 PINMUX_DATA(RXD3_MARK, PE12MD_11),
515
516 PINMUX_DATA(PE11_DATA, PE11MD_000, PE11_IN, PE11_OUT),
517 PINMUX_DATA(CS6_CE1B_MARK, PE11MD_001),
518 PINMUX_DATA(IRQ7_PE_MARK, PE11MD_010),
519 PINMUX_DATA(TEND1_PE_MARK, PE11MD_100),
520
521 PINMUX_DATA(PE10_DATA, PE10MD_000, PE10_IN, PE10_OUT),
522 PINMUX_DATA(CE2B_MARK, PE10MD_001),
523 PINMUX_DATA(IRQ6_PE_MARK, PE10MD_010),
524 PINMUX_DATA(TEND0_PE_MARK, PE10MD_100),
525
526 PINMUX_DATA(PE9_DATA, PE9MD_00, PE9_IN, PE9_OUT),
527 PINMUX_DATA(CS5_CE1A_MARK, PE9MD_01),
528 PINMUX_DATA(IRQ5_PE_MARK, PE9MD_10),
529 PINMUX_DATA(SCK3_MARK, PE9MD_11),
530
531 PINMUX_DATA(PE8_DATA, PE8MD_00, PE8_IN, PE8_OUT),
532 PINMUX_DATA(CE2A_MARK, PE8MD_01),
533 PINMUX_DATA(IRQ4_PE_MARK, PE8MD_10),
534 PINMUX_DATA(SCK2_MARK, PE8MD_11),
535
536 PINMUX_DATA(PE7_DATA, PE7MD_000, PE7_IN, PE7_OUT),
537 PINMUX_DATA(FRAME_MARK, PE7MD_001),
538 PINMUX_DATA(IRQ3_PE_MARK, PE7MD_010),
539 PINMUX_DATA(TXD2_MARK, PE7MD_011),
540 PINMUX_DATA(DACK1_PE_MARK, PE7MD_100),
541
542 PINMUX_DATA(PE6_DATA, PE6MD_000, PE6_IN, PE6_OUT),
543 PINMUX_DATA(A25_MARK, PE6MD_001),
544 PINMUX_DATA(IRQ2_PE_MARK, PE6MD_010),
545 PINMUX_DATA(RXD2_MARK, PE6MD_011),
546 PINMUX_DATA(DREQ1_PE_MARK, PE6MD_100),
547
548 PINMUX_DATA(PE5_DATA, PE5MD_000, PE5_IN, PE5_OUT),
549 PINMUX_DATA(A24_MARK, PE5MD_001),
550 PINMUX_DATA(IRQ1_PE_MARK, PE5MD_010),
551 PINMUX_DATA(TXD1_MARK, PE5MD_011),
552 PINMUX_DATA(DACK0_PE_MARK, PE5MD_100),
553
554 PINMUX_DATA(PE4_DATA, PE4MD_000, PE4_IN, PE4_OUT),
555 PINMUX_DATA(A23_MARK, PE4MD_001),
556 PINMUX_DATA(IRQ0_PE_MARK, PE4MD_010),
557 PINMUX_DATA(RXD1_MARK, PE4MD_011),
558 PINMUX_DATA(DREQ0_PE_MARK, PE4MD_100),
559
560 PINMUX_DATA(PE3_DATA, PE3MD_00, PE3_IN, PE3_OUT),
561 PINMUX_DATA(A22_MARK, PE3MD_01),
562 PINMUX_DATA(SCK1_MARK, PE3MD_11),
563
564 PINMUX_DATA(PE2_DATA, PE2MD_00, PE2_IN, PE2_OUT),
565 PINMUX_DATA(A21_MARK, PE2MD_01),
566 PINMUX_DATA(SCK0_MARK, PE2MD_11),
567
568 PINMUX_DATA(PE1_DATA, PE1MD_00, PE1_IN, PE1_OUT),
569 PINMUX_DATA(CS4_MARK, PE1MD_01),
570 PINMUX_DATA(MRES_MARK, PE1MD_10),
571 PINMUX_DATA(TXD0_MARK, PE1MD_11),
572
573 PINMUX_DATA(PE0_DATA, PE0MD_000, PE0_IN, PE0_OUT),
574 PINMUX_DATA(BS_MARK, PE0MD_001),
575 PINMUX_DATA(RXD0_MARK, PE0MD_011),
576 PINMUX_DATA(ADTRG_PE_MARK, PE0MD_100),
577
578 /* PF */
579 PINMUX_DATA(PF30_DATA, PF30MD_0, PF30_IN, PF30_OUT),
580 PINMUX_DATA(AUDIO_CLK_MARK, PF30MD_1),
581
582 PINMUX_DATA(PF29_DATA, PF29MD_0, PF29_IN, PF29_OUT),
583 PINMUX_DATA(SSIDATA3_MARK, PF29MD_1),
584
585 PINMUX_DATA(PF28_DATA, PF28MD_0, PF28_IN, PF28_OUT),
586 PINMUX_DATA(SSIWS3_MARK, PF28MD_1),
587
588 PINMUX_DATA(PF27_DATA, PF27MD_0, PF27_IN, PF27_OUT),
589 PINMUX_DATA(SSISCK3_MARK, PF27MD_1),
590
591 PINMUX_DATA(PF26_DATA, PF26MD_0, PF26_IN, PF26_OUT),
592 PINMUX_DATA(SSIDATA2_MARK, PF26MD_1),
593
594 PINMUX_DATA(PF25_DATA, PF25MD_0, PF25_IN, PF25_OUT),
595 PINMUX_DATA(SSIWS2_MARK, PF25MD_1),
596
597 PINMUX_DATA(PF24_DATA, PF24MD_0, PF24_IN, PF24_OUT),
598 PINMUX_DATA(SSISCK2_MARK, PF24MD_1),
599
600 PINMUX_DATA(PF23_DATA, PF23MD_00, PF23_IN, PF23_OUT),
601 PINMUX_DATA(SSIDATA1_MARK, PF23MD_01),
602 PINMUX_DATA(LCD_VEPWC_MARK, PF23MD_10),
603
604 PINMUX_DATA(PF22_DATA, PF22MD_00, PF22_IN, PF22_OUT),
605 PINMUX_DATA(SSIWS1_MARK, PF22MD_01),
606 PINMUX_DATA(LCD_VCPWC_MARK, PF22MD_10),
607
608 PINMUX_DATA(PF21_DATA, PF21MD_00, PF21_IN, PF21_OUT),
609 PINMUX_DATA(SSISCK1_MARK, PF21MD_01),
610 PINMUX_DATA(LCD_CLK_MARK, PF21MD_10),
611
612 PINMUX_DATA(PF20_DATA, PF20MD_00, PF20_IN, PF20_OUT),
613 PINMUX_DATA(SSIDATA0_MARK, PF20MD_01),
614 PINMUX_DATA(LCD_FLM_MARK, PF20MD_10),
615
616 PINMUX_DATA(PF19_DATA, PF19MD_00, PF19_IN, PF19_OUT),
617 PINMUX_DATA(SSIWS0_MARK, PF19MD_01),
618 PINMUX_DATA(LCD_M_DISP_MARK, PF19MD_10),
619
620 PINMUX_DATA(PF18_DATA, PF18MD_00, PF18_IN, PF18_OUT),
621 PINMUX_DATA(SSISCK0_MARK, PF18MD_01),
622 PINMUX_DATA(LCD_CL2_MARK, PF18MD_10),
623
624 PINMUX_DATA(PF17_DATA, PF17MD_00, PF17_IN, PF17_OUT),
625 PINMUX_DATA(FCE_MARK, PF17MD_01),
626 PINMUX_DATA(LCD_CL1_MARK, PF17MD_10),
627
628 PINMUX_DATA(PF16_DATA, PF16MD_00, PF16_IN, PF16_OUT),
629 PINMUX_DATA(FRB_MARK, PF16MD_01),
630 PINMUX_DATA(LCD_DON_MARK, PF16MD_10),
631
632 PINMUX_DATA(PF15_DATA, PF15MD_00, PF15_IN, PF15_OUT),
633 PINMUX_DATA(NAF7_MARK, PF15MD_01),
634 PINMUX_DATA(LCD_DATA15_MARK, PF15MD_10),
635
636 PINMUX_DATA(PF14_DATA, PF14MD_00, PF14_IN, PF14_OUT),
637 PINMUX_DATA(NAF6_MARK, PF14MD_01),
638 PINMUX_DATA(LCD_DATA14_MARK, PF14MD_10),
639
640 PINMUX_DATA(PF13_DATA, PF13MD_00, PF13_IN, PF13_OUT),
641 PINMUX_DATA(NAF5_MARK, PF13MD_01),
642 PINMUX_DATA(LCD_DATA13_MARK, PF13MD_10),
643
644 PINMUX_DATA(PF12_DATA, PF12MD_00, PF12_IN, PF12_OUT),
645 PINMUX_DATA(NAF4_MARK, PF12MD_01),
646 PINMUX_DATA(LCD_DATA12_MARK, PF12MD_10),
647
648 PINMUX_DATA(PF11_DATA, PF11MD_00, PF11_IN, PF11_OUT),
649 PINMUX_DATA(NAF3_MARK, PF11MD_01),
650 PINMUX_DATA(LCD_DATA11_MARK, PF11MD_10),
651
652 PINMUX_DATA(PF10_DATA, PF10MD_00, PF10_IN, PF10_OUT),
653 PINMUX_DATA(NAF2_MARK, PF10MD_01),
654 PINMUX_DATA(LCD_DATA10_MARK, PF10MD_10),
655
656 PINMUX_DATA(PF9_DATA, PF9MD_00, PF9_IN, PF9_OUT),
657 PINMUX_DATA(NAF1_MARK, PF9MD_01),
658 PINMUX_DATA(LCD_DATA9_MARK, PF9MD_10),
659
660 PINMUX_DATA(PF8_DATA, PF8MD_00, PF8_IN, PF8_OUT),
661 PINMUX_DATA(NAF0_MARK, PF8MD_01),
662 PINMUX_DATA(LCD_DATA8_MARK, PF8MD_10),
663
664 PINMUX_DATA(PF7_DATA, PF7MD_00, PF7_IN, PF7_OUT),
665 PINMUX_DATA(FSC_MARK, PF7MD_01),
666 PINMUX_DATA(LCD_DATA7_MARK, PF7MD_10),
667 PINMUX_DATA(SCS1_PF_MARK, PF7MD_11),
668
669 PINMUX_DATA(PF6_DATA, PF6MD_00, PF6_IN, PF6_OUT),
670 PINMUX_DATA(FOE_MARK, PF6MD_01),
671 PINMUX_DATA(LCD_DATA6_MARK, PF6MD_10),
672 PINMUX_DATA(SSO1_PF_MARK, PF6MD_11),
673
674 PINMUX_DATA(PF5_DATA, PF5MD_00, PF5_IN, PF5_OUT),
675 PINMUX_DATA(FCDE_MARK, PF5MD_01),
676 PINMUX_DATA(LCD_DATA5_MARK, PF5MD_10),
677 PINMUX_DATA(SSI1_PF_MARK, PF5MD_11),
678
679 PINMUX_DATA(PF4_DATA, PF4MD_00, PF4_IN, PF4_OUT),
680 PINMUX_DATA(FWE_MARK, PF4MD_01),
681 PINMUX_DATA(LCD_DATA4_MARK, PF4MD_10),
682 PINMUX_DATA(SSCK1_PF_MARK, PF4MD_11),
683
684 PINMUX_DATA(PF3_DATA, PF3MD_00, PF3_IN, PF3_OUT),
685 PINMUX_DATA(TCLKD_PF_MARK, PF3MD_01),
686 PINMUX_DATA(LCD_DATA3_MARK, PF3MD_10),
687 PINMUX_DATA(SCS0_PF_MARK, PF3MD_11),
688
689 PINMUX_DATA(PF2_DATA, PF2MD_00, PF2_IN, PF2_OUT),
690 PINMUX_DATA(TCLKC_PF_MARK, PF2MD_01),
691 PINMUX_DATA(LCD_DATA2_MARK, PF2MD_10),
692 PINMUX_DATA(SSO0_PF_MARK, PF2MD_11),
693
694 PINMUX_DATA(PF1_DATA, PF1MD_00, PF1_IN, PF1_OUT),
695 PINMUX_DATA(TCLKB_PF_MARK, PF1MD_01),
696 PINMUX_DATA(LCD_DATA1_MARK, PF1MD_10),
697 PINMUX_DATA(SSI0_PF_MARK, PF1MD_11),
698
699 PINMUX_DATA(PF0_DATA, PF0MD_00, PF0_IN, PF0_OUT),
700 PINMUX_DATA(TCLKA_PF_MARK, PF0MD_01),
701 PINMUX_DATA(LCD_DATA0_MARK, PF0MD_10),
702 PINMUX_DATA(SSCK0_PF_MARK, PF0MD_11),
703};
704
Laurent Pincharta3db40a62013-01-02 14:53:37 +0100[diff] [blame]705static struct sh_pfc_pin pinmux_pins[] = {
Laurent Pinchartccda5522012-12-15 23:51:29 +0100[diff] [blame]706 /* PA */
Laurent Pinchart7cbb0e52013-07-15 21:16:25 +0200[diff] [blame]707 PINMUX_GPIO(PA7),
708 PINMUX_GPIO(PA6),
709 PINMUX_GPIO(PA5),
710 PINMUX_GPIO(PA4),
711 PINMUX_GPIO(PA3),
712 PINMUX_GPIO(PA2),
713 PINMUX_GPIO(PA1),
714 PINMUX_GPIO(PA0),
Laurent Pinchartccda5522012-12-15 23:51:29 +0100[diff] [blame]715
716 /* PB */
Laurent Pinchart7cbb0e52013-07-15 21:16:25 +0200[diff] [blame]717 PINMUX_GPIO(PB12),
718 PINMUX_GPIO(PB11),
719 PINMUX_GPIO(PB10),
720 PINMUX_GPIO(PB9),
721 PINMUX_GPIO(PB8),
722 PINMUX_GPIO(PB7),
723 PINMUX_GPIO(PB6),
724 PINMUX_GPIO(PB5),
725 PINMUX_GPIO(PB4),
726 PINMUX_GPIO(PB3),
727 PINMUX_GPIO(PB2),
728 PINMUX_GPIO(PB1),
729 PINMUX_GPIO(PB0),
Laurent Pinchartccda5522012-12-15 23:51:29 +0100[diff] [blame]730
731 /* PC */
Laurent Pinchart7cbb0e52013-07-15 21:16:25 +0200[diff] [blame]732 PINMUX_GPIO(PC14),
733 PINMUX_GPIO(PC13),
734 PINMUX_GPIO(PC12),
735 PINMUX_GPIO(PC11),
736 PINMUX_GPIO(PC10),
737 PINMUX_GPIO(PC9),
738 PINMUX_GPIO(PC8),
739 PINMUX_GPIO(PC7),
740 PINMUX_GPIO(PC6),
741 PINMUX_GPIO(PC5),
742 PINMUX_GPIO(PC4),
743 PINMUX_GPIO(PC3),
744 PINMUX_GPIO(PC2),
745 PINMUX_GPIO(PC1),
746 PINMUX_GPIO(PC0),
Laurent Pinchartccda5522012-12-15 23:51:29 +0100[diff] [blame]747
748 /* PD */
Laurent Pinchart7cbb0e52013-07-15 21:16:25 +0200[diff] [blame]749 PINMUX_GPIO(PD15),
750 PINMUX_GPIO(PD14),
751 PINMUX_GPIO(PD13),
752 PINMUX_GPIO(PD12),
753 PINMUX_GPIO(PD11),
754 PINMUX_GPIO(PD10),
755 PINMUX_GPIO(PD9),
756 PINMUX_GPIO(PD8),
757 PINMUX_GPIO(PD7),
758 PINMUX_GPIO(PD6),
759 PINMUX_GPIO(PD5),
760 PINMUX_GPIO(PD4),
761 PINMUX_GPIO(PD3),
762 PINMUX_GPIO(PD2),
763 PINMUX_GPIO(PD1),
764 PINMUX_GPIO(PD0),
Laurent Pinchartccda5522012-12-15 23:51:29 +0100[diff] [blame]765
766 /* PE */
Laurent Pinchart7cbb0e52013-07-15 21:16:25 +0200[diff] [blame]767 PINMUX_GPIO(PE15),
768 PINMUX_GPIO(PE14),
769 PINMUX_GPIO(PE13),
770 PINMUX_GPIO(PE12),
771 PINMUX_GPIO(PE11),
772 PINMUX_GPIO(PE10),
773 PINMUX_GPIO(PE9),
774 PINMUX_GPIO(PE8),
775 PINMUX_GPIO(PE7),
776 PINMUX_GPIO(PE6),
777 PINMUX_GPIO(PE5),
778 PINMUX_GPIO(PE4),
779 PINMUX_GPIO(PE3),
780 PINMUX_GPIO(PE2),
781 PINMUX_GPIO(PE1),
782 PINMUX_GPIO(PE0),
Laurent Pinchartccda5522012-12-15 23:51:29 +0100[diff] [blame]783
784 /* PF */
Laurent Pinchart7cbb0e52013-07-15 21:16:25 +0200[diff] [blame]785 PINMUX_GPIO(PF30),
786 PINMUX_GPIO(PF29),
787 PINMUX_GPIO(PF28),
788 PINMUX_GPIO(PF27),
789 PINMUX_GPIO(PF26),
790 PINMUX_GPIO(PF25),
791 PINMUX_GPIO(PF24),
792 PINMUX_GPIO(PF23),
793 PINMUX_GPIO(PF22),
794 PINMUX_GPIO(PF21),
795 PINMUX_GPIO(PF20),
796 PINMUX_GPIO(PF19),
797 PINMUX_GPIO(PF18),
798 PINMUX_GPIO(PF17),
799 PINMUX_GPIO(PF16),
800 PINMUX_GPIO(PF15),
801 PINMUX_GPIO(PF14),
802 PINMUX_GPIO(PF13),
803 PINMUX_GPIO(PF12),
804 PINMUX_GPIO(PF11),
805 PINMUX_GPIO(PF10),
806 PINMUX_GPIO(PF9),
807 PINMUX_GPIO(PF8),
808 PINMUX_GPIO(PF7),
809 PINMUX_GPIO(PF6),
810 PINMUX_GPIO(PF5),
811 PINMUX_GPIO(PF4),
812 PINMUX_GPIO(PF3),
813 PINMUX_GPIO(PF2),
814 PINMUX_GPIO(PF1),
815 PINMUX_GPIO(PF0),
Laurent Pincharta373ed02012-11-29 13:24:07 +0100[diff] [blame]816};
Laurent Pinchartccda5522012-12-15 23:51:29 +0100[diff] [blame]817
Laurent Pincharta373ed02012-11-29 13:24:07 +0100[diff] [blame]818#define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins)
819
Laurent Pinchartcd3c1be2013-02-16 18:47:05 +0100[diff] [blame]820static const struct pinmux_func pinmux_func_gpios[] = {
Laurent Pinchartccda5522012-12-15 23:51:29 +0100[diff] [blame]821 /* INTC */
Laurent Pinchart35ad4272012-11-28 22:05:49 +0100[diff] [blame]822 GPIO_FN(PINT7_PB),
823 GPIO_FN(PINT6_PB),
824 GPIO_FN(PINT5_PB),
825 GPIO_FN(PINT4_PB),
826 GPIO_FN(PINT3_PB),
827 GPIO_FN(PINT2_PB),
828 GPIO_FN(PINT1_PB),
829 GPIO_FN(PINT0_PB),
830 GPIO_FN(PINT7_PD),
831 GPIO_FN(PINT6_PD),
832 GPIO_FN(PINT5_PD),
833 GPIO_FN(PINT4_PD),
834 GPIO_FN(PINT3_PD),
835 GPIO_FN(PINT2_PD),
836 GPIO_FN(PINT1_PD),
837 GPIO_FN(PINT0_PD),
838 GPIO_FN(IRQ7_PB),
839 GPIO_FN(IRQ6_PB),
840 GPIO_FN(IRQ5_PB),
841 GPIO_FN(IRQ4_PB),
842 GPIO_FN(IRQ3_PB),
843 GPIO_FN(IRQ2_PB),
844 GPIO_FN(IRQ1_PB),
845 GPIO_FN(IRQ0_PB),
846 GPIO_FN(IRQ7_PD),
847 GPIO_FN(IRQ6_PD),
848 GPIO_FN(IRQ5_PD),
849 GPIO_FN(IRQ4_PD),
850 GPIO_FN(IRQ3_PD),
851 GPIO_FN(IRQ2_PD),
852 GPIO_FN(IRQ1_PD),
853 GPIO_FN(IRQ0_PD),
854 GPIO_FN(IRQ7_PE),
855 GPIO_FN(IRQ6_PE),
856 GPIO_FN(IRQ5_PE),
857 GPIO_FN(IRQ4_PE),
858 GPIO_FN(IRQ3_PE),
859 GPIO_FN(IRQ2_PE),
860 GPIO_FN(IRQ1_PE),
861 GPIO_FN(IRQ0_PE),
Laurent Pinchartccda5522012-12-15 23:51:29 +0100[diff] [blame]862
Laurent Pinchart35ad4272012-11-28 22:05:49 +0100[diff] [blame]863 GPIO_FN(WDTOVF),
864 GPIO_FN(IRQOUT),
865 GPIO_FN(REFOUT),
866 GPIO_FN(IRQOUT_REFOUT),
867 GPIO_FN(UBCTRG),
Laurent Pinchartccda5522012-12-15 23:51:29 +0100[diff] [blame]868
869 /* CAN */
Laurent Pinchart35ad4272012-11-28 22:05:49 +0100[diff] [blame]870 GPIO_FN(CTX1),
871 GPIO_FN(CRX1),
872 GPIO_FN(CTX0),
873 GPIO_FN(CTX0_CTX1),
874 GPIO_FN(CRX0),
875 GPIO_FN(CRX0_CRX1),
Laurent Pinchartccda5522012-12-15 23:51:29 +0100[diff] [blame]876
877 /* IIC3 */
Laurent Pinchart35ad4272012-11-28 22:05:49 +0100[diff] [blame]878 GPIO_FN(SDA3),
879 GPIO_FN(SCL3),
880 GPIO_FN(SDA2),
881 GPIO_FN(SCL2),
882 GPIO_FN(SDA1),
883 GPIO_FN(SCL1),
884 GPIO_FN(SDA0),
885 GPIO_FN(SCL0),
Laurent Pinchartccda5522012-12-15 23:51:29 +0100[diff] [blame]886
887 /* DMAC */
Laurent Pinchart35ad4272012-11-28 22:05:49 +0100[diff] [blame]888 GPIO_FN(TEND0_PD),
889 GPIO_FN(TEND0_PE),
890 GPIO_FN(DACK0_PD),
891 GPIO_FN(DACK0_PE),
892 GPIO_FN(DREQ0_PD),
893 GPIO_FN(DREQ0_PE),
894 GPIO_FN(TEND1_PD),
895 GPIO_FN(TEND1_PE),
896 GPIO_FN(DACK1_PD),
897 GPIO_FN(DACK1_PE),
898 GPIO_FN(DREQ1_PD),
899 GPIO_FN(DREQ1_PE),
900 GPIO_FN(DACK2),
901 GPIO_FN(DREQ2),
902 GPIO_FN(DACK3),
903 GPIO_FN(DREQ3),
Laurent Pinchartccda5522012-12-15 23:51:29 +0100[diff] [blame]904
905 /* ADC */
Laurent Pinchart35ad4272012-11-28 22:05:49 +0100[diff] [blame]906 GPIO_FN(ADTRG_PD),
907 GPIO_FN(ADTRG_PE),
Laurent Pinchartccda5522012-12-15 23:51:29 +0100[diff] [blame]908
909 /* BSC */
Laurent Pinchart35ad4272012-11-28 22:05:49 +0100[diff] [blame]910 GPIO_FN(D31),
911 GPIO_FN(D30),
912 GPIO_FN(D29),
913 GPIO_FN(D28),
914 GPIO_FN(D27),
915 GPIO_FN(D26),
916 GPIO_FN(D25),
917 GPIO_FN(D24),
918 GPIO_FN(D23),
919 GPIO_FN(D22),
920 GPIO_FN(D21),
921 GPIO_FN(D20),
922 GPIO_FN(D19),
923 GPIO_FN(D18),
924 GPIO_FN(D17),
925 GPIO_FN(D16),
926 GPIO_FN(A25),
927 GPIO_FN(A24),
928 GPIO_FN(A23),
929 GPIO_FN(A22),
930 GPIO_FN(A21),
931 GPIO_FN(CS4),
932 GPIO_FN(MRES),
933 GPIO_FN(BS),
934 GPIO_FN(IOIS16),
935 GPIO_FN(CS1),
936 GPIO_FN(CS6_CE1B),
937 GPIO_FN(CE2B),
938 GPIO_FN(CS5_CE1A),
939 GPIO_FN(CE2A),
940 GPIO_FN(FRAME),
941 GPIO_FN(WAIT),
942 GPIO_FN(RDWR),
943 GPIO_FN(CKE),
944 GPIO_FN(CASU),
945 GPIO_FN(BREQ),
946 GPIO_FN(RASU),
947 GPIO_FN(BACK),
948 GPIO_FN(CASL),
949 GPIO_FN(RASL),
950 GPIO_FN(WE3_DQMUU_AH_ICIO_WR),
951 GPIO_FN(WE2_DQMUL_ICIORD),
952 GPIO_FN(WE1_DQMLU_WE),
953 GPIO_FN(WE0_DQMLL),
954 GPIO_FN(CS3),
955 GPIO_FN(CS2),
956 GPIO_FN(A1),
957 GPIO_FN(A0),
958 GPIO_FN(CS7),
Laurent Pinchartccda5522012-12-15 23:51:29 +0100[diff] [blame]959
960 /* TMU */
Laurent Pinchart35ad4272012-11-28 22:05:49 +0100[diff] [blame]961 GPIO_FN(TIOC4D),
962 GPIO_FN(TIOC4C),
963 GPIO_FN(TIOC4B),
964 GPIO_FN(TIOC4A),
965 GPIO_FN(TIOC3D),
966 GPIO_FN(TIOC3C),
967 GPIO_FN(TIOC3B),
968 GPIO_FN(TIOC3A),
969 GPIO_FN(TIOC2B),
970 GPIO_FN(TIOC1B),
971 GPIO_FN(TIOC2A),
972 GPIO_FN(TIOC1A),
973 GPIO_FN(TIOC0D),
974 GPIO_FN(TIOC0C),
975 GPIO_FN(TIOC0B),
976 GPIO_FN(TIOC0A),
977 GPIO_FN(TCLKD_PD),
978 GPIO_FN(TCLKC_PD),
979 GPIO_FN(TCLKB_PD),
980 GPIO_FN(TCLKA_PD),
981 GPIO_FN(TCLKD_PF),
982 GPIO_FN(TCLKC_PF),
983 GPIO_FN(TCLKB_PF),
984 GPIO_FN(TCLKA_PF),
Laurent Pinchartccda5522012-12-15 23:51:29 +0100[diff] [blame]985
986 /* SSU */
Laurent Pinchart35ad4272012-11-28 22:05:49 +0100[diff] [blame]987 GPIO_FN(SCS0_PD),
988 GPIO_FN(SSO0_PD),
989 GPIO_FN(SSI0_PD),
990 GPIO_FN(SSCK0_PD),
991 GPIO_FN(SCS0_PF),
992 GPIO_FN(SSO0_PF),
993 GPIO_FN(SSI0_PF),
994 GPIO_FN(SSCK0_PF),
995 GPIO_FN(SCS1_PD),
996 GPIO_FN(SSO1_PD),
997 GPIO_FN(SSI1_PD),
998 GPIO_FN(SSCK1_PD),
999 GPIO_FN(SCS1_PF),
1000 GPIO_FN(SSO1_PF),
1001 GPIO_FN(SSI1_PF),
1002 GPIO_FN(SSCK1_PF),
Laurent Pinchartccda5522012-12-15 23:51:29 +0100[diff] [blame]1003
1004 /* SCIF */
Laurent Pinchart35ad4272012-11-28 22:05:49 +0100[diff] [blame]1005 GPIO_FN(TXD0),
1006 GPIO_FN(RXD0),
1007 GPIO_FN(SCK0),
1008 GPIO_FN(TXD1),
1009 GPIO_FN(RXD1),
1010 GPIO_FN(SCK1),
1011 GPIO_FN(TXD2),
1012 GPIO_FN(RXD2),
1013 GPIO_FN(SCK2),
1014 GPIO_FN(RTS3),
1015 GPIO_FN(CTS3),
1016 GPIO_FN(TXD3),
1017 GPIO_FN(RXD3),
1018 GPIO_FN(SCK3),
Laurent Pinchartccda5522012-12-15 23:51:29 +0100[diff] [blame]1019
1020 /* SSI */
Laurent Pinchart35ad4272012-11-28 22:05:49 +0100[diff] [blame]1021 GPIO_FN(AUDIO_CLK),
1022 GPIO_FN(SSIDATA3),
1023 GPIO_FN(SSIWS3),
1024 GPIO_FN(SSISCK3),
1025 GPIO_FN(SSIDATA2),
1026 GPIO_FN(SSIWS2),
1027 GPIO_FN(SSISCK2),
1028 GPIO_FN(SSIDATA1),
1029 GPIO_FN(SSIWS1),
1030 GPIO_FN(SSISCK1),
1031 GPIO_FN(SSIDATA0),
1032 GPIO_FN(SSIWS0),
1033 GPIO_FN(SSISCK0),
Laurent Pinchartccda5522012-12-15 23:51:29 +0100[diff] [blame]1034
1035 /* FLCTL */
Laurent Pinchart35ad4272012-11-28 22:05:49 +0100[diff] [blame]1036 GPIO_FN(FCE),
1037 GPIO_FN(FRB),
1038 GPIO_FN(NAF7),
1039 GPIO_FN(NAF6),
1040 GPIO_FN(NAF5),
1041 GPIO_FN(NAF4),
1042 GPIO_FN(NAF3),
1043 GPIO_FN(NAF2),
1044 GPIO_FN(NAF1),
1045 GPIO_FN(NAF0),
1046 GPIO_FN(FSC),
1047 GPIO_FN(FOE),
1048 GPIO_FN(FCDE),
1049 GPIO_FN(FWE),
Laurent Pinchartccda5522012-12-15 23:51:29 +0100[diff] [blame]1050
1051 /* LCDC */
Laurent Pinchart35ad4272012-11-28 22:05:49 +0100[diff] [blame]1052 GPIO_FN(LCD_VEPWC),
1053 GPIO_FN(LCD_VCPWC),
1054 GPIO_FN(LCD_CLK),
1055 GPIO_FN(LCD_FLM),
1056 GPIO_FN(LCD_M_DISP),
1057 GPIO_FN(LCD_CL2),
1058 GPIO_FN(LCD_CL1),
1059 GPIO_FN(LCD_DON),
1060 GPIO_FN(LCD_DATA15),
1061 GPIO_FN(LCD_DATA14),
1062 GPIO_FN(LCD_DATA13),
1063 GPIO_FN(LCD_DATA12),
1064 GPIO_FN(LCD_DATA11),
1065 GPIO_FN(LCD_DATA10),
1066 GPIO_FN(LCD_DATA9),
1067 GPIO_FN(LCD_DATA8),
1068 GPIO_FN(LCD_DATA7),
1069 GPIO_FN(LCD_DATA6),
1070 GPIO_FN(LCD_DATA5),
1071 GPIO_FN(LCD_DATA4),
1072 GPIO_FN(LCD_DATA3),
1073 GPIO_FN(LCD_DATA2),
1074 GPIO_FN(LCD_DATA1),
1075 GPIO_FN(LCD_DATA0),
Laurent Pinchartccda5522012-12-15 23:51:29 +0100[diff] [blame]1076};
1077
Laurent Pinchartcd3c1be2013-02-16 18:47:05 +0100[diff] [blame]1078static const struct pinmux_cfg_reg pinmux_config_regs[] = {
Laurent Pinchartccda5522012-12-15 23:51:29 +0100[diff] [blame]1079 { PINMUX_CFG_REG("PBIORL", 0xfffe3886, 16, 1) {
1080 0, 0,
1081 0, 0,
1082 0, 0,
1083 0, 0,
1084 PB11_IN, PB11_OUT,
1085 PB10_IN, PB10_OUT,
1086 PB9_IN, PB9_OUT,
1087 PB8_IN, PB8_OUT,
1088 0, 0,
1089 0, 0,
1090 0, 0,
1091 0, 0,
1092 0, 0,
1093 0, 0,
1094 0, 0,
1095 0, 0 }
1096 },
1097 { PINMUX_CFG_REG("PBCRL4", 0xfffe3890, 16, 4) {
1098 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1099
1100 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1101
1102 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1103
1104 PB12MD_00, PB12MD_01, PB12MD_10, PB12MD_11,
1105 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1106 },
1107 { PINMUX_CFG_REG("PBCRL3", 0xfffe3892, 16, 4) {
1108 PB11MD_0, PB11MD_1,
1109 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1110
1111 PB10MD_0, PB10MD_1,
1112 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1113
1114 PB9MD_00, PB9MD_01, PB9MD_10, 0,
1115 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1116
1117 PB8MD_00, PB8MD_01, PB8MD_10, 0,
1118 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1119 },
1120 { PINMUX_CFG_REG("PBCRL2", 0xfffe3894, 16, 4) {
1121 PB7MD_00, PB7MD_01, PB7MD_10, PB7MD_11,
1122 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1123
1124 PB6MD_00, PB6MD_01, PB6MD_10, PB6MD_11,
1125 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1126
1127 PB5MD_00, PB5MD_01, PB5MD_10, PB5MD_11,
1128 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1129
1130 PB4MD_00, PB4MD_01, PB4MD_10, PB4MD_11,
1131 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1132 },
1133 { PINMUX_CFG_REG("PBCRL1", 0xfffe3896, 16, 4) {
1134 PB3MD_00, PB3MD_01, PB3MD_10, PB3MD_11,
1135 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1136
1137 PB2MD_00, PB2MD_01, PB2MD_10, PB2MD_11,
1138 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1139
1140 PB1MD_00, PB1MD_01, PB1MD_10, PB1MD_11,
1141 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1142
1143 PB0MD_00, PB0MD_01, PB0MD_10, PB0MD_11,
1144 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1145 },
1146 { PINMUX_CFG_REG("IFCR", 0xfffe38a2, 16, 4) {
1147 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1148
1149 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1150
1151 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1152
1153 PB12IRQ_00, PB12IRQ_01, PB12IRQ_10, 0,
1154 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1155 },
1156 { PINMUX_CFG_REG("PCIORL", 0xfffe3906, 16, 1) {
1157 0, 0,
1158 PC14_IN, PC14_OUT,
1159 PC13_IN, PC13_OUT,
1160 PC12_IN, PC12_OUT,
1161 PC11_IN, PC11_OUT,
1162 PC10_IN, PC10_OUT,
1163 PC9_IN, PC9_OUT,
1164 PC8_IN, PC8_OUT,
1165 PC7_IN, PC7_OUT,
1166 PC6_IN, PC6_OUT,
1167 PC5_IN, PC5_OUT,
1168 PC4_IN, PC4_OUT,
1169 PC3_IN, PC3_OUT,
1170 PC2_IN, PC2_OUT,
1171 PC1_IN, PC1_OUT,
1172 PC0_IN, PC0_OUT }
1173 },
1174 { PINMUX_CFG_REG("PCCRL4", 0xfffe3910, 16, 4) {
1175 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1176
1177 PC14MD_0, PC14MD_1,
1178 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1179
1180 PC13MD_0, PC13MD_1,
1181 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1182
1183 PC12MD_0, PC12MD_1,
1184 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1185 },
1186 { PINMUX_CFG_REG("PCCRL3", 0xfffe3912, 16, 4) {
1187 PC11MD_00, PC11MD_01, PC11MD_10, 0,
1188 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1189
1190 PC10MD_00, PC10MD_01, PC10MD_10, 0,
1191 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1192
1193 PC9MD_0, PC9MD_1,
1194 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1195
1196 PC8MD_0, PC8MD_1,
1197 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1198 },
1199 { PINMUX_CFG_REG("PCCRL2", 0xfffe3914, 16, 4) {
1200 PC7MD_0, PC7MD_1,
1201 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1202
1203 PC6MD_0, PC6MD_1,
1204 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1205
1206 PC5MD_0, PC5MD_1,
1207 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1208
1209 PC4MD_0, PC4MD_1,
1210 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1211 },
1212 { PINMUX_CFG_REG("PCCRL1", 0xfffe3916, 16, 4) {
1213 PC3MD_0, PC3MD_1,
1214 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1215
1216 PC2MD_0, PC2MD_1,
1217 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1218
1219 PC1MD_0, PC1MD_1,
1220 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1221
1222 PC0MD_00, PC0MD_01, PC0MD_10, 0,
1223 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1224 },
1225 { PINMUX_CFG_REG("PDIORL", 0xfffe3986, 16, 1) {
1226 PD15_IN, PD15_OUT,
1227 PD14_IN, PD14_OUT,
1228 PD13_IN, PD13_OUT,
1229 PD12_IN, PD12_OUT,
1230 PD11_IN, PD11_OUT,
1231 PD10_IN, PD10_OUT,
1232 PD9_IN, PD9_OUT,
1233 PD8_IN, PD8_OUT,
1234 PD7_IN, PD7_OUT,
1235 PD6_IN, PD6_OUT,
1236 PD5_IN, PD5_OUT,
1237 PD4_IN, PD4_OUT,
1238 PD3_IN, PD3_OUT,
1239 PD2_IN, PD2_OUT,
1240 PD1_IN, PD1_OUT,
1241 PD0_IN, PD0_OUT }
1242 },
1243 { PINMUX_CFG_REG("PDCRL4", 0xfffe3990, 16, 4) {
1244 PD15MD_000, PD15MD_001, PD15MD_010, 0,
1245 PD15MD_100, PD15MD_101, 0, 0,
1246 0, 0, 0, 0, 0, 0, 0, 0,
1247
1248 PD14MD_000, PD14MD_001, PD14MD_010, 0,
1249 0, PD14MD_101, 0, 0,
1250 0, 0, 0, 0, 0, 0, 0, 0,
1251
1252 PD13MD_000, PD13MD_001, PD13MD_010, 0,
1253 PD13MD_100, PD13MD_101, 0, 0,
1254 0, 0, 0, 0, 0, 0, 0, 0,
1255
1256 PD12MD_000, PD12MD_001, PD12MD_010, 0,
1257 PD12MD_100, PD12MD_101, 0, 0,
1258 0, 0, 0, 0, 0, 0, 0, 0 }
1259 },
1260 { PINMUX_CFG_REG("PDCRL3", 0xfffe3992, 16, 4) {
1261 PD11MD_000, PD11MD_001, PD11MD_010, 0,
1262 PD11MD_100, PD11MD_101, 0, 0,
1263 0, 0, 0, 0, 0, 0, 0, 0,
1264
1265 PD10MD_000, PD10MD_001, PD10MD_010, 0,
1266 PD10MD_100, PD10MD_101, 0, 0,
1267 0, 0, 0, 0, 0, 0, 0, 0,
1268
1269 PD9MD_000, PD9MD_001, PD9MD_010, 0,
1270 PD9MD_100, PD9MD_101, 0, 0,
1271 0, 0, 0, 0, 0, 0, 0, 0,
1272
1273 PD8MD_000, PD8MD_001, PD8MD_010, 0,
1274 PD8MD_100, PD8MD_101, 0, 0,
1275 0, 0, 0, 0, 0, 0, 0, 0 }
1276 },
1277 { PINMUX_CFG_REG("PDCRL2", 0xfffe3994, 16, 4) {
1278 PD7MD_000, PD7MD_001, PD7MD_010, PD7MD_011,
1279 PD7MD_100, PD7MD_101, 0, 0,
1280 0, 0, 0, 0, 0, 0, 0, 0,
1281
1282 PD6MD_000, PD6MD_001, PD6MD_010, PD6MD_011,
1283 PD6MD_100, PD6MD_101, 0, 0,
1284 0, 0, 0, 0, 0, 0, 0, 0,
1285
1286 PD5MD_000, PD5MD_001, PD5MD_010, PD5MD_011,
1287 PD5MD_100, PD5MD_101, 0, 0,
1288 0, 0, 0, 0, 0, 0, 0, 0,
1289
1290 PD4MD_000, PD4MD_001, PD4MD_010, PD4MD_011,
1291 PD4MD_100, PD4MD_101, 0, 0,
1292 0, 0, 0, 0, 0, 0, 0, 0 }
1293 },
1294 { PINMUX_CFG_REG("PDCRL1", 0xfffe3996, 16, 4) {
1295 PD3MD_000, PD3MD_001, PD3MD_010, PD3MD_011,
1296 PD3MD_100, PD3MD_101, 0, 0,
1297 0, 0, 0, 0, 0, 0, 0, 0,
1298
1299 PD2MD_000, PD2MD_001, PD2MD_010, PD2MD_011,
1300 PD2MD_100, PD2MD_101, 0, 0,
1301 0, 0, 0, 0, 0, 0, 0, 0,
1302
1303 PD1MD_000, PD1MD_001, PD1MD_010, PD1MD_011,
1304 PD1MD_100, PD1MD_101, 0, 0,
1305 0, 0, 0, 0, 0, 0, 0, 0,
1306
1307 PD0MD_000, PD0MD_001, PD0MD_010, PD0MD_011,
1308 PD0MD_100, PD0MD_101, 0, 0,
1309 0, 0, 0, 0, 0, 0, 0, 0 }
1310 },
1311 { PINMUX_CFG_REG("PEIORL", 0xfffe3a06, 16, 1) {
1312 PE15_IN, PE15_OUT,
1313 PE14_IN, PE14_OUT,
1314 PE13_IN, PE13_OUT,
1315 PE12_IN, PE12_OUT,
1316 PE11_IN, PE11_OUT,
1317 PE10_IN, PE10_OUT,
1318 PE9_IN, PE9_OUT,
1319 PE8_IN, PE8_OUT,
1320 PE7_IN, PE7_OUT,
1321 PE6_IN, PE6_OUT,
1322 PE5_IN, PE5_OUT,
1323 PE4_IN, PE4_OUT,
1324 PE3_IN, PE3_OUT,
1325 PE2_IN, PE2_OUT,
1326 PE1_IN, PE1_OUT,
1327 PE0_IN, PE0_OUT }
1328 },
1329 { PINMUX_CFG_REG("PECRL4", 0xfffe3a10, 16, 4) {
1330 PE15MD_00, PE15MD_01, 0, PE15MD_11,
1331 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1332
1333 PE14MD_00, PE14MD_01, 0, PE14MD_11,
1334 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1335
1336 PE13MD_00, 0, 0, PE13MD_11,
1337 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1338
1339 PE12MD_00, 0, 0, PE12MD_11,
1340 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1341 },
1342 { PINMUX_CFG_REG("PECRL3", 0xfffe3a12, 16, 4) {
1343 PE11MD_000, PE11MD_001, PE11MD_010, 0,
1344 PE11MD_100, 0, 0, 0,
1345 0, 0, 0, 0, 0, 0, 0, 0,
1346
1347 PE10MD_000, PE10MD_001, PE10MD_010, 0,
1348 PE10MD_100, 0, 0, 0,
1349 0, 0, 0, 0, 0, 0, 0, 0,
1350
1351 PE9MD_00, PE9MD_01, PE9MD_10, PE9MD_11,
1352 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1353
1354 PE8MD_00, PE8MD_01, PE8MD_10, PE8MD_11,
1355 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1356 },
1357 { PINMUX_CFG_REG("PECRL2", 0xfffe3a14, 16, 4) {
1358 PE7MD_000, PE7MD_001, PE7MD_010, PE7MD_011,
1359 PE7MD_100, 0, 0, 0,
1360 0, 0, 0, 0, 0, 0, 0, 0,
1361
1362 PE6MD_000, PE6MD_001, PE6MD_010, PE6MD_011,
1363 PE6MD_100, 0, 0, 0,
1364 0, 0, 0, 0, 0, 0, 0, 0,
1365
1366 PE5MD_000, PE5MD_001, PE5MD_010, PE5MD_011,
1367 PE5MD_100, 0, 0, 0,
1368 0, 0, 0, 0, 0, 0, 0, 0,
1369
1370 PE4MD_000, PE4MD_001, PE4MD_010, PE4MD_011,
1371 PE4MD_100, 0, 0, 0,
1372 0, 0, 0, 0, 0, 0, 0, 0 }
1373 },
1374 { PINMUX_CFG_REG("PECRL1", 0xfffe3a16, 16, 4) {
1375 PE3MD_00, PE3MD_01, 0, PE3MD_11,
1376 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1377
1378 PE2MD_00, PE2MD_01, 0, PE2MD_11,
1379 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1380
1381 PE1MD_00, PE1MD_01, PE1MD_10, PE1MD_11,
1382 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1383
1384 PE0MD_000, PE0MD_001, 0, PE0MD_011,
1385 PE0MD_100, 0, 0, 0,
1386 0, 0, 0, 0, 0, 0, 0, 0 }
1387 },
1388 { PINMUX_CFG_REG("PFIORH", 0xfffe3a84, 16, 1) {
1389 0, 0,
1390 PF30_IN, PF30_OUT,
1391 PF29_IN, PF29_OUT,
1392 PF28_IN, PF28_OUT,
1393 PF27_IN, PF27_OUT,
1394 PF26_IN, PF26_OUT,
1395 PF25_IN, PF25_OUT,
1396 PF24_IN, PF24_OUT,
1397 PF23_IN, PF23_OUT,
1398 PF22_IN, PF22_OUT,
1399 PF21_IN, PF21_OUT,
1400 PF20_IN, PF20_OUT,
1401 PF19_IN, PF19_OUT,
1402 PF18_IN, PF18_OUT,
1403 PF17_IN, PF17_OUT,
1404 PF16_IN, PF16_OUT }
1405 },
1406 { PINMUX_CFG_REG("PFIORL", 0xfffe3a86, 16, 1) {
1407 PF15_IN, PF15_OUT,
1408 PF14_IN, PF14_OUT,
1409 PF13_IN, PF13_OUT,
1410 PF12_IN, PF12_OUT,
1411 PF11_IN, PF11_OUT,
1412 PF10_IN, PF10_OUT,
1413 PF9_IN, PF9_OUT,
1414 PF8_IN, PF8_OUT,
1415 PF7_IN, PF7_OUT,
1416 PF6_IN, PF6_OUT,
1417 PF5_IN, PF5_OUT,
1418 PF4_IN, PF4_OUT,
1419 PF3_IN, PF3_OUT,
1420 PF2_IN, PF2_OUT,
1421 PF1_IN, PF1_OUT,
1422 PF0_IN, PF0_OUT }
1423 },
1424 { PINMUX_CFG_REG("PFCRH4", 0xfffe3a88, 16, 4) {
1425 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1426
1427 PF30MD_0, PF30MD_1,
1428 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1429
1430 PF29MD_0, PF29MD_1,
1431 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1432
1433 PF28MD_0, PF28MD_1,
1434 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1435 },
1436 { PINMUX_CFG_REG("PFCRH3", 0xfffe3a8a, 16, 4) {
1437 PF27MD_0, PF27MD_1,
1438 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1439
1440 PF26MD_0, PF26MD_1,
1441 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1442
1443 PF25MD_0, PF25MD_1,
1444 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1445
1446 PF24MD_0, PF24MD_1,
1447 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1448 },
1449 { PINMUX_CFG_REG("PFCRH2", 0xfffe3a8c, 16, 4) {
1450 PF23MD_00, PF23MD_01, PF23MD_10, 0,
1451 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1452
1453 PF22MD_00, PF22MD_01, PF22MD_10, 0,
1454 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1455
1456 PF21MD_00, PF21MD_01, PF21MD_10, 0,
1457 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1458
1459 PF20MD_00, PF20MD_01, PF20MD_10, 0,
1460 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1461 },
1462 { PINMUX_CFG_REG("PFCRH1", 0xfffe3a8e, 16, 4) {
1463 PF19MD_00, PF19MD_01, PF19MD_10, 0,
1464 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1465
1466 PF18MD_00, PF18MD_01, PF18MD_10, 0,
1467 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1468
1469 PF17MD_00, PF17MD_01, PF17MD_10, 0,
1470 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1471
1472 PF16MD_00, PF16MD_01, PF16MD_10, 0,
1473 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1474 },
1475 { PINMUX_CFG_REG("PFCRL4", 0xfffe3a90, 16, 4) {
1476 PF15MD_00, PF15MD_01, PF15MD_10, 0,
1477 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1478
1479 PF14MD_00, PF14MD_01, PF14MD_10, 0,
1480 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1481
1482 PF13MD_00, PF13MD_01, PF13MD_10, 0,
1483 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1484
1485 PF12MD_00, PF12MD_01, PF12MD_10, 0,
1486 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1487 },
1488 { PINMUX_CFG_REG("PFCRL3", 0xfffe3a92, 16, 4) {
1489 PF11MD_00, PF11MD_01, PF11MD_10, 0,
1490 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1491
1492 PF10MD_00, PF10MD_01, PF10MD_10, 0,
1493 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1494
1495 PF9MD_00, PF9MD_01, PF9MD_10, 0,
1496 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1497
1498 PF8MD_00, PF8MD_01, PF8MD_10, 0,
1499 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1500 },
1501 { PINMUX_CFG_REG("PFCRL2", 0xfffe3a94, 16, 4) {
1502 PF7MD_00, PF7MD_01, PF7MD_10, PF7MD_11,
1503 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1504
1505 PF6MD_00, PF6MD_01, PF6MD_10, PF6MD_11,
1506 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1507
1508 PF5MD_00, PF5MD_01, PF5MD_10, PF5MD_11,
1509 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1510
1511 PF4MD_00, PF4MD_01, PF4MD_10, PF4MD_11,
1512 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1513 },
1514 { PINMUX_CFG_REG("PFCRL1", 0xfffe3a96, 16, 4) {
1515 PF3MD_00, PF3MD_01, PF3MD_10, PF3MD_11,
1516 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1517
1518 PF2MD_00, PF2MD_01, PF2MD_10, PF2MD_11,
1519 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1520
1521 PF1MD_00, PF1MD_01, PF1MD_10, PF1MD_11,
1522 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1523
1524 PF0MD_00, PF0MD_01, PF0MD_10, PF0MD_11,
1525 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1526 },
1527 {}
1528};
1529
Laurent Pinchartcd3c1be2013-02-16 18:47:05 +0100[diff] [blame]1530static const struct pinmux_data_reg pinmux_data_regs[] = {
Laurent Pinchartccda5522012-12-15 23:51:29 +0100[diff] [blame]1531 { PINMUX_DATA_REG("PADRL", 0xfffe3802, 16) {
1532 0, 0, 0, 0,
1533 0, 0, 0, 0,
1534 PA7_DATA, PA6_DATA, PA5_DATA, PA4_DATA,
1535 PA3_DATA, PA2_DATA, PA1_DATA, PA0_DATA }
1536 },
1537 { PINMUX_DATA_REG("PBDRL", 0xfffe3882, 16) {
1538 0, 0, 0, PB12_DATA,
1539 PB11_DATA, PB10_DATA, PB9_DATA, PB8_DATA,
1540 PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA,
1541 PB3_DATA, PB2_DATA, PB1_DATA, PB0_DATA }
1542 },
1543 { PINMUX_DATA_REG("PCDRL", 0xfffe3902, 16) {
1544 0, PC14_DATA, PC13_DATA, PC12_DATA,
1545 PC11_DATA, PC10_DATA, PC9_DATA, PC8_DATA,
1546 PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA,
1547 PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA }
1548 },
1549 { PINMUX_DATA_REG("PDDRL", 0xfffe3982, 16) {
1550 PD15_DATA, PD14_DATA, PD13_DATA, PD12_DATA,
1551 PD11_DATA, PD10_DATA, PD9_DATA, PD8_DATA,
1552 PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA,
1553 PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA }
1554 },
1555 { PINMUX_DATA_REG("PEDRL", 0xfffe3a02, 16) {
1556 PE15_DATA, PE14_DATA, PE13_DATA, PE12_DATA,
1557 PE11_DATA, PE10_DATA, PE9_DATA, PE8_DATA,
1558 PE7_DATA, PE6_DATA, PE5_DATA, PE4_DATA,
1559 PE3_DATA, PE2_DATA, PE1_DATA, PE0_DATA }
1560 },
1561 { PINMUX_DATA_REG("PFDRH", 0xfffe3a80, 16) {
1562 0, PF30_DATA, PF29_DATA, PF28_DATA,
1563 PF27_DATA, PF26_DATA, PF25_DATA, PF24_DATA,
1564 PF23_DATA, PF22_DATA, PF21_DATA, PF20_DATA,
1565 PF19_DATA, PF18_DATA, PF17_DATA, PF16_DATA }
1566 },
1567 { PINMUX_DATA_REG("PFDRL", 0xfffe3a82, 16) {
1568 PF15_DATA, PF14_DATA, PF13_DATA, PF12_DATA,
1569 PF11_DATA, PF10_DATA, PF9_DATA, PF8_DATA,
1570 PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA,
1571 PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA }
1572 },
1573 { },
1574};
1575
Laurent Pinchartcd3c1be2013-02-16 18:47:05 +0100[diff] [blame]1576const struct sh_pfc_soc_info sh7203_pinmux_info = {
Laurent Pinchartccda5522012-12-15 23:51:29 +0100[diff] [blame]1577 .name = "sh7203_pfc",
Laurent Pinchartccda5522012-12-15 23:51:29 +0100[diff] [blame]1578 .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END, FORCE_IN },
1579 .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END, FORCE_OUT },
Laurent Pinchartccda5522012-12-15 23:51:29 +0100[diff] [blame]1580 .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
1581
Laurent Pincharta373ed02012-11-29 13:24:07 +0100[diff] [blame]1582 .pins = pinmux_pins,
1583 .nr_pins = ARRAY_SIZE(pinmux_pins),
1584 .func_gpios = pinmux_func_gpios,
1585 .nr_func_gpios = ARRAY_SIZE(pinmux_func_gpios),
Laurent Pinchartd7a7ca52012-11-28 17:51:00 +0100[diff] [blame]1586
Laurent Pinchartccda5522012-12-15 23:51:29 +0100[diff] [blame]1587 .cfg_regs = pinmux_config_regs,
1588 .data_regs = pinmux_data_regs,
1589
1590 .gpio_data = pinmux_data,
1591 .gpio_data_size = ARRAY_SIZE(pinmux_data),
1592};