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john stultz8d016ef2006-06-26 00:25:09 -07001/*
2 * i8253.c 8253/PIT functions
3 *
4 */
Thomas Gleixnere9e2cdb2007-02-16 01:28:04 -08005#include <linux/clockchips.h>
john stultz8d016ef2006-06-26 00:25:09 -07006#include <linux/spinlock.h>
7#include <linux/jiffies.h>
8#include <linux/sysdev.h>
9#include <linux/module.h>
10#include <linux/init.h>
11
12#include <asm/smp.h>
13#include <asm/delay.h>
14#include <asm/i8253.h>
15#include <asm/io.h>
16
17#include "io_ports.h"
18
19DEFINE_SPINLOCK(i8253_lock);
20EXPORT_SYMBOL(i8253_lock);
21
Thomas Gleixnere9e2cdb2007-02-16 01:28:04 -080022/*
23 * HPET replaces the PIT, when enabled. So we need to know, which of
24 * the two timers is used
25 */
26struct clock_event_device *global_clock_event;
27
28/*
29 * Initialize the PIT timer.
30 *
31 * This is also called after resume to bring the PIT into operation again.
32 */
33static void init_pit_timer(enum clock_event_mode mode,
34 struct clock_event_device *evt)
john stultz8d016ef2006-06-26 00:25:09 -070035{
36 unsigned long flags;
37
38 spin_lock_irqsave(&i8253_lock, flags);
Thomas Gleixnere9e2cdb2007-02-16 01:28:04 -080039
40 switch(mode) {
41 case CLOCK_EVT_MODE_PERIODIC:
42 /* binary, mode 2, LSB/MSB, ch 0 */
43 outb_p(0x34, PIT_MODE);
44 udelay(10);
45 outb_p(LATCH & 0xff , PIT_CH0); /* LSB */
46 udelay(10);
47 outb(LATCH >> 8 , PIT_CH0); /* MSB */
48 break;
49
Thomas Gleixner6b3964c2007-03-22 22:46:18 +010050 /*
51 * Avoid unnecessary state transitions, as it confuses
52 * Geode / Cyrix based boxen.
53 */
Thomas Gleixnere9e2cdb2007-02-16 01:28:04 -080054 case CLOCK_EVT_MODE_SHUTDOWN:
Thomas Gleixner6b3964c2007-03-22 22:46:18 +010055 if (evt->mode == CLOCK_EVT_MODE_UNUSED)
56 break;
Thomas Gleixnere9e2cdb2007-02-16 01:28:04 -080057 case CLOCK_EVT_MODE_UNUSED:
Thomas Gleixner6b3964c2007-03-22 22:46:18 +010058 if (evt->mode == CLOCK_EVT_MODE_SHUTDOWN)
59 break;
60 case CLOCK_EVT_MODE_ONESHOT:
Thomas Gleixnere9e2cdb2007-02-16 01:28:04 -080061 /* One shot setup */
62 outb_p(0x38, PIT_MODE);
63 udelay(10);
64 break;
65 }
john stultz8d016ef2006-06-26 00:25:09 -070066 spin_unlock_irqrestore(&i8253_lock, flags);
67}
john stultz5d0cf412006-06-26 00:25:12 -070068
69/*
Thomas Gleixnere9e2cdb2007-02-16 01:28:04 -080070 * Program the next event in oneshot mode
71 *
72 * Delta is given in PIT ticks
73 */
74static int pit_next_event(unsigned long delta, struct clock_event_device *evt)
75{
76 unsigned long flags;
77
78 spin_lock_irqsave(&i8253_lock, flags);
79 outb_p(delta & 0xff , PIT_CH0); /* LSB */
80 outb(delta >> 8 , PIT_CH0); /* MSB */
81 spin_unlock_irqrestore(&i8253_lock, flags);
82
83 return 0;
84}
85
86/*
87 * On UP the PIT can serve all of the possible timer functions. On SMP systems
88 * it can be solely used for the global tick.
89 *
90 * The profiling and update capabilites are switched off once the local apic is
91 * registered. This mechanism replaces the previous #ifdef LOCAL_APIC -
92 * !using_apic_timer decisions in do_timer_interrupt_hook()
93 */
94struct clock_event_device pit_clockevent = {
95 .name = "pit",
96 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
97 .set_mode = init_pit_timer,
98 .set_next_event = pit_next_event,
99 .shift = 32,
100 .irq = 0,
101};
102
103/*
104 * Initialize the conversion factor and the min/max deltas of the clock event
105 * structure and register the clock event source with the framework.
106 */
107void __init setup_pit_timer(void)
108{
109 /*
110 * Start pit with the boot cpu mask and make it global after the
111 * IO_APIC has been initialized.
112 */
113 pit_clockevent.cpumask = cpumask_of_cpu(0);
114 pit_clockevent.mult = div_sc(CLOCK_TICK_RATE, NSEC_PER_SEC, 32);
115 pit_clockevent.max_delta_ns =
116 clockevent_delta2ns(0x7FFF, &pit_clockevent);
117 pit_clockevent.min_delta_ns =
118 clockevent_delta2ns(0xF, &pit_clockevent);
119 clockevents_register_device(&pit_clockevent);
120 global_clock_event = &pit_clockevent;
121}
122
123/*
john stultz5d0cf412006-06-26 00:25:12 -0700124 * Since the PIT overflows every tick, its not very useful
125 * to just read by itself. So use jiffies to emulate a free
126 * running counter:
127 */
128static cycle_t pit_read(void)
129{
130 unsigned long flags;
131 int count;
john stultz6415ce92006-06-26 00:25:16 -0700132 u32 jifs;
133 static int old_count;
134 static u32 old_jifs;
john stultz5d0cf412006-06-26 00:25:12 -0700135
136 spin_lock_irqsave(&i8253_lock, flags);
Thomas Gleixnere9e2cdb2007-02-16 01:28:04 -0800137 /*
john stultz6415ce92006-06-26 00:25:16 -0700138 * Although our caller may have the read side of xtime_lock,
139 * this is now a seqlock, and we are cheating in this routine
140 * by having side effects on state that we cannot undo if
141 * there is a collision on the seqlock and our caller has to
142 * retry. (Namely, old_jifs and old_count.) So we must treat
143 * jiffies as volatile despite the lock. We read jiffies
144 * before latching the timer count to guarantee that although
145 * the jiffies value might be older than the count (that is,
146 * the counter may underflow between the last point where
147 * jiffies was incremented and the point where we latch the
148 * count), it cannot be newer.
149 */
150 jifs = jiffies;
john stultz5d0cf412006-06-26 00:25:12 -0700151 outb_p(0x00, PIT_MODE); /* latch the count ASAP */
152 count = inb_p(PIT_CH0); /* read the latched count */
153 count |= inb_p(PIT_CH0) << 8;
154
155 /* VIA686a test code... reset the latch if count > max + 1 */
156 if (count > LATCH) {
157 outb_p(0x34, PIT_MODE);
158 outb_p(LATCH & 0xff, PIT_CH0);
159 outb(LATCH >> 8, PIT_CH0);
160 count = LATCH - 1;
161 }
john stultz6415ce92006-06-26 00:25:16 -0700162
163 /*
164 * It's possible for count to appear to go the wrong way for a
165 * couple of reasons:
166 *
167 * 1. The timer counter underflows, but we haven't handled the
168 * resulting interrupt and incremented jiffies yet.
169 * 2. Hardware problem with the timer, not giving us continuous time,
170 * the counter does small "jumps" upwards on some Pentium systems,
171 * (see c't 95/10 page 335 for Neptun bug.)
172 *
173 * Previous attempts to handle these cases intelligently were
174 * buggy, so we just do the simple thing now.
175 */
176 if (count > old_count && jifs == old_jifs) {
177 count = old_count;
178 }
179 old_count = count;
180 old_jifs = jifs;
181
john stultz5d0cf412006-06-26 00:25:12 -0700182 spin_unlock_irqrestore(&i8253_lock, flags);
183
john stultz6415ce92006-06-26 00:25:16 -0700184 count = (LATCH - 1) - count;
john stultz5d0cf412006-06-26 00:25:12 -0700185
186 return (cycle_t)(jifs * LATCH) + count;
187}
188
189static struct clocksource clocksource_pit = {
190 .name = "pit",
191 .rating = 110,
192 .read = pit_read,
john stultz6415ce92006-06-26 00:25:16 -0700193 .mask = CLOCKSOURCE_MASK(32),
john stultz5d0cf412006-06-26 00:25:12 -0700194 .mult = 0,
195 .shift = 20,
196};
197
198static int __init init_pit_clocksource(void)
199{
john stultz3f4a0b92006-10-17 00:09:32 -0700200 if (num_possible_cpus() > 1) /* PIT does not scale! */
john stultz5d0cf412006-06-26 00:25:12 -0700201 return 0;
202
203 clocksource_pit.mult = clocksource_hz2mult(CLOCK_TICK_RATE, 20);
john stultza2752542006-06-26 00:25:14 -0700204 return clocksource_register(&clocksource_pit);
john stultz5d0cf412006-06-26 00:25:12 -0700205}
john stultz6bb74df2007-03-05 00:30:50 -0800206arch_initcall(init_pit_clocksource);