Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * drivers/mtd/nand.c |
| 3 | * |
| 4 | * Overview: |
| 5 | * This is the generic MTD driver for NAND flash devices. It should be |
| 6 | * capable of working with almost all NAND chips currently available. |
| 7 | * Basic support for AG-AND chips is provided. |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 8 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 9 | * Additional technical information is available on |
maximilian attems | 8b2b403 | 2007-07-28 13:07:16 +0200 | [diff] [blame] | 10 | * http://www.linux-mtd.infradead.org/doc/nand.html |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 11 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 12 | * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 13 | * 2002-2006 Thomas Gleixner (tglx@linutronix.de) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 14 | * |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 15 | * Credits: |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 16 | * David Woodhouse for adding multichip support |
| 17 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 18 | * Aleph One Ltd. and Toby Churchill Ltd. for supporting the |
| 19 | * rework for 2K page size chips |
| 20 | * |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 21 | * TODO: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 22 | * Enable cached programming for 2k page size chips |
| 23 | * Check, if mtd->ecctype should be set to MTD_ECC_HW |
| 24 | * if we have HW ecc support. |
| 25 | * The AG-AND chips have nice features for speed improvement, |
| 26 | * which are not supported yet. Read / program 4 pages in one go. |
Artem Bityutskiy | c0b8ba7 | 2007-07-23 16:06:50 +0300 | [diff] [blame] | 27 | * BBT table is not serialized, has to be fixed |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 28 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 29 | * This program is free software; you can redistribute it and/or modify |
| 30 | * it under the terms of the GNU General Public License version 2 as |
| 31 | * published by the Free Software Foundation. |
| 32 | * |
| 33 | */ |
| 34 | |
David Woodhouse | 552d920 | 2006-05-14 01:20:46 +0100 | [diff] [blame] | 35 | #include <linux/module.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 36 | #include <linux/delay.h> |
| 37 | #include <linux/errno.h> |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 38 | #include <linux/err.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 39 | #include <linux/sched.h> |
| 40 | #include <linux/slab.h> |
| 41 | #include <linux/types.h> |
| 42 | #include <linux/mtd/mtd.h> |
| 43 | #include <linux/mtd/nand.h> |
| 44 | #include <linux/mtd/nand_ecc.h> |
| 45 | #include <linux/mtd/compatmac.h> |
| 46 | #include <linux/interrupt.h> |
| 47 | #include <linux/bitops.h> |
Richard Purdie | 8fe833c | 2006-03-31 02:31:14 -0800 | [diff] [blame] | 48 | #include <linux/leds.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 49 | #include <asm/io.h> |
| 50 | |
| 51 | #ifdef CONFIG_MTD_PARTITIONS |
| 52 | #include <linux/mtd/partitions.h> |
| 53 | #endif |
| 54 | |
| 55 | /* Define default oob placement schemes for large and small page devices */ |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 56 | static struct nand_ecclayout nand_oob_8 = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 57 | .eccbytes = 3, |
| 58 | .eccpos = {0, 1, 2}, |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 59 | .oobfree = { |
| 60 | {.offset = 3, |
| 61 | .length = 2}, |
| 62 | {.offset = 6, |
| 63 | .length = 2}} |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 64 | }; |
| 65 | |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 66 | static struct nand_ecclayout nand_oob_16 = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 67 | .eccbytes = 6, |
| 68 | .eccpos = {0, 1, 2, 3, 6, 7}, |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 69 | .oobfree = { |
| 70 | {.offset = 8, |
| 71 | . length = 8}} |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 72 | }; |
| 73 | |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 74 | static struct nand_ecclayout nand_oob_64 = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 75 | .eccbytes = 24, |
| 76 | .eccpos = { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 77 | 40, 41, 42, 43, 44, 45, 46, 47, |
| 78 | 48, 49, 50, 51, 52, 53, 54, 55, |
| 79 | 56, 57, 58, 59, 60, 61, 62, 63}, |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 80 | .oobfree = { |
| 81 | {.offset = 2, |
| 82 | .length = 38}} |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 83 | }; |
| 84 | |
Thomas Gleixner | 81ec536 | 2007-12-12 17:27:03 +0100 | [diff] [blame] | 85 | static struct nand_ecclayout nand_oob_128 = { |
| 86 | .eccbytes = 48, |
| 87 | .eccpos = { |
| 88 | 80, 81, 82, 83, 84, 85, 86, 87, |
| 89 | 88, 89, 90, 91, 92, 93, 94, 95, |
| 90 | 96, 97, 98, 99, 100, 101, 102, 103, |
| 91 | 104, 105, 106, 107, 108, 109, 110, 111, |
| 92 | 112, 113, 114, 115, 116, 117, 118, 119, |
| 93 | 120, 121, 122, 123, 124, 125, 126, 127}, |
| 94 | .oobfree = { |
| 95 | {.offset = 2, |
| 96 | .length = 78}} |
| 97 | }; |
| 98 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 99 | static int nand_get_device(struct nand_chip *chip, struct mtd_info *mtd, |
Thomas Gleixner | 2c0a2be | 2006-05-23 11:50:56 +0200 | [diff] [blame] | 100 | int new_state); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 101 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 102 | static int nand_do_write_oob(struct mtd_info *mtd, loff_t to, |
| 103 | struct mtd_oob_ops *ops); |
| 104 | |
Thomas Gleixner | d470a97 | 2006-05-23 23:48:57 +0200 | [diff] [blame] | 105 | /* |
Joe Perches | 8e87d78 | 2008-02-03 17:22:34 +0200 | [diff] [blame] | 106 | * For devices which display every fart in the system on a separate LED. Is |
Thomas Gleixner | d470a97 | 2006-05-23 23:48:57 +0200 | [diff] [blame] | 107 | * compiled away when LED support is disabled. |
| 108 | */ |
| 109 | DEFINE_LED_TRIGGER(nand_led_trigger); |
| 110 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 111 | /** |
| 112 | * nand_release_device - [GENERIC] release chip |
| 113 | * @mtd: MTD device structure |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 114 | * |
| 115 | * Deselect, release chip lock and wake up anyone waiting on the device |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 116 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 117 | static void nand_release_device(struct mtd_info *mtd) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 118 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 119 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 120 | |
| 121 | /* De-select the NAND device */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 122 | chip->select_chip(mtd, -1); |
Thomas Gleixner | 0dfc624 | 2005-05-31 20:39:20 +0100 | [diff] [blame] | 123 | |
Thomas Gleixner | a36ed29 | 2006-05-23 11:37:03 +0200 | [diff] [blame] | 124 | /* Release the controller and the chip */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 125 | spin_lock(&chip->controller->lock); |
| 126 | chip->controller->active = NULL; |
| 127 | chip->state = FL_READY; |
| 128 | wake_up(&chip->controller->wq); |
| 129 | spin_unlock(&chip->controller->lock); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 130 | } |
| 131 | |
| 132 | /** |
| 133 | * nand_read_byte - [DEFAULT] read one byte from the chip |
| 134 | * @mtd: MTD device structure |
| 135 | * |
| 136 | * Default read function for 8bit buswith |
| 137 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 138 | static uint8_t nand_read_byte(struct mtd_info *mtd) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 139 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 140 | struct nand_chip *chip = mtd->priv; |
| 141 | return readb(chip->IO_ADDR_R); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 142 | } |
| 143 | |
| 144 | /** |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 145 | * nand_read_byte16 - [DEFAULT] read one byte endianess aware from the chip |
| 146 | * @mtd: MTD device structure |
| 147 | * |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 148 | * Default read function for 16bit buswith with |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 149 | * endianess conversion |
| 150 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 151 | static uint8_t nand_read_byte16(struct mtd_info *mtd) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 152 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 153 | struct nand_chip *chip = mtd->priv; |
| 154 | return (uint8_t) cpu_to_le16(readw(chip->IO_ADDR_R)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 155 | } |
| 156 | |
| 157 | /** |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 158 | * nand_read_word - [DEFAULT] read one word from the chip |
| 159 | * @mtd: MTD device structure |
| 160 | * |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 161 | * Default read function for 16bit buswith without |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 162 | * endianess conversion |
| 163 | */ |
| 164 | static u16 nand_read_word(struct mtd_info *mtd) |
| 165 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 166 | struct nand_chip *chip = mtd->priv; |
| 167 | return readw(chip->IO_ADDR_R); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 168 | } |
| 169 | |
| 170 | /** |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 171 | * nand_select_chip - [DEFAULT] control CE line |
| 172 | * @mtd: MTD device structure |
Randy Dunlap | 844d3b4 | 2006-06-28 21:48:27 -0700 | [diff] [blame] | 173 | * @chipnr: chipnumber to select, -1 for deselect |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 174 | * |
| 175 | * Default select function for 1 chip devices. |
| 176 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 177 | static void nand_select_chip(struct mtd_info *mtd, int chipnr) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 178 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 179 | struct nand_chip *chip = mtd->priv; |
| 180 | |
| 181 | switch (chipnr) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 182 | case -1: |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 183 | chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0 | NAND_CTRL_CHANGE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 184 | break; |
| 185 | case 0: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 186 | break; |
| 187 | |
| 188 | default: |
| 189 | BUG(); |
| 190 | } |
| 191 | } |
| 192 | |
| 193 | /** |
| 194 | * nand_write_buf - [DEFAULT] write buffer to chip |
| 195 | * @mtd: MTD device structure |
| 196 | * @buf: data buffer |
| 197 | * @len: number of bytes to write |
| 198 | * |
| 199 | * Default write function for 8bit buswith |
| 200 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 201 | static void nand_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 202 | { |
| 203 | int i; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 204 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 205 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 206 | for (i = 0; i < len; i++) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 207 | writeb(buf[i], chip->IO_ADDR_W); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 208 | } |
| 209 | |
| 210 | /** |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 211 | * nand_read_buf - [DEFAULT] read chip data into buffer |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 212 | * @mtd: MTD device structure |
| 213 | * @buf: buffer to store date |
| 214 | * @len: number of bytes to read |
| 215 | * |
| 216 | * Default read function for 8bit buswith |
| 217 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 218 | static void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 219 | { |
| 220 | int i; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 221 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 222 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 223 | for (i = 0; i < len; i++) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 224 | buf[i] = readb(chip->IO_ADDR_R); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 225 | } |
| 226 | |
| 227 | /** |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 228 | * nand_verify_buf - [DEFAULT] Verify chip data against buffer |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 229 | * @mtd: MTD device structure |
| 230 | * @buf: buffer containing the data to compare |
| 231 | * @len: number of bytes to compare |
| 232 | * |
| 233 | * Default verify function for 8bit buswith |
| 234 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 235 | static int nand_verify_buf(struct mtd_info *mtd, const uint8_t *buf, int len) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 236 | { |
| 237 | int i; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 238 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 239 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 240 | for (i = 0; i < len; i++) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 241 | if (buf[i] != readb(chip->IO_ADDR_R)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 242 | return -EFAULT; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 243 | return 0; |
| 244 | } |
| 245 | |
| 246 | /** |
| 247 | * nand_write_buf16 - [DEFAULT] write buffer to chip |
| 248 | * @mtd: MTD device structure |
| 249 | * @buf: data buffer |
| 250 | * @len: number of bytes to write |
| 251 | * |
| 252 | * Default write function for 16bit buswith |
| 253 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 254 | static void nand_write_buf16(struct mtd_info *mtd, const uint8_t *buf, int len) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 255 | { |
| 256 | int i; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 257 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 258 | u16 *p = (u16 *) buf; |
| 259 | len >>= 1; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 260 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 261 | for (i = 0; i < len; i++) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 262 | writew(p[i], chip->IO_ADDR_W); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 263 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 264 | } |
| 265 | |
| 266 | /** |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 267 | * nand_read_buf16 - [DEFAULT] read chip data into buffer |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 268 | * @mtd: MTD device structure |
| 269 | * @buf: buffer to store date |
| 270 | * @len: number of bytes to read |
| 271 | * |
| 272 | * Default read function for 16bit buswith |
| 273 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 274 | static void nand_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 275 | { |
| 276 | int i; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 277 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 278 | u16 *p = (u16 *) buf; |
| 279 | len >>= 1; |
| 280 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 281 | for (i = 0; i < len; i++) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 282 | p[i] = readw(chip->IO_ADDR_R); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 283 | } |
| 284 | |
| 285 | /** |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 286 | * nand_verify_buf16 - [DEFAULT] Verify chip data against buffer |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 287 | * @mtd: MTD device structure |
| 288 | * @buf: buffer containing the data to compare |
| 289 | * @len: number of bytes to compare |
| 290 | * |
| 291 | * Default verify function for 16bit buswith |
| 292 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 293 | static int nand_verify_buf16(struct mtd_info *mtd, const uint8_t *buf, int len) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 294 | { |
| 295 | int i; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 296 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 297 | u16 *p = (u16 *) buf; |
| 298 | len >>= 1; |
| 299 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 300 | for (i = 0; i < len; i++) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 301 | if (p[i] != readw(chip->IO_ADDR_R)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 302 | return -EFAULT; |
| 303 | |
| 304 | return 0; |
| 305 | } |
| 306 | |
| 307 | /** |
| 308 | * nand_block_bad - [DEFAULT] Read bad block marker from the chip |
| 309 | * @mtd: MTD device structure |
| 310 | * @ofs: offset from device start |
| 311 | * @getchip: 0, if the chip is already selected |
| 312 | * |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 313 | * Check, if the block is bad. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 314 | */ |
| 315 | static int nand_block_bad(struct mtd_info *mtd, loff_t ofs, int getchip) |
| 316 | { |
| 317 | int page, chipnr, res = 0; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 318 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 319 | u16 bad; |
| 320 | |
Thomas Knobloch | 1a12f46 | 2007-05-03 07:39:37 +0100 | [diff] [blame] | 321 | page = (int)(ofs >> chip->page_shift) & chip->pagemask; |
| 322 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 323 | if (getchip) { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 324 | chipnr = (int)(ofs >> chip->chip_shift); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 325 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 326 | nand_get_device(chip, mtd, FL_READING); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 327 | |
| 328 | /* Select the NAND device */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 329 | chip->select_chip(mtd, chipnr); |
Thomas Knobloch | 1a12f46 | 2007-05-03 07:39:37 +0100 | [diff] [blame] | 330 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 331 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 332 | if (chip->options & NAND_BUSWIDTH_16) { |
| 333 | chip->cmdfunc(mtd, NAND_CMD_READOOB, chip->badblockpos & 0xFE, |
Thomas Knobloch | 1a12f46 | 2007-05-03 07:39:37 +0100 | [diff] [blame] | 334 | page); |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 335 | bad = cpu_to_le16(chip->read_word(mtd)); |
| 336 | if (chip->badblockpos & 0x1) |
Vitaly Wool | 49196f3 | 2005-11-02 16:54:46 +0000 | [diff] [blame] | 337 | bad >>= 8; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 338 | if ((bad & 0xFF) != 0xff) |
| 339 | res = 1; |
| 340 | } else { |
Thomas Knobloch | 1a12f46 | 2007-05-03 07:39:37 +0100 | [diff] [blame] | 341 | chip->cmdfunc(mtd, NAND_CMD_READOOB, chip->badblockpos, page); |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 342 | if (chip->read_byte(mtd) != 0xff) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 343 | res = 1; |
| 344 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 345 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 346 | if (getchip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 347 | nand_release_device(mtd); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 348 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 349 | return res; |
| 350 | } |
| 351 | |
| 352 | /** |
| 353 | * nand_default_block_markbad - [DEFAULT] mark a block bad |
| 354 | * @mtd: MTD device structure |
| 355 | * @ofs: offset from device start |
| 356 | * |
| 357 | * This is the default implementation, which can be overridden by |
| 358 | * a hardware specific driver. |
| 359 | */ |
| 360 | static int nand_default_block_markbad(struct mtd_info *mtd, loff_t ofs) |
| 361 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 362 | struct nand_chip *chip = mtd->priv; |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 363 | uint8_t buf[2] = { 0, 0 }; |
Thomas Gleixner | f1a28c0 | 2006-05-30 00:37:34 +0200 | [diff] [blame] | 364 | int block, ret; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 365 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 366 | /* Get block number */ |
Andre Renaud | 4226b51 | 2007-04-17 13:50:59 -0400 | [diff] [blame] | 367 | block = (int)(ofs >> chip->bbt_erase_shift); |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 368 | if (chip->bbt) |
| 369 | chip->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 370 | |
| 371 | /* Do we have a flash based bad block table ? */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 372 | if (chip->options & NAND_USE_FLASH_BBT) |
Thomas Gleixner | f1a28c0 | 2006-05-30 00:37:34 +0200 | [diff] [blame] | 373 | ret = nand_update_bbt(mtd, ofs); |
| 374 | else { |
| 375 | /* We write two bytes, so we dont have to mess with 16 bit |
| 376 | * access |
| 377 | */ |
Artem Bityutskiy | c0b8ba7 | 2007-07-23 16:06:50 +0300 | [diff] [blame] | 378 | nand_get_device(chip, mtd, FL_WRITING); |
Thomas Gleixner | f1a28c0 | 2006-05-30 00:37:34 +0200 | [diff] [blame] | 379 | ofs += mtd->oobsize; |
Ricard Wanderlöf | ff0dab6 | 2006-10-23 09:33:34 +0200 | [diff] [blame] | 380 | chip->ops.len = chip->ops.ooblen = 2; |
Thomas Gleixner | f1a28c0 | 2006-05-30 00:37:34 +0200 | [diff] [blame] | 381 | chip->ops.datbuf = NULL; |
| 382 | chip->ops.oobbuf = buf; |
| 383 | chip->ops.ooboffs = chip->badblockpos & ~0x01; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 384 | |
Thomas Gleixner | f1a28c0 | 2006-05-30 00:37:34 +0200 | [diff] [blame] | 385 | ret = nand_do_write_oob(mtd, ofs, &chip->ops); |
Artem Bityutskiy | c0b8ba7 | 2007-07-23 16:06:50 +0300 | [diff] [blame] | 386 | nand_release_device(mtd); |
Thomas Gleixner | f1a28c0 | 2006-05-30 00:37:34 +0200 | [diff] [blame] | 387 | } |
| 388 | if (!ret) |
| 389 | mtd->ecc_stats.badblocks++; |
Artem Bityutskiy | c0b8ba7 | 2007-07-23 16:06:50 +0300 | [diff] [blame] | 390 | |
Thomas Gleixner | f1a28c0 | 2006-05-30 00:37:34 +0200 | [diff] [blame] | 391 | return ret; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 392 | } |
| 393 | |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 394 | /** |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 395 | * nand_check_wp - [GENERIC] check if the chip is write protected |
| 396 | * @mtd: MTD device structure |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 397 | * Check, if the device is write protected |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 398 | * |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 399 | * The function expects, that the device is already selected |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 400 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 401 | static int nand_check_wp(struct mtd_info *mtd) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 402 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 403 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 404 | /* Check the WP bit */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 405 | chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1); |
| 406 | return (chip->read_byte(mtd) & NAND_STATUS_WP) ? 0 : 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 407 | } |
| 408 | |
| 409 | /** |
| 410 | * nand_block_checkbad - [GENERIC] Check if a block is marked bad |
| 411 | * @mtd: MTD device structure |
| 412 | * @ofs: offset from device start |
| 413 | * @getchip: 0, if the chip is already selected |
| 414 | * @allowbbt: 1, if its allowed to access the bbt area |
| 415 | * |
| 416 | * Check, if the block is bad. Either by reading the bad block table or |
| 417 | * calling of the scan function. |
| 418 | */ |
Thomas Gleixner | 2c0a2be | 2006-05-23 11:50:56 +0200 | [diff] [blame] | 419 | static int nand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip, |
| 420 | int allowbbt) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 421 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 422 | struct nand_chip *chip = mtd->priv; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 423 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 424 | if (!chip->bbt) |
| 425 | return chip->block_bad(mtd, ofs, getchip); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 426 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 427 | /* Return info from the table */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 428 | return nand_isbad_bbt(mtd, ofs, allowbbt); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 429 | } |
| 430 | |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 431 | /* |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 432 | * Wait for the ready pin, after a command |
| 433 | * The timeout is catched later. |
| 434 | */ |
David Woodhouse | 4b648b0 | 2006-09-25 17:05:24 +0100 | [diff] [blame] | 435 | void nand_wait_ready(struct mtd_info *mtd) |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 436 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 437 | struct nand_chip *chip = mtd->priv; |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 438 | unsigned long timeo = jiffies + 2; |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 439 | |
Richard Purdie | 8fe833c | 2006-03-31 02:31:14 -0800 | [diff] [blame] | 440 | led_trigger_event(nand_led_trigger, LED_FULL); |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 441 | /* wait until command is processed or timeout occures */ |
| 442 | do { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 443 | if (chip->dev_ready(mtd)) |
Richard Purdie | 8fe833c | 2006-03-31 02:31:14 -0800 | [diff] [blame] | 444 | break; |
Ingo Molnar | 8446f1d | 2005-09-06 15:16:27 -0700 | [diff] [blame] | 445 | touch_softlockup_watchdog(); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 446 | } while (time_before(jiffies, timeo)); |
Richard Purdie | 8fe833c | 2006-03-31 02:31:14 -0800 | [diff] [blame] | 447 | led_trigger_event(nand_led_trigger, LED_OFF); |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 448 | } |
David Woodhouse | 4b648b0 | 2006-09-25 17:05:24 +0100 | [diff] [blame] | 449 | EXPORT_SYMBOL_GPL(nand_wait_ready); |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 450 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 451 | /** |
| 452 | * nand_command - [DEFAULT] Send command to NAND device |
| 453 | * @mtd: MTD device structure |
| 454 | * @command: the command to be sent |
| 455 | * @column: the column address for this command, -1 if none |
| 456 | * @page_addr: the page address for this command, -1 if none |
| 457 | * |
| 458 | * Send command to NAND device. This function is used for small page |
| 459 | * devices (256/512 Bytes per page) |
| 460 | */ |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 461 | static void nand_command(struct mtd_info *mtd, unsigned int command, |
| 462 | int column, int page_addr) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 463 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 464 | register struct nand_chip *chip = mtd->priv; |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 465 | int ctrl = NAND_CTRL_CLE | NAND_CTRL_CHANGE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 466 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 467 | /* |
| 468 | * Write out the command to the device. |
| 469 | */ |
| 470 | if (command == NAND_CMD_SEQIN) { |
| 471 | int readcmd; |
| 472 | |
Joern Engel | 2831877 | 2006-05-22 23:18:05 +0200 | [diff] [blame] | 473 | if (column >= mtd->writesize) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 474 | /* OOB area */ |
Joern Engel | 2831877 | 2006-05-22 23:18:05 +0200 | [diff] [blame] | 475 | column -= mtd->writesize; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 476 | readcmd = NAND_CMD_READOOB; |
| 477 | } else if (column < 256) { |
| 478 | /* First 256 bytes --> READ0 */ |
| 479 | readcmd = NAND_CMD_READ0; |
| 480 | } else { |
| 481 | column -= 256; |
| 482 | readcmd = NAND_CMD_READ1; |
| 483 | } |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 484 | chip->cmd_ctrl(mtd, readcmd, ctrl); |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 485 | ctrl &= ~NAND_CTRL_CHANGE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 486 | } |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 487 | chip->cmd_ctrl(mtd, command, ctrl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 488 | |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 489 | /* |
| 490 | * Address cycle, when necessary |
| 491 | */ |
| 492 | ctrl = NAND_CTRL_ALE | NAND_CTRL_CHANGE; |
| 493 | /* Serially input address */ |
| 494 | if (column != -1) { |
| 495 | /* Adjust columns for 16 bit buswidth */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 496 | if (chip->options & NAND_BUSWIDTH_16) |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 497 | column >>= 1; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 498 | chip->cmd_ctrl(mtd, column, ctrl); |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 499 | ctrl &= ~NAND_CTRL_CHANGE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 500 | } |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 501 | if (page_addr != -1) { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 502 | chip->cmd_ctrl(mtd, page_addr, ctrl); |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 503 | ctrl &= ~NAND_CTRL_CHANGE; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 504 | chip->cmd_ctrl(mtd, page_addr >> 8, ctrl); |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 505 | /* One more address cycle for devices > 32MiB */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 506 | if (chip->chipsize > (32 << 20)) |
| 507 | chip->cmd_ctrl(mtd, page_addr >> 16, ctrl); |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 508 | } |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 509 | chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 510 | |
| 511 | /* |
| 512 | * program and erase have their own busy handlers |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 513 | * status and sequential in needs no delay |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 514 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 515 | switch (command) { |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 516 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 517 | case NAND_CMD_PAGEPROG: |
| 518 | case NAND_CMD_ERASE1: |
| 519 | case NAND_CMD_ERASE2: |
| 520 | case NAND_CMD_SEQIN: |
| 521 | case NAND_CMD_STATUS: |
| 522 | return; |
| 523 | |
| 524 | case NAND_CMD_RESET: |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 525 | if (chip->dev_ready) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 526 | break; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 527 | udelay(chip->chip_delay); |
| 528 | chip->cmd_ctrl(mtd, NAND_CMD_STATUS, |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 529 | NAND_CTRL_CLE | NAND_CTRL_CHANGE); |
Thomas Gleixner | 12efdde | 2006-05-24 22:57:09 +0200 | [diff] [blame] | 530 | chip->cmd_ctrl(mtd, |
| 531 | NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 532 | while (!(chip->read_byte(mtd) & NAND_STATUS_READY)) ; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 533 | return; |
| 534 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 535 | /* This applies to read commands */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 536 | default: |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 537 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 538 | * If we don't have access to the busy pin, we apply the given |
| 539 | * command delay |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 540 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 541 | if (!chip->dev_ready) { |
| 542 | udelay(chip->chip_delay); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 543 | return; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 544 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 545 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 546 | /* Apply this short delay always to ensure that we do wait tWB in |
| 547 | * any case on any machine. */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 548 | ndelay(100); |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 549 | |
| 550 | nand_wait_ready(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 551 | } |
| 552 | |
| 553 | /** |
| 554 | * nand_command_lp - [DEFAULT] Send command to NAND large page device |
| 555 | * @mtd: MTD device structure |
| 556 | * @command: the command to be sent |
| 557 | * @column: the column address for this command, -1 if none |
| 558 | * @page_addr: the page address for this command, -1 if none |
| 559 | * |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 560 | * Send command to NAND device. This is the version for the new large page |
| 561 | * devices We dont have the separate regions as we have in the small page |
| 562 | * devices. We must emulate NAND_CMD_READOOB to keep the code compatible. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 563 | */ |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 564 | static void nand_command_lp(struct mtd_info *mtd, unsigned int command, |
| 565 | int column, int page_addr) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 566 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 567 | register struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 568 | |
| 569 | /* Emulate NAND_CMD_READOOB */ |
| 570 | if (command == NAND_CMD_READOOB) { |
Joern Engel | 2831877 | 2006-05-22 23:18:05 +0200 | [diff] [blame] | 571 | column += mtd->writesize; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 572 | command = NAND_CMD_READ0; |
| 573 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 574 | |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 575 | /* Command latch cycle */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 576 | chip->cmd_ctrl(mtd, command & 0xff, |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 577 | NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 578 | |
| 579 | if (column != -1 || page_addr != -1) { |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 580 | int ctrl = NAND_CTRL_CHANGE | NAND_NCE | NAND_ALE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 581 | |
| 582 | /* Serially input address */ |
| 583 | if (column != -1) { |
| 584 | /* Adjust columns for 16 bit buswidth */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 585 | if (chip->options & NAND_BUSWIDTH_16) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 586 | column >>= 1; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 587 | chip->cmd_ctrl(mtd, column, ctrl); |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 588 | ctrl &= ~NAND_CTRL_CHANGE; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 589 | chip->cmd_ctrl(mtd, column >> 8, ctrl); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 590 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 591 | if (page_addr != -1) { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 592 | chip->cmd_ctrl(mtd, page_addr, ctrl); |
| 593 | chip->cmd_ctrl(mtd, page_addr >> 8, |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 594 | NAND_NCE | NAND_ALE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 595 | /* One more address cycle for devices > 128MiB */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 596 | if (chip->chipsize > (128 << 20)) |
| 597 | chip->cmd_ctrl(mtd, page_addr >> 16, |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 598 | NAND_NCE | NAND_ALE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 599 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 600 | } |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 601 | chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 602 | |
| 603 | /* |
| 604 | * program and erase have their own busy handlers |
David A. Marlin | 30f464b | 2005-01-17 18:35:25 +0000 | [diff] [blame] | 605 | * status, sequential in, and deplete1 need no delay |
| 606 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 607 | switch (command) { |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 608 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 609 | case NAND_CMD_CACHEDPROG: |
| 610 | case NAND_CMD_PAGEPROG: |
| 611 | case NAND_CMD_ERASE1: |
| 612 | case NAND_CMD_ERASE2: |
| 613 | case NAND_CMD_SEQIN: |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 614 | case NAND_CMD_RNDIN: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 615 | case NAND_CMD_STATUS: |
David A. Marlin | 30f464b | 2005-01-17 18:35:25 +0000 | [diff] [blame] | 616 | case NAND_CMD_DEPLETE1: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 617 | return; |
| 618 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 619 | /* |
| 620 | * read error status commands require only a short delay |
| 621 | */ |
David A. Marlin | 30f464b | 2005-01-17 18:35:25 +0000 | [diff] [blame] | 622 | case NAND_CMD_STATUS_ERROR: |
| 623 | case NAND_CMD_STATUS_ERROR0: |
| 624 | case NAND_CMD_STATUS_ERROR1: |
| 625 | case NAND_CMD_STATUS_ERROR2: |
| 626 | case NAND_CMD_STATUS_ERROR3: |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 627 | udelay(chip->chip_delay); |
David A. Marlin | 30f464b | 2005-01-17 18:35:25 +0000 | [diff] [blame] | 628 | return; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 629 | |
| 630 | case NAND_CMD_RESET: |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 631 | if (chip->dev_ready) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 632 | break; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 633 | udelay(chip->chip_delay); |
Thomas Gleixner | 12efdde | 2006-05-24 22:57:09 +0200 | [diff] [blame] | 634 | chip->cmd_ctrl(mtd, NAND_CMD_STATUS, |
| 635 | NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE); |
| 636 | chip->cmd_ctrl(mtd, NAND_CMD_NONE, |
| 637 | NAND_NCE | NAND_CTRL_CHANGE); |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 638 | while (!(chip->read_byte(mtd) & NAND_STATUS_READY)) ; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 639 | return; |
| 640 | |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 641 | case NAND_CMD_RNDOUT: |
| 642 | /* No ready / busy check necessary */ |
| 643 | chip->cmd_ctrl(mtd, NAND_CMD_RNDOUTSTART, |
| 644 | NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE); |
| 645 | chip->cmd_ctrl(mtd, NAND_CMD_NONE, |
| 646 | NAND_NCE | NAND_CTRL_CHANGE); |
| 647 | return; |
| 648 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 649 | case NAND_CMD_READ0: |
Thomas Gleixner | 12efdde | 2006-05-24 22:57:09 +0200 | [diff] [blame] | 650 | chip->cmd_ctrl(mtd, NAND_CMD_READSTART, |
| 651 | NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE); |
| 652 | chip->cmd_ctrl(mtd, NAND_CMD_NONE, |
| 653 | NAND_NCE | NAND_CTRL_CHANGE); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 654 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 655 | /* This applies to read commands */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 656 | default: |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 657 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 658 | * If we don't have access to the busy pin, we apply the given |
| 659 | * command delay |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 660 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 661 | if (!chip->dev_ready) { |
| 662 | udelay(chip->chip_delay); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 663 | return; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 664 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 665 | } |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 666 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 667 | /* Apply this short delay always to ensure that we do wait tWB in |
| 668 | * any case on any machine. */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 669 | ndelay(100); |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 670 | |
| 671 | nand_wait_ready(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 672 | } |
| 673 | |
| 674 | /** |
| 675 | * nand_get_device - [GENERIC] Get chip for selected access |
Randy Dunlap | 844d3b4 | 2006-06-28 21:48:27 -0700 | [diff] [blame] | 676 | * @chip: the nand chip descriptor |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 677 | * @mtd: MTD device structure |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 678 | * @new_state: the state which is requested |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 679 | * |
| 680 | * Get the device and lock it for exclusive access |
| 681 | */ |
Thomas Gleixner | 2c0a2be | 2006-05-23 11:50:56 +0200 | [diff] [blame] | 682 | static int |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 683 | nand_get_device(struct nand_chip *chip, struct mtd_info *mtd, int new_state) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 684 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 685 | spinlock_t *lock = &chip->controller->lock; |
| 686 | wait_queue_head_t *wq = &chip->controller->wq; |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 687 | DECLARE_WAITQUEUE(wait, current); |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 688 | retry: |
Thomas Gleixner | 0dfc624 | 2005-05-31 20:39:20 +0100 | [diff] [blame] | 689 | spin_lock(lock); |
| 690 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 691 | /* Hardware controller shared among independend devices */ |
Thomas Gleixner | a36ed29 | 2006-05-23 11:37:03 +0200 | [diff] [blame] | 692 | /* Hardware controller shared among independend devices */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 693 | if (!chip->controller->active) |
| 694 | chip->controller->active = chip; |
Thomas Gleixner | a36ed29 | 2006-05-23 11:37:03 +0200 | [diff] [blame] | 695 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 696 | if (chip->controller->active == chip && chip->state == FL_READY) { |
| 697 | chip->state = new_state; |
Thomas Gleixner | 0dfc624 | 2005-05-31 20:39:20 +0100 | [diff] [blame] | 698 | spin_unlock(lock); |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 699 | return 0; |
| 700 | } |
| 701 | if (new_state == FL_PM_SUSPENDED) { |
| 702 | spin_unlock(lock); |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 703 | return (chip->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN; |
Thomas Gleixner | 0dfc624 | 2005-05-31 20:39:20 +0100 | [diff] [blame] | 704 | } |
| 705 | set_current_state(TASK_UNINTERRUPTIBLE); |
| 706 | add_wait_queue(wq, &wait); |
| 707 | spin_unlock(lock); |
| 708 | schedule(); |
| 709 | remove_wait_queue(wq, &wait); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 710 | goto retry; |
| 711 | } |
| 712 | |
| 713 | /** |
| 714 | * nand_wait - [DEFAULT] wait until the command is done |
| 715 | * @mtd: MTD device structure |
Randy Dunlap | 844d3b4 | 2006-06-28 21:48:27 -0700 | [diff] [blame] | 716 | * @chip: NAND chip structure |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 717 | * |
| 718 | * Wait for command done. This applies to erase and program only |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 719 | * Erase can take up to 400ms and program up to 20ms according to |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 720 | * general NAND and SmartMedia specs |
Randy Dunlap | 844d3b4 | 2006-06-28 21:48:27 -0700 | [diff] [blame] | 721 | */ |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 722 | static int nand_wait(struct mtd_info *mtd, struct nand_chip *chip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 723 | { |
| 724 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 725 | unsigned long timeo = jiffies; |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 726 | int status, state = chip->state; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 727 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 728 | if (state == FL_ERASING) |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 729 | timeo += (HZ * 400) / 1000; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 730 | else |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 731 | timeo += (HZ * 20) / 1000; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 732 | |
Richard Purdie | 8fe833c | 2006-03-31 02:31:14 -0800 | [diff] [blame] | 733 | led_trigger_event(nand_led_trigger, LED_FULL); |
| 734 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 735 | /* Apply this short delay always to ensure that we do wait tWB in |
| 736 | * any case on any machine. */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 737 | ndelay(100); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 738 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 739 | if ((state == FL_ERASING) && (chip->options & NAND_IS_AND)) |
| 740 | chip->cmdfunc(mtd, NAND_CMD_STATUS_MULTI, -1, -1); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 741 | else |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 742 | chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 743 | |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 744 | while (time_before(jiffies, timeo)) { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 745 | if (chip->dev_ready) { |
| 746 | if (chip->dev_ready(mtd)) |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 747 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 748 | } else { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 749 | if (chip->read_byte(mtd) & NAND_STATUS_READY) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 750 | break; |
| 751 | } |
Thomas Gleixner | 20a6c21 | 2005-03-01 09:32:48 +0000 | [diff] [blame] | 752 | cond_resched(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 753 | } |
Richard Purdie | 8fe833c | 2006-03-31 02:31:14 -0800 | [diff] [blame] | 754 | led_trigger_event(nand_led_trigger, LED_OFF); |
| 755 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 756 | status = (int)chip->read_byte(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 757 | return status; |
| 758 | } |
| 759 | |
| 760 | /** |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 761 | * nand_read_page_raw - [Intern] read raw page data without ecc |
| 762 | * @mtd: mtd info structure |
| 763 | * @chip: nand chip info structure |
| 764 | * @buf: buffer to store read data |
David Brownell | 52ff49d | 2009-03-04 12:01:36 -0800 | [diff] [blame] | 765 | * |
| 766 | * Not for syndrome calculating ecc controllers, which use a special oob layout |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 767 | */ |
| 768 | static int nand_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip, |
| 769 | uint8_t *buf) |
| 770 | { |
| 771 | chip->read_buf(mtd, buf, mtd->writesize); |
| 772 | chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); |
| 773 | return 0; |
| 774 | } |
| 775 | |
| 776 | /** |
David Brownell | 52ff49d | 2009-03-04 12:01:36 -0800 | [diff] [blame] | 777 | * nand_read_page_raw_syndrome - [Intern] read raw page data without ecc |
| 778 | * @mtd: mtd info structure |
| 779 | * @chip: nand chip info structure |
| 780 | * @buf: buffer to store read data |
| 781 | * |
| 782 | * We need a special oob layout and handling even when OOB isn't used. |
| 783 | */ |
| 784 | static int nand_read_page_raw_syndrome(struct mtd_info *mtd, struct nand_chip *chip, |
| 785 | uint8_t *buf) |
| 786 | { |
| 787 | int eccsize = chip->ecc.size; |
| 788 | int eccbytes = chip->ecc.bytes; |
| 789 | uint8_t *oob = chip->oob_poi; |
| 790 | int steps, size; |
| 791 | |
| 792 | for (steps = chip->ecc.steps; steps > 0; steps--) { |
| 793 | chip->read_buf(mtd, buf, eccsize); |
| 794 | buf += eccsize; |
| 795 | |
| 796 | if (chip->ecc.prepad) { |
| 797 | chip->read_buf(mtd, oob, chip->ecc.prepad); |
| 798 | oob += chip->ecc.prepad; |
| 799 | } |
| 800 | |
| 801 | chip->read_buf(mtd, oob, eccbytes); |
| 802 | oob += eccbytes; |
| 803 | |
| 804 | if (chip->ecc.postpad) { |
| 805 | chip->read_buf(mtd, oob, chip->ecc.postpad); |
| 806 | oob += chip->ecc.postpad; |
| 807 | } |
| 808 | } |
| 809 | |
| 810 | size = mtd->oobsize - (oob - chip->oob_poi); |
| 811 | if (size) |
| 812 | chip->read_buf(mtd, oob, size); |
| 813 | |
| 814 | return 0; |
| 815 | } |
| 816 | |
| 817 | /** |
Artem Bityutskiy | d29ebdb | 2006-10-19 16:04:02 +0300 | [diff] [blame] | 818 | * nand_read_page_swecc - [REPLACABLE] software ecc based page read function |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 819 | * @mtd: mtd info structure |
| 820 | * @chip: nand chip info structure |
| 821 | * @buf: buffer to store read data |
David A. Marlin | 068e3c0 | 2005-01-24 03:07:46 +0000 | [diff] [blame] | 822 | */ |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 823 | static int nand_read_page_swecc(struct mtd_info *mtd, struct nand_chip *chip, |
| 824 | uint8_t *buf) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 825 | { |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 826 | int i, eccsize = chip->ecc.size; |
| 827 | int eccbytes = chip->ecc.bytes; |
| 828 | int eccsteps = chip->ecc.steps; |
| 829 | uint8_t *p = buf; |
David Woodhouse | 4bf63fc | 2006-09-25 17:08:04 +0100 | [diff] [blame] | 830 | uint8_t *ecc_calc = chip->buffers->ecccalc; |
| 831 | uint8_t *ecc_code = chip->buffers->ecccode; |
Ben Dooks | 8b099a3 | 2007-05-28 19:17:54 +0100 | [diff] [blame] | 832 | uint32_t *eccpos = chip->ecc.layout->eccpos; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 833 | |
Thomas Gleixner | 90424de | 2007-04-05 11:44:05 +0200 | [diff] [blame] | 834 | chip->ecc.read_page_raw(mtd, chip, buf); |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 835 | |
| 836 | for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) |
| 837 | chip->ecc.calculate(mtd, p, &ecc_calc[i]); |
| 838 | |
| 839 | for (i = 0; i < chip->ecc.total; i++) |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 840 | ecc_code[i] = chip->oob_poi[eccpos[i]]; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 841 | |
| 842 | eccsteps = chip->ecc.steps; |
| 843 | p = buf; |
| 844 | |
| 845 | for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { |
| 846 | int stat; |
| 847 | |
| 848 | stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]); |
Matt Reimer | c32b8dc | 2007-10-17 14:33:23 -0700 | [diff] [blame] | 849 | if (stat < 0) |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 850 | mtd->ecc_stats.failed++; |
| 851 | else |
| 852 | mtd->ecc_stats.corrected += stat; |
| 853 | } |
| 854 | return 0; |
Thomas Gleixner | 22c60f5 | 2005-04-04 19:56:32 +0100 | [diff] [blame] | 855 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 856 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 857 | /** |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 858 | * nand_read_subpage - [REPLACABLE] software ecc based sub-page read function |
| 859 | * @mtd: mtd info structure |
| 860 | * @chip: nand chip info structure |
Alexey Korolev | 17c1d2b | 2008-08-20 22:32:08 +0100 | [diff] [blame] | 861 | * @data_offs: offset of requested data within the page |
| 862 | * @readlen: data length |
| 863 | * @bufpoi: buffer to store read data |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 864 | */ |
| 865 | static int nand_read_subpage(struct mtd_info *mtd, struct nand_chip *chip, uint32_t data_offs, uint32_t readlen, uint8_t *bufpoi) |
| 866 | { |
| 867 | int start_step, end_step, num_steps; |
| 868 | uint32_t *eccpos = chip->ecc.layout->eccpos; |
| 869 | uint8_t *p; |
| 870 | int data_col_addr, i, gaps = 0; |
| 871 | int datafrag_len, eccfrag_len, aligned_len, aligned_pos; |
| 872 | int busw = (chip->options & NAND_BUSWIDTH_16) ? 2 : 1; |
| 873 | |
| 874 | /* Column address wihin the page aligned to ECC size (256bytes). */ |
| 875 | start_step = data_offs / chip->ecc.size; |
| 876 | end_step = (data_offs + readlen - 1) / chip->ecc.size; |
| 877 | num_steps = end_step - start_step + 1; |
| 878 | |
| 879 | /* Data size aligned to ECC ecc.size*/ |
| 880 | datafrag_len = num_steps * chip->ecc.size; |
| 881 | eccfrag_len = num_steps * chip->ecc.bytes; |
| 882 | |
| 883 | data_col_addr = start_step * chip->ecc.size; |
| 884 | /* If we read not a page aligned data */ |
| 885 | if (data_col_addr != 0) |
| 886 | chip->cmdfunc(mtd, NAND_CMD_RNDOUT, data_col_addr, -1); |
| 887 | |
| 888 | p = bufpoi + data_col_addr; |
| 889 | chip->read_buf(mtd, p, datafrag_len); |
| 890 | |
| 891 | /* Calculate ECC */ |
| 892 | for (i = 0; i < eccfrag_len ; i += chip->ecc.bytes, p += chip->ecc.size) |
| 893 | chip->ecc.calculate(mtd, p, &chip->buffers->ecccalc[i]); |
| 894 | |
| 895 | /* The performance is faster if to position offsets |
| 896 | according to ecc.pos. Let make sure here that |
| 897 | there are no gaps in ecc positions */ |
| 898 | for (i = 0; i < eccfrag_len - 1; i++) { |
| 899 | if (eccpos[i + start_step * chip->ecc.bytes] + 1 != |
| 900 | eccpos[i + start_step * chip->ecc.bytes + 1]) { |
| 901 | gaps = 1; |
| 902 | break; |
| 903 | } |
| 904 | } |
| 905 | if (gaps) { |
| 906 | chip->cmdfunc(mtd, NAND_CMD_RNDOUT, mtd->writesize, -1); |
| 907 | chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); |
| 908 | } else { |
| 909 | /* send the command to read the particular ecc bytes */ |
| 910 | /* take care about buswidth alignment in read_buf */ |
| 911 | aligned_pos = eccpos[start_step * chip->ecc.bytes] & ~(busw - 1); |
| 912 | aligned_len = eccfrag_len; |
| 913 | if (eccpos[start_step * chip->ecc.bytes] & (busw - 1)) |
| 914 | aligned_len++; |
| 915 | if (eccpos[(start_step + num_steps) * chip->ecc.bytes] & (busw - 1)) |
| 916 | aligned_len++; |
| 917 | |
| 918 | chip->cmdfunc(mtd, NAND_CMD_RNDOUT, mtd->writesize + aligned_pos, -1); |
| 919 | chip->read_buf(mtd, &chip->oob_poi[aligned_pos], aligned_len); |
| 920 | } |
| 921 | |
| 922 | for (i = 0; i < eccfrag_len; i++) |
| 923 | chip->buffers->ecccode[i] = chip->oob_poi[eccpos[i + start_step * chip->ecc.bytes]]; |
| 924 | |
| 925 | p = bufpoi + data_col_addr; |
| 926 | for (i = 0; i < eccfrag_len ; i += chip->ecc.bytes, p += chip->ecc.size) { |
| 927 | int stat; |
| 928 | |
| 929 | stat = chip->ecc.correct(mtd, p, &chip->buffers->ecccode[i], &chip->buffers->ecccalc[i]); |
| 930 | if (stat == -1) |
| 931 | mtd->ecc_stats.failed++; |
| 932 | else |
| 933 | mtd->ecc_stats.corrected += stat; |
| 934 | } |
| 935 | return 0; |
| 936 | } |
| 937 | |
| 938 | /** |
Artem Bityutskiy | d29ebdb | 2006-10-19 16:04:02 +0300 | [diff] [blame] | 939 | * nand_read_page_hwecc - [REPLACABLE] hardware ecc based page read function |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 940 | * @mtd: mtd info structure |
| 941 | * @chip: nand chip info structure |
| 942 | * @buf: buffer to store read data |
| 943 | * |
| 944 | * Not for syndrome calculating ecc controllers which need a special oob layout |
| 945 | */ |
| 946 | static int nand_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip, |
| 947 | uint8_t *buf) |
| 948 | { |
| 949 | int i, eccsize = chip->ecc.size; |
| 950 | int eccbytes = chip->ecc.bytes; |
| 951 | int eccsteps = chip->ecc.steps; |
| 952 | uint8_t *p = buf; |
David Woodhouse | 4bf63fc | 2006-09-25 17:08:04 +0100 | [diff] [blame] | 953 | uint8_t *ecc_calc = chip->buffers->ecccalc; |
| 954 | uint8_t *ecc_code = chip->buffers->ecccode; |
Ben Dooks | 8b099a3 | 2007-05-28 19:17:54 +0100 | [diff] [blame] | 955 | uint32_t *eccpos = chip->ecc.layout->eccpos; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 956 | |
| 957 | for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { |
| 958 | chip->ecc.hwctl(mtd, NAND_ECC_READ); |
| 959 | chip->read_buf(mtd, p, eccsize); |
| 960 | chip->ecc.calculate(mtd, p, &ecc_calc[i]); |
| 961 | } |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 962 | chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 963 | |
| 964 | for (i = 0; i < chip->ecc.total; i++) |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 965 | ecc_code[i] = chip->oob_poi[eccpos[i]]; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 966 | |
| 967 | eccsteps = chip->ecc.steps; |
| 968 | p = buf; |
| 969 | |
| 970 | for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { |
| 971 | int stat; |
| 972 | |
| 973 | stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]); |
Matt Reimer | c32b8dc | 2007-10-17 14:33:23 -0700 | [diff] [blame] | 974 | if (stat < 0) |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 975 | mtd->ecc_stats.failed++; |
| 976 | else |
| 977 | mtd->ecc_stats.corrected += stat; |
| 978 | } |
| 979 | return 0; |
| 980 | } |
| 981 | |
| 982 | /** |
Artem Bityutskiy | d29ebdb | 2006-10-19 16:04:02 +0300 | [diff] [blame] | 983 | * nand_read_page_syndrome - [REPLACABLE] hardware ecc syndrom based page read |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 984 | * @mtd: mtd info structure |
| 985 | * @chip: nand chip info structure |
| 986 | * @buf: buffer to store read data |
| 987 | * |
| 988 | * The hw generator calculates the error syndrome automatically. Therefor |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 989 | * we need a special oob layout and handling. |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 990 | */ |
| 991 | static int nand_read_page_syndrome(struct mtd_info *mtd, struct nand_chip *chip, |
| 992 | uint8_t *buf) |
| 993 | { |
| 994 | int i, eccsize = chip->ecc.size; |
| 995 | int eccbytes = chip->ecc.bytes; |
| 996 | int eccsteps = chip->ecc.steps; |
| 997 | uint8_t *p = buf; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 998 | uint8_t *oob = chip->oob_poi; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 999 | |
| 1000 | for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { |
| 1001 | int stat; |
| 1002 | |
| 1003 | chip->ecc.hwctl(mtd, NAND_ECC_READ); |
| 1004 | chip->read_buf(mtd, p, eccsize); |
| 1005 | |
| 1006 | if (chip->ecc.prepad) { |
| 1007 | chip->read_buf(mtd, oob, chip->ecc.prepad); |
| 1008 | oob += chip->ecc.prepad; |
| 1009 | } |
| 1010 | |
| 1011 | chip->ecc.hwctl(mtd, NAND_ECC_READSYN); |
| 1012 | chip->read_buf(mtd, oob, eccbytes); |
| 1013 | stat = chip->ecc.correct(mtd, p, oob, NULL); |
| 1014 | |
Matt Reimer | c32b8dc | 2007-10-17 14:33:23 -0700 | [diff] [blame] | 1015 | if (stat < 0) |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1016 | mtd->ecc_stats.failed++; |
| 1017 | else |
| 1018 | mtd->ecc_stats.corrected += stat; |
| 1019 | |
| 1020 | oob += eccbytes; |
| 1021 | |
| 1022 | if (chip->ecc.postpad) { |
| 1023 | chip->read_buf(mtd, oob, chip->ecc.postpad); |
| 1024 | oob += chip->ecc.postpad; |
| 1025 | } |
| 1026 | } |
| 1027 | |
| 1028 | /* Calculate remaining oob bytes */ |
Vitaly Wool | 7e4178f | 2006-06-07 09:34:37 +0400 | [diff] [blame] | 1029 | i = mtd->oobsize - (oob - chip->oob_poi); |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1030 | if (i) |
| 1031 | chip->read_buf(mtd, oob, i); |
| 1032 | |
| 1033 | return 0; |
| 1034 | } |
| 1035 | |
| 1036 | /** |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1037 | * nand_transfer_oob - [Internal] Transfer oob to client buffer |
| 1038 | * @chip: nand chip structure |
Randy Dunlap | 844d3b4 | 2006-06-28 21:48:27 -0700 | [diff] [blame] | 1039 | * @oob: oob destination address |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1040 | * @ops: oob ops structure |
Vitaly Wool | 7014568 | 2006-11-03 18:20:38 +0300 | [diff] [blame] | 1041 | * @len: size of oob to transfer |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1042 | */ |
| 1043 | static uint8_t *nand_transfer_oob(struct nand_chip *chip, uint8_t *oob, |
Vitaly Wool | 7014568 | 2006-11-03 18:20:38 +0300 | [diff] [blame] | 1044 | struct mtd_oob_ops *ops, size_t len) |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1045 | { |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1046 | switch(ops->mode) { |
| 1047 | |
| 1048 | case MTD_OOB_PLACE: |
| 1049 | case MTD_OOB_RAW: |
| 1050 | memcpy(oob, chip->oob_poi + ops->ooboffs, len); |
| 1051 | return oob + len; |
| 1052 | |
| 1053 | case MTD_OOB_AUTO: { |
| 1054 | struct nand_oobfree *free = chip->ecc.layout->oobfree; |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1055 | uint32_t boffs = 0, roffs = ops->ooboffs; |
| 1056 | size_t bytes = 0; |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1057 | |
| 1058 | for(; free->length && len; free++, len -= bytes) { |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1059 | /* Read request not from offset 0 ? */ |
| 1060 | if (unlikely(roffs)) { |
| 1061 | if (roffs >= free->length) { |
| 1062 | roffs -= free->length; |
| 1063 | continue; |
| 1064 | } |
| 1065 | boffs = free->offset + roffs; |
| 1066 | bytes = min_t(size_t, len, |
| 1067 | (free->length - roffs)); |
| 1068 | roffs = 0; |
| 1069 | } else { |
| 1070 | bytes = min_t(size_t, len, free->length); |
| 1071 | boffs = free->offset; |
| 1072 | } |
| 1073 | memcpy(oob, chip->oob_poi + boffs, bytes); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1074 | oob += bytes; |
| 1075 | } |
| 1076 | return oob; |
| 1077 | } |
| 1078 | default: |
| 1079 | BUG(); |
| 1080 | } |
| 1081 | return NULL; |
| 1082 | } |
| 1083 | |
| 1084 | /** |
| 1085 | * nand_do_read_ops - [Internal] Read data with ECC |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1086 | * |
David A. Marlin | 068e3c0 | 2005-01-24 03:07:46 +0000 | [diff] [blame] | 1087 | * @mtd: MTD device structure |
| 1088 | * @from: offset to read from |
Randy Dunlap | 844d3b4 | 2006-06-28 21:48:27 -0700 | [diff] [blame] | 1089 | * @ops: oob ops structure |
David A. Marlin | 068e3c0 | 2005-01-24 03:07:46 +0000 | [diff] [blame] | 1090 | * |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1091 | * Internal function. Called with chip held. |
David A. Marlin | 068e3c0 | 2005-01-24 03:07:46 +0000 | [diff] [blame] | 1092 | */ |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1093 | static int nand_do_read_ops(struct mtd_info *mtd, loff_t from, |
| 1094 | struct mtd_oob_ops *ops) |
David A. Marlin | 068e3c0 | 2005-01-24 03:07:46 +0000 | [diff] [blame] | 1095 | { |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1096 | int chipnr, page, realpage, col, bytes, aligned; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1097 | struct nand_chip *chip = mtd->priv; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1098 | struct mtd_ecc_stats stats; |
| 1099 | int blkcheck = (1 << (chip->phys_erase_shift - chip->page_shift)) - 1; |
| 1100 | int sndcmd = 1; |
| 1101 | int ret = 0; |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1102 | uint32_t readlen = ops->len; |
Vitaly Wool | 7014568 | 2006-11-03 18:20:38 +0300 | [diff] [blame] | 1103 | uint32_t oobreadlen = ops->ooblen; |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1104 | uint8_t *bufpoi, *oob, *buf; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1105 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1106 | stats = mtd->ecc_stats; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1107 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1108 | chipnr = (int)(from >> chip->chip_shift); |
| 1109 | chip->select_chip(mtd, chipnr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1110 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1111 | realpage = (int)(from >> chip->page_shift); |
| 1112 | page = realpage & chip->pagemask; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1113 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1114 | col = (int)(from & (mtd->writesize - 1)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1115 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1116 | buf = ops->datbuf; |
| 1117 | oob = ops->oobbuf; |
| 1118 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1119 | while(1) { |
| 1120 | bytes = min(mtd->writesize - col, readlen); |
| 1121 | aligned = (bytes == mtd->writesize); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1122 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1123 | /* Is the current page in the buffer ? */ |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1124 | if (realpage != chip->pagebuf || oob) { |
David Woodhouse | 4bf63fc | 2006-09-25 17:08:04 +0100 | [diff] [blame] | 1125 | bufpoi = aligned ? buf : chip->buffers->databuf; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1126 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1127 | if (likely(sndcmd)) { |
| 1128 | chip->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page); |
| 1129 | sndcmd = 0; |
| 1130 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1131 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1132 | /* Now read the page into the buffer */ |
David Woodhouse | 956e944 | 2006-09-25 17:12:39 +0100 | [diff] [blame] | 1133 | if (unlikely(ops->mode == MTD_OOB_RAW)) |
| 1134 | ret = chip->ecc.read_page_raw(mtd, chip, bufpoi); |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1135 | else if (!aligned && NAND_SUBPAGE_READ(chip) && !oob) |
| 1136 | ret = chip->ecc.read_subpage(mtd, chip, col, bytes, bufpoi); |
David Woodhouse | 956e944 | 2006-09-25 17:12:39 +0100 | [diff] [blame] | 1137 | else |
| 1138 | ret = chip->ecc.read_page(mtd, chip, bufpoi); |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1139 | if (ret < 0) |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1140 | break; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1141 | |
| 1142 | /* Transfer not aligned data */ |
| 1143 | if (!aligned) { |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1144 | if (!NAND_SUBPAGE_READ(chip) && !oob) |
| 1145 | chip->pagebuf = realpage; |
David Woodhouse | 4bf63fc | 2006-09-25 17:08:04 +0100 | [diff] [blame] | 1146 | memcpy(buf, chip->buffers->databuf + col, bytes); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1147 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1148 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1149 | buf += bytes; |
| 1150 | |
| 1151 | if (unlikely(oob)) { |
| 1152 | /* Raw mode does data:oob:data:oob */ |
Vitaly Wool | 7014568 | 2006-11-03 18:20:38 +0300 | [diff] [blame] | 1153 | if (ops->mode != MTD_OOB_RAW) { |
| 1154 | int toread = min(oobreadlen, |
| 1155 | chip->ecc.layout->oobavail); |
| 1156 | if (toread) { |
| 1157 | oob = nand_transfer_oob(chip, |
| 1158 | oob, ops, toread); |
| 1159 | oobreadlen -= toread; |
| 1160 | } |
| 1161 | } else |
| 1162 | buf = nand_transfer_oob(chip, |
| 1163 | buf, ops, mtd->oobsize); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1164 | } |
| 1165 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1166 | if (!(chip->options & NAND_NO_READRDY)) { |
| 1167 | /* |
| 1168 | * Apply delay or wait for ready/busy pin. Do |
| 1169 | * this before the AUTOINCR check, so no |
| 1170 | * problems arise if a chip which does auto |
| 1171 | * increment is marked as NOAUTOINCR by the |
| 1172 | * board driver. |
| 1173 | */ |
| 1174 | if (!chip->dev_ready) |
| 1175 | udelay(chip->chip_delay); |
| 1176 | else |
| 1177 | nand_wait_ready(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1178 | } |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1179 | } else { |
David Woodhouse | 4bf63fc | 2006-09-25 17:08:04 +0100 | [diff] [blame] | 1180 | memcpy(buf, chip->buffers->databuf + col, bytes); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1181 | buf += bytes; |
| 1182 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1183 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1184 | readlen -= bytes; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1185 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1186 | if (!readlen) |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1187 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1188 | |
| 1189 | /* For subsequent reads align to page boundary. */ |
| 1190 | col = 0; |
| 1191 | /* Increment page address */ |
| 1192 | realpage++; |
| 1193 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1194 | page = realpage & chip->pagemask; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1195 | /* Check, if we cross a chip boundary */ |
| 1196 | if (!page) { |
| 1197 | chipnr++; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1198 | chip->select_chip(mtd, -1); |
| 1199 | chip->select_chip(mtd, chipnr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1200 | } |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1201 | |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1202 | /* Check, if the chip supports auto page increment |
| 1203 | * or if we have hit a block boundary. |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1204 | */ |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1205 | if (!NAND_CANAUTOINCR(chip) || !(page & blkcheck)) |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1206 | sndcmd = 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1207 | } |
| 1208 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1209 | ops->retlen = ops->len - (size_t) readlen; |
Vitaly Wool | 7014568 | 2006-11-03 18:20:38 +0300 | [diff] [blame] | 1210 | if (oob) |
| 1211 | ops->oobretlen = ops->ooblen - oobreadlen; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1212 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1213 | if (ret) |
| 1214 | return ret; |
| 1215 | |
Thomas Gleixner | 9a1fcdf | 2006-05-29 14:56:39 +0200 | [diff] [blame] | 1216 | if (mtd->ecc_stats.failed - stats.failed) |
| 1217 | return -EBADMSG; |
| 1218 | |
| 1219 | return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1220 | } |
| 1221 | |
| 1222 | /** |
| 1223 | * nand_read - [MTD Interface] MTD compability function for nand_do_read_ecc |
| 1224 | * @mtd: MTD device structure |
| 1225 | * @from: offset to read from |
| 1226 | * @len: number of bytes to read |
| 1227 | * @retlen: pointer to variable to store the number of read bytes |
| 1228 | * @buf: the databuffer to put data |
| 1229 | * |
| 1230 | * Get hold of the chip and call nand_do_read |
| 1231 | */ |
| 1232 | static int nand_read(struct mtd_info *mtd, loff_t from, size_t len, |
| 1233 | size_t *retlen, uint8_t *buf) |
| 1234 | { |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1235 | struct nand_chip *chip = mtd->priv; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1236 | int ret; |
| 1237 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1238 | /* Do not allow reads past end of device */ |
| 1239 | if ((from + len) > mtd->size) |
| 1240 | return -EINVAL; |
| 1241 | if (!len) |
| 1242 | return 0; |
| 1243 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1244 | nand_get_device(chip, mtd, FL_READING); |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1245 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1246 | chip->ops.len = len; |
| 1247 | chip->ops.datbuf = buf; |
| 1248 | chip->ops.oobbuf = NULL; |
| 1249 | |
| 1250 | ret = nand_do_read_ops(mtd, from, &chip->ops); |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1251 | |
Richard Purdie | 7fd5aec | 2006-08-27 01:23:33 -0700 | [diff] [blame] | 1252 | *retlen = chip->ops.retlen; |
| 1253 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1254 | nand_release_device(mtd); |
| 1255 | |
| 1256 | return ret; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1257 | } |
| 1258 | |
| 1259 | /** |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1260 | * nand_read_oob_std - [REPLACABLE] the most common OOB data read function |
| 1261 | * @mtd: mtd info structure |
| 1262 | * @chip: nand chip info structure |
| 1263 | * @page: page number to read |
| 1264 | * @sndcmd: flag whether to issue read command or not |
| 1265 | */ |
| 1266 | static int nand_read_oob_std(struct mtd_info *mtd, struct nand_chip *chip, |
| 1267 | int page, int sndcmd) |
| 1268 | { |
| 1269 | if (sndcmd) { |
| 1270 | chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page); |
| 1271 | sndcmd = 0; |
| 1272 | } |
| 1273 | chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); |
| 1274 | return sndcmd; |
| 1275 | } |
| 1276 | |
| 1277 | /** |
| 1278 | * nand_read_oob_syndrome - [REPLACABLE] OOB data read function for HW ECC |
| 1279 | * with syndromes |
| 1280 | * @mtd: mtd info structure |
| 1281 | * @chip: nand chip info structure |
| 1282 | * @page: page number to read |
| 1283 | * @sndcmd: flag whether to issue read command or not |
| 1284 | */ |
| 1285 | static int nand_read_oob_syndrome(struct mtd_info *mtd, struct nand_chip *chip, |
| 1286 | int page, int sndcmd) |
| 1287 | { |
| 1288 | uint8_t *buf = chip->oob_poi; |
| 1289 | int length = mtd->oobsize; |
| 1290 | int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad; |
| 1291 | int eccsize = chip->ecc.size; |
| 1292 | uint8_t *bufpoi = buf; |
| 1293 | int i, toread, sndrnd = 0, pos; |
| 1294 | |
| 1295 | chip->cmdfunc(mtd, NAND_CMD_READ0, chip->ecc.size, page); |
| 1296 | for (i = 0; i < chip->ecc.steps; i++) { |
| 1297 | if (sndrnd) { |
| 1298 | pos = eccsize + i * (eccsize + chunk); |
| 1299 | if (mtd->writesize > 512) |
| 1300 | chip->cmdfunc(mtd, NAND_CMD_RNDOUT, pos, -1); |
| 1301 | else |
| 1302 | chip->cmdfunc(mtd, NAND_CMD_READ0, pos, page); |
| 1303 | } else |
| 1304 | sndrnd = 1; |
| 1305 | toread = min_t(int, length, chunk); |
| 1306 | chip->read_buf(mtd, bufpoi, toread); |
| 1307 | bufpoi += toread; |
| 1308 | length -= toread; |
| 1309 | } |
| 1310 | if (length > 0) |
| 1311 | chip->read_buf(mtd, bufpoi, length); |
| 1312 | |
| 1313 | return 1; |
| 1314 | } |
| 1315 | |
| 1316 | /** |
| 1317 | * nand_write_oob_std - [REPLACABLE] the most common OOB data write function |
| 1318 | * @mtd: mtd info structure |
| 1319 | * @chip: nand chip info structure |
| 1320 | * @page: page number to write |
| 1321 | */ |
| 1322 | static int nand_write_oob_std(struct mtd_info *mtd, struct nand_chip *chip, |
| 1323 | int page) |
| 1324 | { |
| 1325 | int status = 0; |
| 1326 | const uint8_t *buf = chip->oob_poi; |
| 1327 | int length = mtd->oobsize; |
| 1328 | |
| 1329 | chip->cmdfunc(mtd, NAND_CMD_SEQIN, mtd->writesize, page); |
| 1330 | chip->write_buf(mtd, buf, length); |
| 1331 | /* Send command to program the OOB data */ |
| 1332 | chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1); |
| 1333 | |
| 1334 | status = chip->waitfunc(mtd, chip); |
| 1335 | |
Savin Zlobec | 0d420f9 | 2006-06-21 11:51:20 +0200 | [diff] [blame] | 1336 | return status & NAND_STATUS_FAIL ? -EIO : 0; |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1337 | } |
| 1338 | |
| 1339 | /** |
| 1340 | * nand_write_oob_syndrome - [REPLACABLE] OOB data write function for HW ECC |
| 1341 | * with syndrome - only for large page flash ! |
| 1342 | * @mtd: mtd info structure |
| 1343 | * @chip: nand chip info structure |
| 1344 | * @page: page number to write |
| 1345 | */ |
| 1346 | static int nand_write_oob_syndrome(struct mtd_info *mtd, |
| 1347 | struct nand_chip *chip, int page) |
| 1348 | { |
| 1349 | int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad; |
| 1350 | int eccsize = chip->ecc.size, length = mtd->oobsize; |
| 1351 | int i, len, pos, status = 0, sndcmd = 0, steps = chip->ecc.steps; |
| 1352 | const uint8_t *bufpoi = chip->oob_poi; |
| 1353 | |
| 1354 | /* |
| 1355 | * data-ecc-data-ecc ... ecc-oob |
| 1356 | * or |
| 1357 | * data-pad-ecc-pad-data-pad .... ecc-pad-oob |
| 1358 | */ |
| 1359 | if (!chip->ecc.prepad && !chip->ecc.postpad) { |
| 1360 | pos = steps * (eccsize + chunk); |
| 1361 | steps = 0; |
| 1362 | } else |
Vitaly Wool | 8b0036e | 2006-07-11 09:11:25 +0200 | [diff] [blame] | 1363 | pos = eccsize; |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1364 | |
| 1365 | chip->cmdfunc(mtd, NAND_CMD_SEQIN, pos, page); |
| 1366 | for (i = 0; i < steps; i++) { |
| 1367 | if (sndcmd) { |
| 1368 | if (mtd->writesize <= 512) { |
| 1369 | uint32_t fill = 0xFFFFFFFF; |
| 1370 | |
| 1371 | len = eccsize; |
| 1372 | while (len > 0) { |
| 1373 | int num = min_t(int, len, 4); |
| 1374 | chip->write_buf(mtd, (uint8_t *)&fill, |
| 1375 | num); |
| 1376 | len -= num; |
| 1377 | } |
| 1378 | } else { |
| 1379 | pos = eccsize + i * (eccsize + chunk); |
| 1380 | chip->cmdfunc(mtd, NAND_CMD_RNDIN, pos, -1); |
| 1381 | } |
| 1382 | } else |
| 1383 | sndcmd = 1; |
| 1384 | len = min_t(int, length, chunk); |
| 1385 | chip->write_buf(mtd, bufpoi, len); |
| 1386 | bufpoi += len; |
| 1387 | length -= len; |
| 1388 | } |
| 1389 | if (length > 0) |
| 1390 | chip->write_buf(mtd, bufpoi, length); |
| 1391 | |
| 1392 | chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1); |
| 1393 | status = chip->waitfunc(mtd, chip); |
| 1394 | |
| 1395 | return status & NAND_STATUS_FAIL ? -EIO : 0; |
| 1396 | } |
| 1397 | |
| 1398 | /** |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1399 | * nand_do_read_oob - [Intern] NAND read out-of-band |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1400 | * @mtd: MTD device structure |
| 1401 | * @from: offset to read from |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1402 | * @ops: oob operations description structure |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1403 | * |
| 1404 | * NAND read out-of-band data from the spare area |
| 1405 | */ |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1406 | static int nand_do_read_oob(struct mtd_info *mtd, loff_t from, |
| 1407 | struct mtd_oob_ops *ops) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1408 | { |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1409 | int page, realpage, chipnr, sndcmd = 1; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1410 | struct nand_chip *chip = mtd->priv; |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1411 | int blkcheck = (1 << (chip->phys_erase_shift - chip->page_shift)) - 1; |
Vitaly Wool | 7014568 | 2006-11-03 18:20:38 +0300 | [diff] [blame] | 1412 | int readlen = ops->ooblen; |
| 1413 | int len; |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1414 | uint8_t *buf = ops->oobbuf; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1415 | |
Andrew Morton | 7e9a0bb | 2006-05-30 09:06:41 +0100 | [diff] [blame] | 1416 | DEBUG(MTD_DEBUG_LEVEL3, "nand_read_oob: from = 0x%08Lx, len = %i\n", |
| 1417 | (unsigned long long)from, readlen); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1418 | |
Adrian Hunter | 0373615 | 2007-01-31 17:58:29 +0200 | [diff] [blame] | 1419 | if (ops->mode == MTD_OOB_AUTO) |
Vitaly Wool | 7014568 | 2006-11-03 18:20:38 +0300 | [diff] [blame] | 1420 | len = chip->ecc.layout->oobavail; |
Adrian Hunter | 0373615 | 2007-01-31 17:58:29 +0200 | [diff] [blame] | 1421 | else |
| 1422 | len = mtd->oobsize; |
| 1423 | |
| 1424 | if (unlikely(ops->ooboffs >= len)) { |
| 1425 | DEBUG(MTD_DEBUG_LEVEL0, "nand_read_oob: " |
| 1426 | "Attempt to start read outside oob\n"); |
| 1427 | return -EINVAL; |
| 1428 | } |
| 1429 | |
| 1430 | /* Do not allow reads past end of device */ |
| 1431 | if (unlikely(from >= mtd->size || |
| 1432 | ops->ooboffs + readlen > ((mtd->size >> chip->page_shift) - |
| 1433 | (from >> chip->page_shift)) * len)) { |
| 1434 | DEBUG(MTD_DEBUG_LEVEL0, "nand_read_oob: " |
| 1435 | "Attempt read beyond end of device\n"); |
| 1436 | return -EINVAL; |
| 1437 | } |
Vitaly Wool | 7014568 | 2006-11-03 18:20:38 +0300 | [diff] [blame] | 1438 | |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1439 | chipnr = (int)(from >> chip->chip_shift); |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1440 | chip->select_chip(mtd, chipnr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1441 | |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1442 | /* Shift to get page */ |
| 1443 | realpage = (int)(from >> chip->page_shift); |
| 1444 | page = realpage & chip->pagemask; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1445 | |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1446 | while(1) { |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1447 | sndcmd = chip->ecc.read_oob(mtd, chip, page, sndcmd); |
Vitaly Wool | 7014568 | 2006-11-03 18:20:38 +0300 | [diff] [blame] | 1448 | |
| 1449 | len = min(len, readlen); |
| 1450 | buf = nand_transfer_oob(chip, buf, ops, len); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1451 | |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1452 | if (!(chip->options & NAND_NO_READRDY)) { |
| 1453 | /* |
| 1454 | * Apply delay or wait for ready/busy pin. Do this |
| 1455 | * before the AUTOINCR check, so no problems arise if a |
| 1456 | * chip which does auto increment is marked as |
| 1457 | * NOAUTOINCR by the board driver. |
Thomas Gleixner | 19870da | 2005-07-15 14:53:51 +0100 | [diff] [blame] | 1458 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1459 | if (!chip->dev_ready) |
| 1460 | udelay(chip->chip_delay); |
Thomas Gleixner | 19870da | 2005-07-15 14:53:51 +0100 | [diff] [blame] | 1461 | else |
| 1462 | nand_wait_ready(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1463 | } |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1464 | |
Vitaly Wool | 7014568 | 2006-11-03 18:20:38 +0300 | [diff] [blame] | 1465 | readlen -= len; |
Savin Zlobec | 0d420f9 | 2006-06-21 11:51:20 +0200 | [diff] [blame] | 1466 | if (!readlen) |
| 1467 | break; |
| 1468 | |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1469 | /* Increment page address */ |
| 1470 | realpage++; |
| 1471 | |
| 1472 | page = realpage & chip->pagemask; |
| 1473 | /* Check, if we cross a chip boundary */ |
| 1474 | if (!page) { |
| 1475 | chipnr++; |
| 1476 | chip->select_chip(mtd, -1); |
| 1477 | chip->select_chip(mtd, chipnr); |
| 1478 | } |
| 1479 | |
| 1480 | /* Check, if the chip supports auto page increment |
| 1481 | * or if we have hit a block boundary. |
| 1482 | */ |
| 1483 | if (!NAND_CANAUTOINCR(chip) || !(page & blkcheck)) |
| 1484 | sndcmd = 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1485 | } |
| 1486 | |
Vitaly Wool | 7014568 | 2006-11-03 18:20:38 +0300 | [diff] [blame] | 1487 | ops->oobretlen = ops->ooblen; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1488 | return 0; |
| 1489 | } |
| 1490 | |
| 1491 | /** |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1492 | * nand_read_oob - [MTD Interface] NAND read data and/or out-of-band |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1493 | * @mtd: MTD device structure |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1494 | * @from: offset to read from |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1495 | * @ops: oob operation description structure |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1496 | * |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1497 | * NAND read data and/or out-of-band data |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1498 | */ |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1499 | static int nand_read_oob(struct mtd_info *mtd, loff_t from, |
| 1500 | struct mtd_oob_ops *ops) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1501 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1502 | struct nand_chip *chip = mtd->priv; |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1503 | int ret = -ENOTSUPP; |
| 1504 | |
| 1505 | ops->retlen = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1506 | |
| 1507 | /* Do not allow reads past end of device */ |
Vitaly Wool | 7014568 | 2006-11-03 18:20:38 +0300 | [diff] [blame] | 1508 | if (ops->datbuf && (from + ops->len) > mtd->size) { |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1509 | DEBUG(MTD_DEBUG_LEVEL0, "nand_read_oob: " |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1510 | "Attempt read beyond end of device\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1511 | return -EINVAL; |
| 1512 | } |
| 1513 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1514 | nand_get_device(chip, mtd, FL_READING); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1515 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1516 | switch(ops->mode) { |
| 1517 | case MTD_OOB_PLACE: |
| 1518 | case MTD_OOB_AUTO: |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1519 | case MTD_OOB_RAW: |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1520 | break; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1521 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1522 | default: |
| 1523 | goto out; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1524 | } |
| 1525 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1526 | if (!ops->datbuf) |
| 1527 | ret = nand_do_read_oob(mtd, from, ops); |
| 1528 | else |
| 1529 | ret = nand_do_read_ops(mtd, from, ops); |
| 1530 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1531 | out: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1532 | nand_release_device(mtd); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1533 | return ret; |
| 1534 | } |
| 1535 | |
| 1536 | |
| 1537 | /** |
| 1538 | * nand_write_page_raw - [Intern] raw page write function |
| 1539 | * @mtd: mtd info structure |
| 1540 | * @chip: nand chip info structure |
| 1541 | * @buf: data buffer |
David Brownell | 52ff49d | 2009-03-04 12:01:36 -0800 | [diff] [blame] | 1542 | * |
| 1543 | * Not for syndrome calculating ecc controllers, which use a special oob layout |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1544 | */ |
| 1545 | static void nand_write_page_raw(struct mtd_info *mtd, struct nand_chip *chip, |
| 1546 | const uint8_t *buf) |
| 1547 | { |
| 1548 | chip->write_buf(mtd, buf, mtd->writesize); |
| 1549 | chip->write_buf(mtd, chip->oob_poi, mtd->oobsize); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1550 | } |
| 1551 | |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1552 | /** |
David Brownell | 52ff49d | 2009-03-04 12:01:36 -0800 | [diff] [blame] | 1553 | * nand_write_page_raw_syndrome - [Intern] raw page write function |
| 1554 | * @mtd: mtd info structure |
| 1555 | * @chip: nand chip info structure |
| 1556 | * @buf: data buffer |
| 1557 | * |
| 1558 | * We need a special oob layout and handling even when ECC isn't checked. |
| 1559 | */ |
| 1560 | static void nand_write_page_raw_syndrome(struct mtd_info *mtd, struct nand_chip *chip, |
| 1561 | const uint8_t *buf) |
| 1562 | { |
| 1563 | int eccsize = chip->ecc.size; |
| 1564 | int eccbytes = chip->ecc.bytes; |
| 1565 | uint8_t *oob = chip->oob_poi; |
| 1566 | int steps, size; |
| 1567 | |
| 1568 | for (steps = chip->ecc.steps; steps > 0; steps--) { |
| 1569 | chip->write_buf(mtd, buf, eccsize); |
| 1570 | buf += eccsize; |
| 1571 | |
| 1572 | if (chip->ecc.prepad) { |
| 1573 | chip->write_buf(mtd, oob, chip->ecc.prepad); |
| 1574 | oob += chip->ecc.prepad; |
| 1575 | } |
| 1576 | |
| 1577 | chip->read_buf(mtd, oob, eccbytes); |
| 1578 | oob += eccbytes; |
| 1579 | |
| 1580 | if (chip->ecc.postpad) { |
| 1581 | chip->write_buf(mtd, oob, chip->ecc.postpad); |
| 1582 | oob += chip->ecc.postpad; |
| 1583 | } |
| 1584 | } |
| 1585 | |
| 1586 | size = mtd->oobsize - (oob - chip->oob_poi); |
| 1587 | if (size) |
| 1588 | chip->write_buf(mtd, oob, size); |
| 1589 | } |
| 1590 | /** |
Artem Bityutskiy | d29ebdb | 2006-10-19 16:04:02 +0300 | [diff] [blame] | 1591 | * nand_write_page_swecc - [REPLACABLE] software ecc based page write function |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1592 | * @mtd: mtd info structure |
| 1593 | * @chip: nand chip info structure |
| 1594 | * @buf: data buffer |
| 1595 | */ |
| 1596 | static void nand_write_page_swecc(struct mtd_info *mtd, struct nand_chip *chip, |
| 1597 | const uint8_t *buf) |
| 1598 | { |
| 1599 | int i, eccsize = chip->ecc.size; |
| 1600 | int eccbytes = chip->ecc.bytes; |
| 1601 | int eccsteps = chip->ecc.steps; |
David Woodhouse | 4bf63fc | 2006-09-25 17:08:04 +0100 | [diff] [blame] | 1602 | uint8_t *ecc_calc = chip->buffers->ecccalc; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1603 | const uint8_t *p = buf; |
Ben Dooks | 8b099a3 | 2007-05-28 19:17:54 +0100 | [diff] [blame] | 1604 | uint32_t *eccpos = chip->ecc.layout->eccpos; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1605 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1606 | /* Software ecc calculation */ |
| 1607 | for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) |
| 1608 | chip->ecc.calculate(mtd, p, &ecc_calc[i]); |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1609 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1610 | for (i = 0; i < chip->ecc.total; i++) |
| 1611 | chip->oob_poi[eccpos[i]] = ecc_calc[i]; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1612 | |
Thomas Gleixner | 90424de | 2007-04-05 11:44:05 +0200 | [diff] [blame] | 1613 | chip->ecc.write_page_raw(mtd, chip, buf); |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1614 | } |
| 1615 | |
| 1616 | /** |
Artem Bityutskiy | d29ebdb | 2006-10-19 16:04:02 +0300 | [diff] [blame] | 1617 | * nand_write_page_hwecc - [REPLACABLE] hardware ecc based page write function |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1618 | * @mtd: mtd info structure |
| 1619 | * @chip: nand chip info structure |
| 1620 | * @buf: data buffer |
| 1621 | */ |
| 1622 | static void nand_write_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip, |
| 1623 | const uint8_t *buf) |
| 1624 | { |
| 1625 | int i, eccsize = chip->ecc.size; |
| 1626 | int eccbytes = chip->ecc.bytes; |
| 1627 | int eccsteps = chip->ecc.steps; |
David Woodhouse | 4bf63fc | 2006-09-25 17:08:04 +0100 | [diff] [blame] | 1628 | uint8_t *ecc_calc = chip->buffers->ecccalc; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1629 | const uint8_t *p = buf; |
Ben Dooks | 8b099a3 | 2007-05-28 19:17:54 +0100 | [diff] [blame] | 1630 | uint32_t *eccpos = chip->ecc.layout->eccpos; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1631 | |
| 1632 | for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { |
| 1633 | chip->ecc.hwctl(mtd, NAND_ECC_WRITE); |
David Woodhouse | 29da9ce | 2006-05-26 23:05:44 +0100 | [diff] [blame] | 1634 | chip->write_buf(mtd, p, eccsize); |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1635 | chip->ecc.calculate(mtd, p, &ecc_calc[i]); |
| 1636 | } |
| 1637 | |
| 1638 | for (i = 0; i < chip->ecc.total; i++) |
| 1639 | chip->oob_poi[eccpos[i]] = ecc_calc[i]; |
| 1640 | |
| 1641 | chip->write_buf(mtd, chip->oob_poi, mtd->oobsize); |
| 1642 | } |
| 1643 | |
| 1644 | /** |
Artem Bityutskiy | d29ebdb | 2006-10-19 16:04:02 +0300 | [diff] [blame] | 1645 | * nand_write_page_syndrome - [REPLACABLE] hardware ecc syndrom based page write |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1646 | * @mtd: mtd info structure |
| 1647 | * @chip: nand chip info structure |
| 1648 | * @buf: data buffer |
| 1649 | * |
| 1650 | * The hw generator calculates the error syndrome automatically. Therefor |
| 1651 | * we need a special oob layout and handling. |
| 1652 | */ |
| 1653 | static void nand_write_page_syndrome(struct mtd_info *mtd, |
| 1654 | struct nand_chip *chip, const uint8_t *buf) |
| 1655 | { |
| 1656 | int i, eccsize = chip->ecc.size; |
| 1657 | int eccbytes = chip->ecc.bytes; |
| 1658 | int eccsteps = chip->ecc.steps; |
| 1659 | const uint8_t *p = buf; |
| 1660 | uint8_t *oob = chip->oob_poi; |
| 1661 | |
| 1662 | for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { |
| 1663 | |
| 1664 | chip->ecc.hwctl(mtd, NAND_ECC_WRITE); |
| 1665 | chip->write_buf(mtd, p, eccsize); |
| 1666 | |
| 1667 | if (chip->ecc.prepad) { |
| 1668 | chip->write_buf(mtd, oob, chip->ecc.prepad); |
| 1669 | oob += chip->ecc.prepad; |
| 1670 | } |
| 1671 | |
| 1672 | chip->ecc.calculate(mtd, p, oob); |
| 1673 | chip->write_buf(mtd, oob, eccbytes); |
| 1674 | oob += eccbytes; |
| 1675 | |
| 1676 | if (chip->ecc.postpad) { |
| 1677 | chip->write_buf(mtd, oob, chip->ecc.postpad); |
| 1678 | oob += chip->ecc.postpad; |
| 1679 | } |
| 1680 | } |
| 1681 | |
| 1682 | /* Calculate remaining oob bytes */ |
Vitaly Wool | 7e4178f | 2006-06-07 09:34:37 +0400 | [diff] [blame] | 1683 | i = mtd->oobsize - (oob - chip->oob_poi); |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1684 | if (i) |
| 1685 | chip->write_buf(mtd, oob, i); |
| 1686 | } |
| 1687 | |
| 1688 | /** |
David Woodhouse | 956e944 | 2006-09-25 17:12:39 +0100 | [diff] [blame] | 1689 | * nand_write_page - [REPLACEABLE] write one page |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1690 | * @mtd: MTD device structure |
| 1691 | * @chip: NAND chip descriptor |
| 1692 | * @buf: the data to write |
| 1693 | * @page: page number to write |
| 1694 | * @cached: cached programming |
Jesper Juhl | efbfe96c | 2006-10-27 23:24:47 +0200 | [diff] [blame] | 1695 | * @raw: use _raw version of write_page |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1696 | */ |
| 1697 | static int nand_write_page(struct mtd_info *mtd, struct nand_chip *chip, |
David Woodhouse | 956e944 | 2006-09-25 17:12:39 +0100 | [diff] [blame] | 1698 | const uint8_t *buf, int page, int cached, int raw) |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1699 | { |
| 1700 | int status; |
| 1701 | |
| 1702 | chip->cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, page); |
| 1703 | |
David Woodhouse | 956e944 | 2006-09-25 17:12:39 +0100 | [diff] [blame] | 1704 | if (unlikely(raw)) |
| 1705 | chip->ecc.write_page_raw(mtd, chip, buf); |
| 1706 | else |
| 1707 | chip->ecc.write_page(mtd, chip, buf); |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1708 | |
| 1709 | /* |
| 1710 | * Cached progamming disabled for now, Not sure if its worth the |
| 1711 | * trouble. The speed gain is not very impressive. (2.3->2.6Mib/s) |
| 1712 | */ |
| 1713 | cached = 0; |
| 1714 | |
| 1715 | if (!cached || !(chip->options & NAND_CACHEPRG)) { |
| 1716 | |
| 1717 | chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1); |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1718 | status = chip->waitfunc(mtd, chip); |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1719 | /* |
| 1720 | * See if operation failed and additional status checks are |
| 1721 | * available |
| 1722 | */ |
| 1723 | if ((status & NAND_STATUS_FAIL) && (chip->errstat)) |
| 1724 | status = chip->errstat(mtd, chip, FL_WRITING, status, |
| 1725 | page); |
| 1726 | |
| 1727 | if (status & NAND_STATUS_FAIL) |
| 1728 | return -EIO; |
| 1729 | } else { |
| 1730 | chip->cmdfunc(mtd, NAND_CMD_CACHEDPROG, -1, -1); |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1731 | status = chip->waitfunc(mtd, chip); |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1732 | } |
| 1733 | |
| 1734 | #ifdef CONFIG_MTD_NAND_VERIFY_WRITE |
| 1735 | /* Send command to read back the data */ |
| 1736 | chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page); |
| 1737 | |
| 1738 | if (chip->verify_buf(mtd, buf, mtd->writesize)) |
| 1739 | return -EIO; |
| 1740 | #endif |
| 1741 | return 0; |
| 1742 | } |
| 1743 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1744 | /** |
| 1745 | * nand_fill_oob - [Internal] Transfer client buffer to oob |
| 1746 | * @chip: nand chip structure |
| 1747 | * @oob: oob data buffer |
| 1748 | * @ops: oob ops structure |
| 1749 | */ |
| 1750 | static uint8_t *nand_fill_oob(struct nand_chip *chip, uint8_t *oob, |
| 1751 | struct mtd_oob_ops *ops) |
| 1752 | { |
| 1753 | size_t len = ops->ooblen; |
| 1754 | |
| 1755 | switch(ops->mode) { |
| 1756 | |
| 1757 | case MTD_OOB_PLACE: |
| 1758 | case MTD_OOB_RAW: |
| 1759 | memcpy(chip->oob_poi + ops->ooboffs, oob, len); |
| 1760 | return oob + len; |
| 1761 | |
| 1762 | case MTD_OOB_AUTO: { |
| 1763 | struct nand_oobfree *free = chip->ecc.layout->oobfree; |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1764 | uint32_t boffs = 0, woffs = ops->ooboffs; |
| 1765 | size_t bytes = 0; |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1766 | |
| 1767 | for(; free->length && len; free++, len -= bytes) { |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1768 | /* Write request not from offset 0 ? */ |
| 1769 | if (unlikely(woffs)) { |
| 1770 | if (woffs >= free->length) { |
| 1771 | woffs -= free->length; |
| 1772 | continue; |
| 1773 | } |
| 1774 | boffs = free->offset + woffs; |
| 1775 | bytes = min_t(size_t, len, |
| 1776 | (free->length - woffs)); |
| 1777 | woffs = 0; |
| 1778 | } else { |
| 1779 | bytes = min_t(size_t, len, free->length); |
| 1780 | boffs = free->offset; |
| 1781 | } |
Vitaly Wool | 8b0036e | 2006-07-11 09:11:25 +0200 | [diff] [blame] | 1782 | memcpy(chip->oob_poi + boffs, oob, bytes); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1783 | oob += bytes; |
| 1784 | } |
| 1785 | return oob; |
| 1786 | } |
| 1787 | default: |
| 1788 | BUG(); |
| 1789 | } |
| 1790 | return NULL; |
| 1791 | } |
| 1792 | |
Thomas Gleixner | 29072b9 | 2006-09-28 15:38:36 +0200 | [diff] [blame] | 1793 | #define NOTALIGNED(x) (x & (chip->subpagesize - 1)) != 0 |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1794 | |
| 1795 | /** |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1796 | * nand_do_write_ops - [Internal] NAND write with ECC |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1797 | * @mtd: MTD device structure |
| 1798 | * @to: offset to write to |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1799 | * @ops: oob operations description structure |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1800 | * |
| 1801 | * NAND write with ECC |
| 1802 | */ |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1803 | static int nand_do_write_ops(struct mtd_info *mtd, loff_t to, |
| 1804 | struct mtd_oob_ops *ops) |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1805 | { |
Thomas Gleixner | 29072b9 | 2006-09-28 15:38:36 +0200 | [diff] [blame] | 1806 | int chipnr, realpage, page, blockmask, column; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1807 | struct nand_chip *chip = mtd->priv; |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1808 | uint32_t writelen = ops->len; |
| 1809 | uint8_t *oob = ops->oobbuf; |
| 1810 | uint8_t *buf = ops->datbuf; |
Thomas Gleixner | 29072b9 | 2006-09-28 15:38:36 +0200 | [diff] [blame] | 1811 | int ret, subpage; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1812 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1813 | ops->retlen = 0; |
Thomas Gleixner | 29072b9 | 2006-09-28 15:38:36 +0200 | [diff] [blame] | 1814 | if (!writelen) |
| 1815 | return 0; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1816 | |
| 1817 | /* reject writes, which are not page aligned */ |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1818 | if (NOTALIGNED(to) || NOTALIGNED(ops->len)) { |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1819 | printk(KERN_NOTICE "nand_write: " |
| 1820 | "Attempt to write not page aligned data\n"); |
| 1821 | return -EINVAL; |
| 1822 | } |
| 1823 | |
Thomas Gleixner | 29072b9 | 2006-09-28 15:38:36 +0200 | [diff] [blame] | 1824 | column = to & (mtd->writesize - 1); |
| 1825 | subpage = column || (writelen & (mtd->writesize - 1)); |
| 1826 | |
| 1827 | if (subpage && oob) |
| 1828 | return -EINVAL; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1829 | |
Thomas Gleixner | 6a93096 | 2006-06-28 00:11:45 +0200 | [diff] [blame] | 1830 | chipnr = (int)(to >> chip->chip_shift); |
| 1831 | chip->select_chip(mtd, chipnr); |
| 1832 | |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1833 | /* Check, if it is write protected */ |
| 1834 | if (nand_check_wp(mtd)) |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1835 | return -EIO; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1836 | |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1837 | realpage = (int)(to >> chip->page_shift); |
| 1838 | page = realpage & chip->pagemask; |
| 1839 | blockmask = (1 << (chip->phys_erase_shift - chip->page_shift)) - 1; |
| 1840 | |
| 1841 | /* Invalidate the page cache, when we write to the cached page */ |
| 1842 | if (to <= (chip->pagebuf << chip->page_shift) && |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1843 | (chip->pagebuf << chip->page_shift) < (to + ops->len)) |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1844 | chip->pagebuf = -1; |
| 1845 | |
David Woodhouse | 7dcdcbef | 2006-10-21 17:09:53 +0100 | [diff] [blame] | 1846 | /* If we're not given explicit OOB data, let it be 0xFF */ |
| 1847 | if (likely(!oob)) |
| 1848 | memset(chip->oob_poi, 0xff, mtd->oobsize); |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1849 | |
| 1850 | while(1) { |
Thomas Gleixner | 29072b9 | 2006-09-28 15:38:36 +0200 | [diff] [blame] | 1851 | int bytes = mtd->writesize; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1852 | int cached = writelen > bytes && page != blockmask; |
Thomas Gleixner | 29072b9 | 2006-09-28 15:38:36 +0200 | [diff] [blame] | 1853 | uint8_t *wbuf = buf; |
| 1854 | |
| 1855 | /* Partial page write ? */ |
| 1856 | if (unlikely(column || writelen < (mtd->writesize - 1))) { |
| 1857 | cached = 0; |
| 1858 | bytes = min_t(int, bytes - column, (int) writelen); |
| 1859 | chip->pagebuf = -1; |
| 1860 | memset(chip->buffers->databuf, 0xff, mtd->writesize); |
| 1861 | memcpy(&chip->buffers->databuf[column], buf, bytes); |
| 1862 | wbuf = chip->buffers->databuf; |
| 1863 | } |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1864 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1865 | if (unlikely(oob)) |
| 1866 | oob = nand_fill_oob(chip, oob, ops); |
| 1867 | |
Thomas Gleixner | 29072b9 | 2006-09-28 15:38:36 +0200 | [diff] [blame] | 1868 | ret = chip->write_page(mtd, chip, wbuf, page, cached, |
David Woodhouse | 956e944 | 2006-09-25 17:12:39 +0100 | [diff] [blame] | 1869 | (ops->mode == MTD_OOB_RAW)); |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1870 | if (ret) |
| 1871 | break; |
| 1872 | |
| 1873 | writelen -= bytes; |
| 1874 | if (!writelen) |
| 1875 | break; |
| 1876 | |
Thomas Gleixner | 29072b9 | 2006-09-28 15:38:36 +0200 | [diff] [blame] | 1877 | column = 0; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1878 | buf += bytes; |
| 1879 | realpage++; |
| 1880 | |
| 1881 | page = realpage & chip->pagemask; |
| 1882 | /* Check, if we cross a chip boundary */ |
| 1883 | if (!page) { |
| 1884 | chipnr++; |
| 1885 | chip->select_chip(mtd, -1); |
| 1886 | chip->select_chip(mtd, chipnr); |
| 1887 | } |
| 1888 | } |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1889 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1890 | ops->retlen = ops->len - writelen; |
Vitaly Wool | 7014568 | 2006-11-03 18:20:38 +0300 | [diff] [blame] | 1891 | if (unlikely(oob)) |
| 1892 | ops->oobretlen = ops->ooblen; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1893 | return ret; |
| 1894 | } |
| 1895 | |
| 1896 | /** |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1897 | * nand_write - [MTD Interface] NAND write with ECC |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1898 | * @mtd: MTD device structure |
| 1899 | * @to: offset to write to |
| 1900 | * @len: number of bytes to write |
| 1901 | * @retlen: pointer to variable to store the number of written bytes |
| 1902 | * @buf: the data to write |
| 1903 | * |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1904 | * NAND write with ECC |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1905 | */ |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1906 | static int nand_write(struct mtd_info *mtd, loff_t to, size_t len, |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1907 | size_t *retlen, const uint8_t *buf) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1908 | { |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1909 | struct nand_chip *chip = mtd->priv; |
| 1910 | int ret; |
| 1911 | |
| 1912 | /* Do not allow reads past end of device */ |
| 1913 | if ((to + len) > mtd->size) |
| 1914 | return -EINVAL; |
| 1915 | if (!len) |
| 1916 | return 0; |
| 1917 | |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1918 | nand_get_device(chip, mtd, FL_WRITING); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1919 | |
| 1920 | chip->ops.len = len; |
| 1921 | chip->ops.datbuf = (uint8_t *)buf; |
| 1922 | chip->ops.oobbuf = NULL; |
| 1923 | |
| 1924 | ret = nand_do_write_ops(mtd, to, &chip->ops); |
| 1925 | |
Richard Purdie | 7fd5aec | 2006-08-27 01:23:33 -0700 | [diff] [blame] | 1926 | *retlen = chip->ops.retlen; |
| 1927 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1928 | nand_release_device(mtd); |
| 1929 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1930 | return ret; |
| 1931 | } |
| 1932 | |
| 1933 | /** |
| 1934 | * nand_do_write_oob - [MTD Interface] NAND write out-of-band |
| 1935 | * @mtd: MTD device structure |
| 1936 | * @to: offset to write to |
| 1937 | * @ops: oob operation description structure |
| 1938 | * |
| 1939 | * NAND write out-of-band |
| 1940 | */ |
| 1941 | static int nand_do_write_oob(struct mtd_info *mtd, loff_t to, |
| 1942 | struct mtd_oob_ops *ops) |
| 1943 | { |
Adrian Hunter | 0373615 | 2007-01-31 17:58:29 +0200 | [diff] [blame] | 1944 | int chipnr, page, status, len; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1945 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1946 | |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1947 | DEBUG(MTD_DEBUG_LEVEL3, "nand_write_oob: to = 0x%08x, len = %i\n", |
Vitaly Wool | 7014568 | 2006-11-03 18:20:38 +0300 | [diff] [blame] | 1948 | (unsigned int)to, (int)ops->ooblen); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1949 | |
Adrian Hunter | 0373615 | 2007-01-31 17:58:29 +0200 | [diff] [blame] | 1950 | if (ops->mode == MTD_OOB_AUTO) |
| 1951 | len = chip->ecc.layout->oobavail; |
| 1952 | else |
| 1953 | len = mtd->oobsize; |
| 1954 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1955 | /* Do not allow write past end of page */ |
Adrian Hunter | 0373615 | 2007-01-31 17:58:29 +0200 | [diff] [blame] | 1956 | if ((ops->ooboffs + ops->ooblen) > len) { |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1957 | DEBUG(MTD_DEBUG_LEVEL0, "nand_write_oob: " |
| 1958 | "Attempt to write past end of page\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1959 | return -EINVAL; |
| 1960 | } |
| 1961 | |
Adrian Hunter | 0373615 | 2007-01-31 17:58:29 +0200 | [diff] [blame] | 1962 | if (unlikely(ops->ooboffs >= len)) { |
David Brownell | 374555a | 2009-03-04 12:01:38 -0800 | [diff] [blame] | 1963 | DEBUG(MTD_DEBUG_LEVEL0, "nand_do_write_oob: " |
Adrian Hunter | 0373615 | 2007-01-31 17:58:29 +0200 | [diff] [blame] | 1964 | "Attempt to start write outside oob\n"); |
| 1965 | return -EINVAL; |
| 1966 | } |
| 1967 | |
| 1968 | /* Do not allow reads past end of device */ |
| 1969 | if (unlikely(to >= mtd->size || |
| 1970 | ops->ooboffs + ops->ooblen > |
| 1971 | ((mtd->size >> chip->page_shift) - |
| 1972 | (to >> chip->page_shift)) * len)) { |
David Brownell | 374555a | 2009-03-04 12:01:38 -0800 | [diff] [blame] | 1973 | DEBUG(MTD_DEBUG_LEVEL0, "nand_do_write_oob: " |
Adrian Hunter | 0373615 | 2007-01-31 17:58:29 +0200 | [diff] [blame] | 1974 | "Attempt write beyond end of device\n"); |
| 1975 | return -EINVAL; |
| 1976 | } |
| 1977 | |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1978 | chipnr = (int)(to >> chip->chip_shift); |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1979 | chip->select_chip(mtd, chipnr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1980 | |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1981 | /* Shift to get page */ |
| 1982 | page = (int)(to >> chip->page_shift); |
| 1983 | |
| 1984 | /* |
| 1985 | * Reset the chip. Some chips (like the Toshiba TC5832DC found in one |
| 1986 | * of my DiskOnChip 2000 test units) will clear the whole data page too |
| 1987 | * if we don't do this. I have no clue why, but I seem to have 'fixed' |
| 1988 | * it in the doc2000 driver in August 1999. dwmw2. |
| 1989 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1990 | chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1991 | |
| 1992 | /* Check, if it is write protected */ |
| 1993 | if (nand_check_wp(mtd)) |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1994 | return -EROFS; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1995 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1996 | /* Invalidate the page cache, if we write to the cached page */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1997 | if (page == chip->pagebuf) |
| 1998 | chip->pagebuf = -1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1999 | |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 2000 | memset(chip->oob_poi, 0xff, mtd->oobsize); |
| 2001 | nand_fill_oob(chip, ops->oobbuf, ops); |
| 2002 | status = chip->ecc.write_oob(mtd, chip, page & chip->pagemask); |
| 2003 | memset(chip->oob_poi, 0xff, mtd->oobsize); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2004 | |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 2005 | if (status) |
| 2006 | return status; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2007 | |
Vitaly Wool | 7014568 | 2006-11-03 18:20:38 +0300 | [diff] [blame] | 2008 | ops->oobretlen = ops->ooblen; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2009 | |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 2010 | return 0; |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2011 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2012 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2013 | /** |
| 2014 | * nand_write_oob - [MTD Interface] NAND write data and/or out-of-band |
| 2015 | * @mtd: MTD device structure |
Randy Dunlap | 844d3b4 | 2006-06-28 21:48:27 -0700 | [diff] [blame] | 2016 | * @to: offset to write to |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2017 | * @ops: oob operation description structure |
| 2018 | */ |
| 2019 | static int nand_write_oob(struct mtd_info *mtd, loff_t to, |
| 2020 | struct mtd_oob_ops *ops) |
| 2021 | { |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2022 | struct nand_chip *chip = mtd->priv; |
| 2023 | int ret = -ENOTSUPP; |
| 2024 | |
| 2025 | ops->retlen = 0; |
| 2026 | |
| 2027 | /* Do not allow writes past end of device */ |
Vitaly Wool | 7014568 | 2006-11-03 18:20:38 +0300 | [diff] [blame] | 2028 | if (ops->datbuf && (to + ops->len) > mtd->size) { |
David Brownell | 374555a | 2009-03-04 12:01:38 -0800 | [diff] [blame] | 2029 | DEBUG(MTD_DEBUG_LEVEL0, "nand_write_oob: " |
| 2030 | "Attempt write beyond end of device\n"); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2031 | return -EINVAL; |
| 2032 | } |
| 2033 | |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 2034 | nand_get_device(chip, mtd, FL_WRITING); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2035 | |
| 2036 | switch(ops->mode) { |
| 2037 | case MTD_OOB_PLACE: |
| 2038 | case MTD_OOB_AUTO: |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2039 | case MTD_OOB_RAW: |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2040 | break; |
| 2041 | |
| 2042 | default: |
| 2043 | goto out; |
| 2044 | } |
| 2045 | |
| 2046 | if (!ops->datbuf) |
| 2047 | ret = nand_do_write_oob(mtd, to, ops); |
| 2048 | else |
| 2049 | ret = nand_do_write_ops(mtd, to, ops); |
| 2050 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2051 | out: |
| 2052 | nand_release_device(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2053 | return ret; |
| 2054 | } |
| 2055 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2056 | /** |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2057 | * single_erease_cmd - [GENERIC] NAND standard block erase command function |
| 2058 | * @mtd: MTD device structure |
| 2059 | * @page: the page address of the block which will be erased |
| 2060 | * |
| 2061 | * Standard erase command for NAND chips |
| 2062 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2063 | static void single_erase_cmd(struct mtd_info *mtd, int page) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2064 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2065 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2066 | /* Send commands to erase a block */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2067 | chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page); |
| 2068 | chip->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2069 | } |
| 2070 | |
| 2071 | /** |
| 2072 | * multi_erease_cmd - [GENERIC] AND specific block erase command function |
| 2073 | * @mtd: MTD device structure |
| 2074 | * @page: the page address of the block which will be erased |
| 2075 | * |
| 2076 | * AND multi block erase command function |
| 2077 | * Erase 4 consecutive blocks |
| 2078 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2079 | static void multi_erase_cmd(struct mtd_info *mtd, int page) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2080 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2081 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2082 | /* Send commands to erase a block */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2083 | chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page++); |
| 2084 | chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page++); |
| 2085 | chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page++); |
| 2086 | chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page); |
| 2087 | chip->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2088 | } |
| 2089 | |
| 2090 | /** |
| 2091 | * nand_erase - [MTD Interface] erase block(s) |
| 2092 | * @mtd: MTD device structure |
| 2093 | * @instr: erase instruction |
| 2094 | * |
| 2095 | * Erase one ore more blocks |
| 2096 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2097 | static int nand_erase(struct mtd_info *mtd, struct erase_info *instr) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2098 | { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2099 | return nand_erase_nand(mtd, instr, 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2100 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 2101 | |
David A. Marlin | 30f464b | 2005-01-17 18:35:25 +0000 | [diff] [blame] | 2102 | #define BBT_PAGE_MASK 0xffffff3f |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2103 | /** |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2104 | * nand_erase_nand - [Internal] erase block(s) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2105 | * @mtd: MTD device structure |
| 2106 | * @instr: erase instruction |
| 2107 | * @allowbbt: allow erasing the bbt area |
| 2108 | * |
| 2109 | * Erase one ore more blocks |
| 2110 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2111 | int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr, |
| 2112 | int allowbbt) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2113 | { |
Adrian Hunter | 69423d9 | 2008-12-10 13:37:21 +0000 | [diff] [blame] | 2114 | int page, status, pages_per_block, ret, chipnr; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2115 | struct nand_chip *chip = mtd->priv; |
Adrian Hunter | 69423d9 | 2008-12-10 13:37:21 +0000 | [diff] [blame] | 2116 | loff_t rewrite_bbt[NAND_MAX_CHIPS]={0}; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2117 | unsigned int bbt_masked_page = 0xffffffff; |
Adrian Hunter | 69423d9 | 2008-12-10 13:37:21 +0000 | [diff] [blame] | 2118 | loff_t len; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2119 | |
Adrian Hunter | 69423d9 | 2008-12-10 13:37:21 +0000 | [diff] [blame] | 2120 | DEBUG(MTD_DEBUG_LEVEL3, "nand_erase: start = 0x%012llx, len = %llu\n", |
| 2121 | (unsigned long long)instr->addr, (unsigned long long)instr->len); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2122 | |
| 2123 | /* Start address must align on block boundary */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2124 | if (instr->addr & ((1 << chip->phys_erase_shift) - 1)) { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2125 | DEBUG(MTD_DEBUG_LEVEL0, "nand_erase: Unaligned address\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2126 | return -EINVAL; |
| 2127 | } |
| 2128 | |
| 2129 | /* Length must align on block boundary */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2130 | if (instr->len & ((1 << chip->phys_erase_shift) - 1)) { |
| 2131 | DEBUG(MTD_DEBUG_LEVEL0, "nand_erase: " |
| 2132 | "Length not block aligned\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2133 | return -EINVAL; |
| 2134 | } |
| 2135 | |
| 2136 | /* Do not allow erase past end of device */ |
| 2137 | if ((instr->len + instr->addr) > mtd->size) { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2138 | DEBUG(MTD_DEBUG_LEVEL0, "nand_erase: " |
| 2139 | "Erase past end of device\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2140 | return -EINVAL; |
| 2141 | } |
| 2142 | |
Adrian Hunter | bb0eb21 | 2008-08-12 12:40:50 +0300 | [diff] [blame] | 2143 | instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2144 | |
| 2145 | /* Grab the lock and see if the device is available */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2146 | nand_get_device(chip, mtd, FL_ERASING); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2147 | |
| 2148 | /* Shift to get first page */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2149 | page = (int)(instr->addr >> chip->page_shift); |
| 2150 | chipnr = (int)(instr->addr >> chip->chip_shift); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2151 | |
| 2152 | /* Calculate pages in each block */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2153 | pages_per_block = 1 << (chip->phys_erase_shift - chip->page_shift); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2154 | |
| 2155 | /* Select the NAND device */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2156 | chip->select_chip(mtd, chipnr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2157 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2158 | /* Check, if it is write protected */ |
| 2159 | if (nand_check_wp(mtd)) { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2160 | DEBUG(MTD_DEBUG_LEVEL0, "nand_erase: " |
| 2161 | "Device is write protected!!!\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2162 | instr->state = MTD_ERASE_FAILED; |
| 2163 | goto erase_exit; |
| 2164 | } |
| 2165 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2166 | /* |
| 2167 | * If BBT requires refresh, set the BBT page mask to see if the BBT |
| 2168 | * should be rewritten. Otherwise the mask is set to 0xffffffff which |
| 2169 | * can not be matched. This is also done when the bbt is actually |
| 2170 | * erased to avoid recusrsive updates |
| 2171 | */ |
| 2172 | if (chip->options & BBT_AUTO_REFRESH && !allowbbt) |
| 2173 | bbt_masked_page = chip->bbt_td->pages[chipnr] & BBT_PAGE_MASK; |
David A. Marlin | 30f464b | 2005-01-17 18:35:25 +0000 | [diff] [blame] | 2174 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2175 | /* Loop through the pages */ |
| 2176 | len = instr->len; |
| 2177 | |
| 2178 | instr->state = MTD_ERASING; |
| 2179 | |
| 2180 | while (len) { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2181 | /* |
| 2182 | * heck if we have a bad block, we do not erase bad blocks ! |
| 2183 | */ |
| 2184 | if (nand_block_checkbad(mtd, ((loff_t) page) << |
| 2185 | chip->page_shift, 0, allowbbt)) { |
| 2186 | printk(KERN_WARNING "nand_erase: attempt to erase a " |
| 2187 | "bad block at page 0x%08x\n", page); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2188 | instr->state = MTD_ERASE_FAILED; |
| 2189 | goto erase_exit; |
| 2190 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 2191 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2192 | /* |
| 2193 | * Invalidate the page cache, if we erase the block which |
| 2194 | * contains the current cached page |
| 2195 | */ |
| 2196 | if (page <= chip->pagebuf && chip->pagebuf < |
| 2197 | (page + pages_per_block)) |
| 2198 | chip->pagebuf = -1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2199 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2200 | chip->erase_cmd(mtd, page & chip->pagemask); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 2201 | |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 2202 | status = chip->waitfunc(mtd, chip); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2203 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2204 | /* |
| 2205 | * See if operation failed and additional status checks are |
| 2206 | * available |
| 2207 | */ |
| 2208 | if ((status & NAND_STATUS_FAIL) && (chip->errstat)) |
| 2209 | status = chip->errstat(mtd, chip, FL_ERASING, |
| 2210 | status, page); |
David A. Marlin | 068e3c0 | 2005-01-24 03:07:46 +0000 | [diff] [blame] | 2211 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2212 | /* See if block erase succeeded */ |
David A. Marlin | a4ab4c5 | 2005-01-23 18:30:53 +0000 | [diff] [blame] | 2213 | if (status & NAND_STATUS_FAIL) { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2214 | DEBUG(MTD_DEBUG_LEVEL0, "nand_erase: " |
| 2215 | "Failed erase, page 0x%08x\n", page); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2216 | instr->state = MTD_ERASE_FAILED; |
Adrian Hunter | 69423d9 | 2008-12-10 13:37:21 +0000 | [diff] [blame] | 2217 | instr->fail_addr = |
| 2218 | ((loff_t)page << chip->page_shift); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2219 | goto erase_exit; |
| 2220 | } |
David A. Marlin | 30f464b | 2005-01-17 18:35:25 +0000 | [diff] [blame] | 2221 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2222 | /* |
| 2223 | * If BBT requires refresh, set the BBT rewrite flag to the |
| 2224 | * page being erased |
| 2225 | */ |
| 2226 | if (bbt_masked_page != 0xffffffff && |
| 2227 | (page & BBT_PAGE_MASK) == bbt_masked_page) |
Adrian Hunter | 69423d9 | 2008-12-10 13:37:21 +0000 | [diff] [blame] | 2228 | rewrite_bbt[chipnr] = |
| 2229 | ((loff_t)page << chip->page_shift); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 2230 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2231 | /* Increment page address and decrement length */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2232 | len -= (1 << chip->phys_erase_shift); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2233 | page += pages_per_block; |
| 2234 | |
| 2235 | /* Check, if we cross a chip boundary */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2236 | if (len && !(page & chip->pagemask)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2237 | chipnr++; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2238 | chip->select_chip(mtd, -1); |
| 2239 | chip->select_chip(mtd, chipnr); |
David A. Marlin | 30f464b | 2005-01-17 18:35:25 +0000 | [diff] [blame] | 2240 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2241 | /* |
| 2242 | * If BBT requires refresh and BBT-PERCHIP, set the BBT |
| 2243 | * page mask to see if this BBT should be rewritten |
| 2244 | */ |
| 2245 | if (bbt_masked_page != 0xffffffff && |
| 2246 | (chip->bbt_td->options & NAND_BBT_PERCHIP)) |
| 2247 | bbt_masked_page = chip->bbt_td->pages[chipnr] & |
| 2248 | BBT_PAGE_MASK; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2249 | } |
| 2250 | } |
| 2251 | instr->state = MTD_ERASE_DONE; |
| 2252 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2253 | erase_exit: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2254 | |
| 2255 | ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2256 | |
| 2257 | /* Deselect and wake up anyone waiting on the device */ |
| 2258 | nand_release_device(mtd); |
| 2259 | |
David Woodhouse | 49defc0 | 2007-10-06 15:01:59 -0400 | [diff] [blame] | 2260 | /* Do call back function */ |
| 2261 | if (!ret) |
| 2262 | mtd_erase_callback(instr); |
| 2263 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2264 | /* |
| 2265 | * If BBT requires refresh and erase was successful, rewrite any |
| 2266 | * selected bad block tables |
| 2267 | */ |
| 2268 | if (bbt_masked_page == 0xffffffff || ret) |
| 2269 | return ret; |
| 2270 | |
| 2271 | for (chipnr = 0; chipnr < chip->numchips; chipnr++) { |
| 2272 | if (!rewrite_bbt[chipnr]) |
| 2273 | continue; |
| 2274 | /* update the BBT for chip */ |
| 2275 | DEBUG(MTD_DEBUG_LEVEL0, "nand_erase_nand: nand_update_bbt " |
Adrian Hunter | 69423d9 | 2008-12-10 13:37:21 +0000 | [diff] [blame] | 2276 | "(%d:0x%0llx 0x%0x)\n", chipnr, rewrite_bbt[chipnr], |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2277 | chip->bbt_td->pages[chipnr]); |
| 2278 | nand_update_bbt(mtd, rewrite_bbt[chipnr]); |
David A. Marlin | 30f464b | 2005-01-17 18:35:25 +0000 | [diff] [blame] | 2279 | } |
| 2280 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2281 | /* Return more or less happy */ |
| 2282 | return ret; |
| 2283 | } |
| 2284 | |
| 2285 | /** |
| 2286 | * nand_sync - [MTD Interface] sync |
| 2287 | * @mtd: MTD device structure |
| 2288 | * |
| 2289 | * Sync is actually a wait for chip ready function |
| 2290 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2291 | static void nand_sync(struct mtd_info *mtd) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2292 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2293 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2294 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2295 | DEBUG(MTD_DEBUG_LEVEL3, "nand_sync: called\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2296 | |
| 2297 | /* Grab the lock and see if the device is available */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2298 | nand_get_device(chip, mtd, FL_SYNCING); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2299 | /* Release it and go back */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2300 | nand_release_device(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2301 | } |
| 2302 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2303 | /** |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2304 | * nand_block_isbad - [MTD Interface] Check if block at offset is bad |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2305 | * @mtd: MTD device structure |
Randy Dunlap | 844d3b4 | 2006-06-28 21:48:27 -0700 | [diff] [blame] | 2306 | * @offs: offset relative to mtd start |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2307 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2308 | static int nand_block_isbad(struct mtd_info *mtd, loff_t offs) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2309 | { |
| 2310 | /* Check for invalid offset */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2311 | if (offs > mtd->size) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2312 | return -EINVAL; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 2313 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2314 | return nand_block_checkbad(mtd, offs, 1, 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2315 | } |
| 2316 | |
| 2317 | /** |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2318 | * nand_block_markbad - [MTD Interface] Mark block at the given offset as bad |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2319 | * @mtd: MTD device structure |
| 2320 | * @ofs: offset relative to mtd start |
| 2321 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2322 | static int nand_block_markbad(struct mtd_info *mtd, loff_t ofs) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2323 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2324 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2325 | int ret; |
| 2326 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2327 | if ((ret = nand_block_isbad(mtd, ofs))) { |
| 2328 | /* If it was bad already, return success and do nothing. */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2329 | if (ret > 0) |
| 2330 | return 0; |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2331 | return ret; |
| 2332 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2333 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2334 | return chip->block_markbad(mtd, ofs); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2335 | } |
| 2336 | |
| 2337 | /** |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 2338 | * nand_suspend - [MTD Interface] Suspend the NAND flash |
| 2339 | * @mtd: MTD device structure |
| 2340 | */ |
| 2341 | static int nand_suspend(struct mtd_info *mtd) |
| 2342 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2343 | struct nand_chip *chip = mtd->priv; |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 2344 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2345 | return nand_get_device(chip, mtd, FL_PM_SUSPENDED); |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 2346 | } |
| 2347 | |
| 2348 | /** |
| 2349 | * nand_resume - [MTD Interface] Resume the NAND flash |
| 2350 | * @mtd: MTD device structure |
| 2351 | */ |
| 2352 | static void nand_resume(struct mtd_info *mtd) |
| 2353 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2354 | struct nand_chip *chip = mtd->priv; |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 2355 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2356 | if (chip->state == FL_PM_SUSPENDED) |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 2357 | nand_release_device(mtd); |
| 2358 | else |
Thomas Gleixner | 2c0a2be | 2006-05-23 11:50:56 +0200 | [diff] [blame] | 2359 | printk(KERN_ERR "nand_resume() called for a chip which is not " |
| 2360 | "in suspended state\n"); |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 2361 | } |
| 2362 | |
Thomas Gleixner | a36ed29 | 2006-05-23 11:37:03 +0200 | [diff] [blame] | 2363 | /* |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2364 | * Set default functions |
| 2365 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2366 | static void nand_set_defaults(struct nand_chip *chip, int busw) |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2367 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2368 | /* check for proper chip_delay setup, set 20us if not */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2369 | if (!chip->chip_delay) |
| 2370 | chip->chip_delay = 20; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2371 | |
| 2372 | /* check, if a user supplied command function given */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2373 | if (chip->cmdfunc == NULL) |
| 2374 | chip->cmdfunc = nand_command; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2375 | |
| 2376 | /* check, if a user supplied wait function given */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2377 | if (chip->waitfunc == NULL) |
| 2378 | chip->waitfunc = nand_wait; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2379 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2380 | if (!chip->select_chip) |
| 2381 | chip->select_chip = nand_select_chip; |
| 2382 | if (!chip->read_byte) |
| 2383 | chip->read_byte = busw ? nand_read_byte16 : nand_read_byte; |
| 2384 | if (!chip->read_word) |
| 2385 | chip->read_word = nand_read_word; |
| 2386 | if (!chip->block_bad) |
| 2387 | chip->block_bad = nand_block_bad; |
| 2388 | if (!chip->block_markbad) |
| 2389 | chip->block_markbad = nand_default_block_markbad; |
| 2390 | if (!chip->write_buf) |
| 2391 | chip->write_buf = busw ? nand_write_buf16 : nand_write_buf; |
| 2392 | if (!chip->read_buf) |
| 2393 | chip->read_buf = busw ? nand_read_buf16 : nand_read_buf; |
| 2394 | if (!chip->verify_buf) |
| 2395 | chip->verify_buf = busw ? nand_verify_buf16 : nand_verify_buf; |
| 2396 | if (!chip->scan_bbt) |
| 2397 | chip->scan_bbt = nand_default_bbt; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2398 | |
| 2399 | if (!chip->controller) { |
| 2400 | chip->controller = &chip->hwcontrol; |
| 2401 | spin_lock_init(&chip->controller->lock); |
| 2402 | init_waitqueue_head(&chip->controller->wq); |
| 2403 | } |
| 2404 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2405 | } |
| 2406 | |
| 2407 | /* |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2408 | * Get the flash and manufacturer id and lookup if the type is supported |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2409 | */ |
| 2410 | static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd, |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2411 | struct nand_chip *chip, |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2412 | int busw, int *maf_id) |
| 2413 | { |
| 2414 | struct nand_flash_dev *type = NULL; |
| 2415 | int i, dev_id, maf_idx; |
Ben Dooks | ed8165c | 2008-04-14 14:58:58 +0100 | [diff] [blame] | 2416 | int tmp_id, tmp_manf; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2417 | |
| 2418 | /* Select the device */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2419 | chip->select_chip(mtd, 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2420 | |
Karl Beldan | ef89a88 | 2008-09-15 14:37:29 +0200 | [diff] [blame] | 2421 | /* |
| 2422 | * Reset the chip, required by some chips (e.g. Micron MT29FxGxxxxx) |
| 2423 | * after power-up |
| 2424 | */ |
| 2425 | chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1); |
| 2426 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2427 | /* Send the command for reading device ID */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2428 | chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2429 | |
| 2430 | /* Read manufacturer and device IDs */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2431 | *maf_id = chip->read_byte(mtd); |
| 2432 | dev_id = chip->read_byte(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2433 | |
Ben Dooks | ed8165c | 2008-04-14 14:58:58 +0100 | [diff] [blame] | 2434 | /* Try again to make sure, as some systems the bus-hold or other |
| 2435 | * interface concerns can cause random data which looks like a |
| 2436 | * possibly credible NAND flash to appear. If the two results do |
| 2437 | * not match, ignore the device completely. |
| 2438 | */ |
| 2439 | |
| 2440 | chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1); |
| 2441 | |
| 2442 | /* Read manufacturer and device IDs */ |
| 2443 | |
| 2444 | tmp_manf = chip->read_byte(mtd); |
| 2445 | tmp_id = chip->read_byte(mtd); |
| 2446 | |
| 2447 | if (tmp_manf != *maf_id || tmp_id != dev_id) { |
| 2448 | printk(KERN_INFO "%s: second ID read did not match " |
| 2449 | "%02x,%02x against %02x,%02x\n", __func__, |
| 2450 | *maf_id, dev_id, tmp_manf, tmp_id); |
| 2451 | return ERR_PTR(-ENODEV); |
| 2452 | } |
| 2453 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2454 | /* Lookup the flash id */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2455 | for (i = 0; nand_flash_ids[i].name != NULL; i++) { |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2456 | if (dev_id == nand_flash_ids[i].id) { |
| 2457 | type = &nand_flash_ids[i]; |
| 2458 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2459 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2460 | } |
| 2461 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2462 | if (!type) |
| 2463 | return ERR_PTR(-ENODEV); |
| 2464 | |
Thomas Gleixner | ba0251f | 2006-05-27 01:02:13 +0200 | [diff] [blame] | 2465 | if (!mtd->name) |
| 2466 | mtd->name = type->name; |
| 2467 | |
Adrian Hunter | 69423d9 | 2008-12-10 13:37:21 +0000 | [diff] [blame] | 2468 | chip->chipsize = (uint64_t)type->chipsize << 20; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2469 | |
| 2470 | /* Newer devices have all the information in additional id bytes */ |
Thomas Gleixner | ba0251f | 2006-05-27 01:02:13 +0200 | [diff] [blame] | 2471 | if (!type->pagesize) { |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2472 | int extid; |
Thomas Gleixner | 29072b9 | 2006-09-28 15:38:36 +0200 | [diff] [blame] | 2473 | /* The 3rd id byte holds MLC / multichip data */ |
| 2474 | chip->cellinfo = chip->read_byte(mtd); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2475 | /* The 4th id byte is the important one */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2476 | extid = chip->read_byte(mtd); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2477 | /* Calc pagesize */ |
Thomas Gleixner | 4cbb9b8 | 2006-05-23 12:37:31 +0200 | [diff] [blame] | 2478 | mtd->writesize = 1024 << (extid & 0x3); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2479 | extid >>= 2; |
| 2480 | /* Calc oobsize */ |
Thomas Gleixner | 4cbb9b8 | 2006-05-23 12:37:31 +0200 | [diff] [blame] | 2481 | mtd->oobsize = (8 << (extid & 0x01)) * (mtd->writesize >> 9); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2482 | extid >>= 2; |
| 2483 | /* Calc blocksize. Blocksize is multiples of 64KiB */ |
| 2484 | mtd->erasesize = (64 * 1024) << (extid & 0x03); |
| 2485 | extid >>= 2; |
| 2486 | /* Get buswidth information */ |
| 2487 | busw = (extid & 0x01) ? NAND_BUSWIDTH_16 : 0; |
| 2488 | |
| 2489 | } else { |
| 2490 | /* |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2491 | * Old devices have chip data hardcoded in the device id table |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2492 | */ |
Thomas Gleixner | ba0251f | 2006-05-27 01:02:13 +0200 | [diff] [blame] | 2493 | mtd->erasesize = type->erasesize; |
| 2494 | mtd->writesize = type->pagesize; |
Thomas Gleixner | 4cbb9b8 | 2006-05-23 12:37:31 +0200 | [diff] [blame] | 2495 | mtd->oobsize = mtd->writesize / 32; |
Thomas Gleixner | ba0251f | 2006-05-27 01:02:13 +0200 | [diff] [blame] | 2496 | busw = type->options & NAND_BUSWIDTH_16; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2497 | } |
| 2498 | |
| 2499 | /* Try to identify manufacturer */ |
David Woodhouse | 9a90986 | 2006-07-15 13:26:18 +0100 | [diff] [blame] | 2500 | for (maf_idx = 0; nand_manuf_ids[maf_idx].id != 0x0; maf_idx++) { |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2501 | if (nand_manuf_ids[maf_idx].id == *maf_id) |
| 2502 | break; |
| 2503 | } |
| 2504 | |
| 2505 | /* |
| 2506 | * Check, if buswidth is correct. Hardware drivers should set |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2507 | * chip correct ! |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2508 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2509 | if (busw != (chip->options & NAND_BUSWIDTH_16)) { |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2510 | printk(KERN_INFO "NAND device: Manufacturer ID:" |
| 2511 | " 0x%02x, Chip ID: 0x%02x (%s %s)\n", *maf_id, |
| 2512 | dev_id, nand_manuf_ids[maf_idx].name, mtd->name); |
| 2513 | printk(KERN_WARNING "NAND bus width %d instead %d bit\n", |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2514 | (chip->options & NAND_BUSWIDTH_16) ? 16 : 8, |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2515 | busw ? 16 : 8); |
| 2516 | return ERR_PTR(-EINVAL); |
| 2517 | } |
| 2518 | |
| 2519 | /* Calculate the address shift from the page size */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2520 | chip->page_shift = ffs(mtd->writesize) - 1; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2521 | /* Convert chipsize to number of pages per chip -1. */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2522 | chip->pagemask = (chip->chipsize >> chip->page_shift) - 1; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2523 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2524 | chip->bbt_erase_shift = chip->phys_erase_shift = |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2525 | ffs(mtd->erasesize) - 1; |
Adrian Hunter | 69423d9 | 2008-12-10 13:37:21 +0000 | [diff] [blame] | 2526 | if (chip->chipsize & 0xffffffff) |
| 2527 | chip->chip_shift = ffs((unsigned)chip->chipsize) - 1; |
| 2528 | else |
| 2529 | chip->chip_shift = ffs((unsigned)(chip->chipsize >> 32)) + 32 - 1; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2530 | |
| 2531 | /* Set the bad block position */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2532 | chip->badblockpos = mtd->writesize > 512 ? |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2533 | NAND_LARGE_BADBLOCK_POS : NAND_SMALL_BADBLOCK_POS; |
| 2534 | |
| 2535 | /* Get chip options, preserve non chip based options */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2536 | chip->options &= ~NAND_CHIPOPTIONS_MSK; |
Thomas Gleixner | ba0251f | 2006-05-27 01:02:13 +0200 | [diff] [blame] | 2537 | chip->options |= type->options & NAND_CHIPOPTIONS_MSK; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2538 | |
| 2539 | /* |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2540 | * Set chip as a default. Board drivers can override it, if necessary |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2541 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2542 | chip->options |= NAND_NO_AUTOINCR; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2543 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2544 | /* Check if chip is a not a samsung device. Do not clear the |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2545 | * options for chips which are not having an extended id. |
| 2546 | */ |
Thomas Gleixner | ba0251f | 2006-05-27 01:02:13 +0200 | [diff] [blame] | 2547 | if (*maf_id != NAND_MFR_SAMSUNG && !type->pagesize) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2548 | chip->options &= ~NAND_SAMSUNG_LP_OPTIONS; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2549 | |
| 2550 | /* Check for AND chips with 4 page planes */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2551 | if (chip->options & NAND_4PAGE_ARRAY) |
| 2552 | chip->erase_cmd = multi_erase_cmd; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2553 | else |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2554 | chip->erase_cmd = single_erase_cmd; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2555 | |
| 2556 | /* Do not replace user supplied command function ! */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2557 | if (mtd->writesize > 512 && chip->cmdfunc == nand_command) |
| 2558 | chip->cmdfunc = nand_command_lp; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2559 | |
| 2560 | printk(KERN_INFO "NAND device: Manufacturer ID:" |
| 2561 | " 0x%02x, Chip ID: 0x%02x (%s %s)\n", *maf_id, dev_id, |
| 2562 | nand_manuf_ids[maf_idx].name, type->name); |
| 2563 | |
| 2564 | return type; |
| 2565 | } |
| 2566 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2567 | /** |
David Woodhouse | 3b85c32 | 2006-09-25 17:06:53 +0100 | [diff] [blame] | 2568 | * nand_scan_ident - [NAND Interface] Scan for the NAND device |
| 2569 | * @mtd: MTD device structure |
| 2570 | * @maxchips: Number of chips to scan for |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2571 | * |
David Woodhouse | 3b85c32 | 2006-09-25 17:06:53 +0100 | [diff] [blame] | 2572 | * This is the first phase of the normal nand_scan() function. It |
| 2573 | * reads the flash ID and sets up MTD fields accordingly. |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2574 | * |
David Woodhouse | 3b85c32 | 2006-09-25 17:06:53 +0100 | [diff] [blame] | 2575 | * The mtd->owner field must be set to the module of the caller. |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2576 | */ |
David Woodhouse | 3b85c32 | 2006-09-25 17:06:53 +0100 | [diff] [blame] | 2577 | int nand_scan_ident(struct mtd_info *mtd, int maxchips) |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2578 | { |
| 2579 | int i, busw, nand_maf_id; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2580 | struct nand_chip *chip = mtd->priv; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2581 | struct nand_flash_dev *type; |
| 2582 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2583 | /* Get buswidth to select the correct functions */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2584 | busw = chip->options & NAND_BUSWIDTH_16; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2585 | /* Set the default functions */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2586 | nand_set_defaults(chip, busw); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2587 | |
| 2588 | /* Read the flash type */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2589 | type = nand_get_flash_type(mtd, chip, busw, &nand_maf_id); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2590 | |
| 2591 | if (IS_ERR(type)) { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2592 | printk(KERN_WARNING "No NAND device found!!!\n"); |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2593 | chip->select_chip(mtd, -1); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2594 | return PTR_ERR(type); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2595 | } |
| 2596 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2597 | /* Check for a chip array */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2598 | for (i = 1; i < maxchips; i++) { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2599 | chip->select_chip(mtd, i); |
Karl Beldan | ef89a88 | 2008-09-15 14:37:29 +0200 | [diff] [blame] | 2600 | /* See comment in nand_get_flash_type for reset */ |
| 2601 | chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2602 | /* Send the command for reading device ID */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2603 | chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2604 | /* Read manufacturer and device IDs */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2605 | if (nand_maf_id != chip->read_byte(mtd) || |
| 2606 | type->id != chip->read_byte(mtd)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2607 | break; |
| 2608 | } |
| 2609 | if (i > 1) |
| 2610 | printk(KERN_INFO "%d NAND chips detected\n", i); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 2611 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2612 | /* Store the number of chips and calc total size for mtd */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2613 | chip->numchips = i; |
| 2614 | mtd->size = i * chip->chipsize; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2615 | |
David Woodhouse | 3b85c32 | 2006-09-25 17:06:53 +0100 | [diff] [blame] | 2616 | return 0; |
| 2617 | } |
| 2618 | |
| 2619 | |
| 2620 | /** |
| 2621 | * nand_scan_tail - [NAND Interface] Scan for the NAND device |
| 2622 | * @mtd: MTD device structure |
David Woodhouse | 3b85c32 | 2006-09-25 17:06:53 +0100 | [diff] [blame] | 2623 | * |
| 2624 | * This is the second phase of the normal nand_scan() function. It |
| 2625 | * fills out all the uninitialized function pointers with the defaults |
| 2626 | * and scans for a bad block table if appropriate. |
| 2627 | */ |
| 2628 | int nand_scan_tail(struct mtd_info *mtd) |
| 2629 | { |
| 2630 | int i; |
| 2631 | struct nand_chip *chip = mtd->priv; |
| 2632 | |
David Woodhouse | 4bf63fc | 2006-09-25 17:08:04 +0100 | [diff] [blame] | 2633 | if (!(chip->options & NAND_OWN_BUFFERS)) |
| 2634 | chip->buffers = kmalloc(sizeof(*chip->buffers), GFP_KERNEL); |
| 2635 | if (!chip->buffers) |
| 2636 | return -ENOMEM; |
| 2637 | |
David Woodhouse | 7dcdcbef | 2006-10-21 17:09:53 +0100 | [diff] [blame] | 2638 | /* Set the internal oob buffer location, just after the page data */ |
David Woodhouse | 784f4d5 | 2006-10-22 01:47:45 +0100 | [diff] [blame] | 2639 | chip->oob_poi = chip->buffers->databuf + mtd->writesize; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2640 | |
| 2641 | /* |
| 2642 | * If no default placement scheme is given, select an appropriate one |
| 2643 | */ |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 2644 | if (!chip->ecc.layout) { |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 2645 | switch (mtd->oobsize) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2646 | case 8: |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 2647 | chip->ecc.layout = &nand_oob_8; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2648 | break; |
| 2649 | case 16: |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 2650 | chip->ecc.layout = &nand_oob_16; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2651 | break; |
| 2652 | case 64: |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 2653 | chip->ecc.layout = &nand_oob_64; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2654 | break; |
Thomas Gleixner | 81ec536 | 2007-12-12 17:27:03 +0100 | [diff] [blame] | 2655 | case 128: |
| 2656 | chip->ecc.layout = &nand_oob_128; |
| 2657 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2658 | default: |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2659 | printk(KERN_WARNING "No oob scheme defined for " |
| 2660 | "oobsize %d\n", mtd->oobsize); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2661 | BUG(); |
| 2662 | } |
| 2663 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 2664 | |
David Woodhouse | 956e944 | 2006-09-25 17:12:39 +0100 | [diff] [blame] | 2665 | if (!chip->write_page) |
| 2666 | chip->write_page = nand_write_page; |
| 2667 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2668 | /* |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2669 | * check ECC mode, default to software if 3byte/512byte hardware ECC is |
| 2670 | * selected and we have 256 byte pagesize fallback to software ECC |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2671 | */ |
David Woodhouse | 956e944 | 2006-09-25 17:12:39 +0100 | [diff] [blame] | 2672 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2673 | switch (chip->ecc.mode) { |
Thomas Gleixner | 6dfc6d2 | 2006-05-23 12:00:46 +0200 | [diff] [blame] | 2674 | case NAND_ECC_HW: |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 2675 | /* Use standard hwecc read page function ? */ |
| 2676 | if (!chip->ecc.read_page) |
| 2677 | chip->ecc.read_page = nand_read_page_hwecc; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2678 | if (!chip->ecc.write_page) |
| 2679 | chip->ecc.write_page = nand_write_page_hwecc; |
David Brownell | 52ff49d | 2009-03-04 12:01:36 -0800 | [diff] [blame] | 2680 | if (!chip->ecc.read_page_raw) |
| 2681 | chip->ecc.read_page_raw = nand_read_page_raw; |
| 2682 | if (!chip->ecc.write_page_raw) |
| 2683 | chip->ecc.write_page_raw = nand_write_page_raw; |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 2684 | if (!chip->ecc.read_oob) |
| 2685 | chip->ecc.read_oob = nand_read_oob_std; |
| 2686 | if (!chip->ecc.write_oob) |
| 2687 | chip->ecc.write_oob = nand_write_oob_std; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 2688 | |
Thomas Gleixner | 6dfc6d2 | 2006-05-23 12:00:46 +0200 | [diff] [blame] | 2689 | case NAND_ECC_HW_SYNDROME: |
Scott Wood | 78b6517 | 2007-12-13 11:15:28 -0600 | [diff] [blame] | 2690 | if ((!chip->ecc.calculate || !chip->ecc.correct || |
| 2691 | !chip->ecc.hwctl) && |
| 2692 | (!chip->ecc.read_page || |
Scott Wood | 1c45f60 | 2008-01-16 10:36:03 -0600 | [diff] [blame] | 2693 | chip->ecc.read_page == nand_read_page_hwecc || |
Scott Wood | 78b6517 | 2007-12-13 11:15:28 -0600 | [diff] [blame] | 2694 | !chip->ecc.write_page || |
Scott Wood | 1c45f60 | 2008-01-16 10:36:03 -0600 | [diff] [blame] | 2695 | chip->ecc.write_page == nand_write_page_hwecc)) { |
Thomas Gleixner | 6dfc6d2 | 2006-05-23 12:00:46 +0200 | [diff] [blame] | 2696 | printk(KERN_WARNING "No ECC functions supplied, " |
| 2697 | "Hardware ECC not possible\n"); |
| 2698 | BUG(); |
| 2699 | } |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2700 | /* Use standard syndrome read/write page function ? */ |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 2701 | if (!chip->ecc.read_page) |
| 2702 | chip->ecc.read_page = nand_read_page_syndrome; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2703 | if (!chip->ecc.write_page) |
| 2704 | chip->ecc.write_page = nand_write_page_syndrome; |
David Brownell | 52ff49d | 2009-03-04 12:01:36 -0800 | [diff] [blame] | 2705 | if (!chip->ecc.read_page_raw) |
| 2706 | chip->ecc.read_page_raw = nand_read_page_raw_syndrome; |
| 2707 | if (!chip->ecc.write_page_raw) |
| 2708 | chip->ecc.write_page_raw = nand_write_page_raw_syndrome; |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 2709 | if (!chip->ecc.read_oob) |
| 2710 | chip->ecc.read_oob = nand_read_oob_syndrome; |
| 2711 | if (!chip->ecc.write_oob) |
| 2712 | chip->ecc.write_oob = nand_write_oob_syndrome; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 2713 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2714 | if (mtd->writesize >= chip->ecc.size) |
Thomas Gleixner | 6dfc6d2 | 2006-05-23 12:00:46 +0200 | [diff] [blame] | 2715 | break; |
| 2716 | printk(KERN_WARNING "%d byte HW ECC not possible on " |
| 2717 | "%d byte page size, fallback to SW ECC\n", |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2718 | chip->ecc.size, mtd->writesize); |
| 2719 | chip->ecc.mode = NAND_ECC_SOFT; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2720 | |
Thomas Gleixner | 6dfc6d2 | 2006-05-23 12:00:46 +0200 | [diff] [blame] | 2721 | case NAND_ECC_SOFT: |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2722 | chip->ecc.calculate = nand_calculate_ecc; |
| 2723 | chip->ecc.correct = nand_correct_data; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 2724 | chip->ecc.read_page = nand_read_page_swecc; |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 2725 | chip->ecc.read_subpage = nand_read_subpage; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2726 | chip->ecc.write_page = nand_write_page_swecc; |
David Brownell | 52ff49d | 2009-03-04 12:01:36 -0800 | [diff] [blame] | 2727 | chip->ecc.read_page_raw = nand_read_page_raw; |
| 2728 | chip->ecc.write_page_raw = nand_write_page_raw; |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 2729 | chip->ecc.read_oob = nand_read_oob_std; |
| 2730 | chip->ecc.write_oob = nand_write_oob_std; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2731 | chip->ecc.size = 256; |
| 2732 | chip->ecc.bytes = 3; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2733 | break; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 2734 | |
| 2735 | case NAND_ECC_NONE: |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2736 | printk(KERN_WARNING "NAND_ECC_NONE selected by board driver. " |
| 2737 | "This is not recommended !!\n"); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2738 | chip->ecc.read_page = nand_read_page_raw; |
| 2739 | chip->ecc.write_page = nand_write_page_raw; |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 2740 | chip->ecc.read_oob = nand_read_oob_std; |
David Brownell | 52ff49d | 2009-03-04 12:01:36 -0800 | [diff] [blame] | 2741 | chip->ecc.read_page_raw = nand_read_page_raw; |
| 2742 | chip->ecc.write_page_raw = nand_write_page_raw; |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 2743 | chip->ecc.write_oob = nand_write_oob_std; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2744 | chip->ecc.size = mtd->writesize; |
| 2745 | chip->ecc.bytes = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2746 | break; |
David Woodhouse | 956e944 | 2006-09-25 17:12:39 +0100 | [diff] [blame] | 2747 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2748 | default: |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2749 | printk(KERN_WARNING "Invalid NAND_ECC_MODE %d\n", |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2750 | chip->ecc.mode); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 2751 | BUG(); |
| 2752 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2753 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2754 | /* |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 2755 | * The number of bytes available for a client to place data into |
| 2756 | * the out of band area |
| 2757 | */ |
| 2758 | chip->ecc.layout->oobavail = 0; |
David Brownell | 81d19b0 | 2009-04-21 19:51:20 -0700 | [diff] [blame] | 2759 | for (i = 0; chip->ecc.layout->oobfree[i].length |
| 2760 | && i < ARRAY_SIZE(chip->ecc.layout->oobfree); i++) |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 2761 | chip->ecc.layout->oobavail += |
| 2762 | chip->ecc.layout->oobfree[i].length; |
Vitaly Wool | 1f92267 | 2007-03-06 16:56:34 +0300 | [diff] [blame] | 2763 | mtd->oobavail = chip->ecc.layout->oobavail; |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 2764 | |
| 2765 | /* |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2766 | * Set the number of read / write steps for one page depending on ECC |
| 2767 | * mode |
| 2768 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2769 | chip->ecc.steps = mtd->writesize / chip->ecc.size; |
| 2770 | if(chip->ecc.steps * chip->ecc.size != mtd->writesize) { |
Thomas Gleixner | 6dfc6d2 | 2006-05-23 12:00:46 +0200 | [diff] [blame] | 2771 | printk(KERN_WARNING "Invalid ecc parameters\n"); |
| 2772 | BUG(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2773 | } |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 2774 | chip->ecc.total = chip->ecc.steps * chip->ecc.bytes; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 2775 | |
Thomas Gleixner | 29072b9 | 2006-09-28 15:38:36 +0200 | [diff] [blame] | 2776 | /* |
| 2777 | * Allow subpage writes up to ecc.steps. Not possible for MLC |
| 2778 | * FLASH. |
| 2779 | */ |
| 2780 | if (!(chip->options & NAND_NO_SUBPAGE_WRITE) && |
| 2781 | !(chip->cellinfo & NAND_CI_CELLTYPE_MSK)) { |
| 2782 | switch(chip->ecc.steps) { |
| 2783 | case 2: |
| 2784 | mtd->subpage_sft = 1; |
| 2785 | break; |
| 2786 | case 4: |
| 2787 | case 8: |
Thomas Gleixner | 81ec536 | 2007-12-12 17:27:03 +0100 | [diff] [blame] | 2788 | case 16: |
Thomas Gleixner | 29072b9 | 2006-09-28 15:38:36 +0200 | [diff] [blame] | 2789 | mtd->subpage_sft = 2; |
| 2790 | break; |
| 2791 | } |
| 2792 | } |
| 2793 | chip->subpagesize = mtd->writesize >> mtd->subpage_sft; |
| 2794 | |
Thomas Gleixner | 04bbd0e | 2006-05-25 09:45:29 +0200 | [diff] [blame] | 2795 | /* Initialize state */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2796 | chip->state = FL_READY; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2797 | |
| 2798 | /* De-select the device */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2799 | chip->select_chip(mtd, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2800 | |
| 2801 | /* Invalidate the pagebuffer reference */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2802 | chip->pagebuf = -1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2803 | |
| 2804 | /* Fill in remaining MTD driver data */ |
| 2805 | mtd->type = MTD_NANDFLASH; |
Joern Engel | 5fa4339 | 2006-05-22 23:18:29 +0200 | [diff] [blame] | 2806 | mtd->flags = MTD_CAP_NANDFLASH; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2807 | mtd->erase = nand_erase; |
| 2808 | mtd->point = NULL; |
| 2809 | mtd->unpoint = NULL; |
| 2810 | mtd->read = nand_read; |
| 2811 | mtd->write = nand_write; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2812 | mtd->read_oob = nand_read_oob; |
| 2813 | mtd->write_oob = nand_write_oob; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2814 | mtd->sync = nand_sync; |
| 2815 | mtd->lock = NULL; |
| 2816 | mtd->unlock = NULL; |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 2817 | mtd->suspend = nand_suspend; |
| 2818 | mtd->resume = nand_resume; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2819 | mtd->block_isbad = nand_block_isbad; |
| 2820 | mtd->block_markbad = nand_block_markbad; |
| 2821 | |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 2822 | /* propagate ecc.layout to mtd_info */ |
| 2823 | mtd->ecclayout = chip->ecc.layout; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2824 | |
Thomas Gleixner | 0040bf3 | 2005-02-09 12:20:00 +0000 | [diff] [blame] | 2825 | /* Check, if we should skip the bad block table scan */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2826 | if (chip->options & NAND_SKIP_BBTSCAN) |
Thomas Gleixner | 0040bf3 | 2005-02-09 12:20:00 +0000 | [diff] [blame] | 2827 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2828 | |
| 2829 | /* Build bad block table */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2830 | return chip->scan_bbt(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2831 | } |
| 2832 | |
Rusty Russell | a6e6abd | 2009-03-31 13:05:31 -0600 | [diff] [blame] | 2833 | /* is_module_text_address() isn't exported, and it's mostly a pointless |
David Woodhouse | 3b85c32 | 2006-09-25 17:06:53 +0100 | [diff] [blame] | 2834 | test if this is a module _anyway_ -- they'd have to try _really_ hard |
| 2835 | to call us from in-kernel code if the core NAND support is modular. */ |
| 2836 | #ifdef MODULE |
| 2837 | #define caller_is_module() (1) |
| 2838 | #else |
| 2839 | #define caller_is_module() \ |
Rusty Russell | a6e6abd | 2009-03-31 13:05:31 -0600 | [diff] [blame] | 2840 | is_module_text_address((unsigned long)__builtin_return_address(0)) |
David Woodhouse | 3b85c32 | 2006-09-25 17:06:53 +0100 | [diff] [blame] | 2841 | #endif |
| 2842 | |
| 2843 | /** |
| 2844 | * nand_scan - [NAND Interface] Scan for the NAND device |
| 2845 | * @mtd: MTD device structure |
| 2846 | * @maxchips: Number of chips to scan for |
| 2847 | * |
| 2848 | * This fills out all the uninitialized function pointers |
| 2849 | * with the defaults. |
| 2850 | * The flash ID is read and the mtd/chip structures are |
| 2851 | * filled with the appropriate values. |
| 2852 | * The mtd->owner field must be set to the module of the caller |
| 2853 | * |
| 2854 | */ |
| 2855 | int nand_scan(struct mtd_info *mtd, int maxchips) |
| 2856 | { |
| 2857 | int ret; |
| 2858 | |
| 2859 | /* Many callers got this wrong, so check for it for a while... */ |
| 2860 | if (!mtd->owner && caller_is_module()) { |
| 2861 | printk(KERN_CRIT "nand_scan() called with NULL mtd->owner!\n"); |
| 2862 | BUG(); |
| 2863 | } |
| 2864 | |
| 2865 | ret = nand_scan_ident(mtd, maxchips); |
| 2866 | if (!ret) |
| 2867 | ret = nand_scan_tail(mtd); |
| 2868 | return ret; |
| 2869 | } |
| 2870 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2871 | /** |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 2872 | * nand_release - [NAND Interface] Free resources held by the NAND device |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2873 | * @mtd: MTD device structure |
| 2874 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2875 | void nand_release(struct mtd_info *mtd) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2876 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2877 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2878 | |
| 2879 | #ifdef CONFIG_MTD_PARTITIONS |
| 2880 | /* Deregister partitions */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2881 | del_mtd_partitions(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2882 | #endif |
| 2883 | /* Deregister the device */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2884 | del_mtd_device(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2885 | |
Jesper Juhl | fa67164 | 2005-11-07 01:01:27 -0800 | [diff] [blame] | 2886 | /* Free bad block table memory */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2887 | kfree(chip->bbt); |
David Woodhouse | 4bf63fc | 2006-09-25 17:08:04 +0100 | [diff] [blame] | 2888 | if (!(chip->options & NAND_OWN_BUFFERS)) |
| 2889 | kfree(chip->buffers); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2890 | } |
| 2891 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2892 | EXPORT_SYMBOL_GPL(nand_scan); |
David Woodhouse | 3b85c32 | 2006-09-25 17:06:53 +0100 | [diff] [blame] | 2893 | EXPORT_SYMBOL_GPL(nand_scan_ident); |
| 2894 | EXPORT_SYMBOL_GPL(nand_scan_tail); |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2895 | EXPORT_SYMBOL_GPL(nand_release); |
Richard Purdie | 8fe833c | 2006-03-31 02:31:14 -0800 | [diff] [blame] | 2896 | |
| 2897 | static int __init nand_base_init(void) |
| 2898 | { |
| 2899 | led_trigger_register_simple("nand-disk", &nand_led_trigger); |
| 2900 | return 0; |
| 2901 | } |
| 2902 | |
| 2903 | static void __exit nand_base_exit(void) |
| 2904 | { |
| 2905 | led_trigger_unregister_simple(nand_led_trigger); |
| 2906 | } |
| 2907 | |
| 2908 | module_init(nand_base_init); |
| 2909 | module_exit(nand_base_exit); |
| 2910 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2911 | MODULE_LICENSE("GPL"); |
| 2912 | MODULE_AUTHOR("Steven J. Hill <sjhill@realitydiluted.com>, Thomas Gleixner <tglx@linutronix.de>"); |
| 2913 | MODULE_DESCRIPTION("Generic NAND flash driver code"); |