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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/* linux/arch/arm/mach-s3c2410/clock.c
2 *
3 * Copyright (c) 2004-2005 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
Ben Dooks99c13852006-06-22 22:18:20 +01006 * S3C24XX Core clock control support
Linus Torvalds1da177e2005-04-16 15:20:36 -07007 *
8 * Based on, and code from linux/arch/arm/mach-versatile/clock.c
9 **
10 ** Copyright (C) 2004 ARM Limited.
11 ** Written by Deep Blue Solutions Limited.
12 *
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software
26 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
27*/
28
29#include <linux/init.h>
30#include <linux/module.h>
31#include <linux/kernel.h>
32#include <linux/list.h>
33#include <linux/errno.h>
34#include <linux/err.h>
Russell Kingd052d1b2005-10-29 19:07:23 +010035#include <linux/platform_device.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070036#include <linux/sysdev.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070037#include <linux/interrupt.h>
38#include <linux/ioport.h>
Russell Kingf8ce2542006-01-07 16:15:52 +000039#include <linux/clk.h>
Arjan van de Ven00431702006-01-12 18:42:23 +000040#include <linux/mutex.h>
Ben Dooks8e40a2f2006-03-20 17:10:04 +000041#include <linux/delay.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070042
43#include <asm/hardware.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070044#include <asm/irq.h>
45#include <asm/io.h>
46
Linus Torvalds1da177e2005-04-16 15:20:36 -070047#include <asm/arch/regs-clock.h>
Ben Dooks3fc3e1c2006-03-20 17:10:07 +000048#include <asm/arch/regs-gpio.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070049
50#include "clock.h"
51#include "cpu.h"
52
53/* clock information */
54
55static LIST_HEAD(clocks);
Ben Dooks36c64af2006-03-20 21:00:48 +000056
57DEFINE_MUTEX(clocks_mutex);
Linus Torvalds1da177e2005-04-16 15:20:36 -070058
Linus Torvalds1da177e2005-04-16 15:20:36 -070059/* enable and disable calls for use with the clk struct */
60
61static int clk_null_enable(struct clk *clk, int enable)
62{
63 return 0;
64}
65
Linus Torvalds1da177e2005-04-16 15:20:36 -070066/* Clock API calls */
67
68struct clk *clk_get(struct device *dev, const char *id)
69{
70 struct clk *p;
71 struct clk *clk = ERR_PTR(-ENOENT);
72 int idno;
73
Ben Dooksc086f282005-10-18 07:51:34 +010074 if (dev == NULL || dev->bus != &platform_bus_type)
75 idno = -1;
76 else
77 idno = to_platform_device(dev)->id;
Linus Torvalds1da177e2005-04-16 15:20:36 -070078
Arjan van de Ven00431702006-01-12 18:42:23 +000079 mutex_lock(&clocks_mutex);
Linus Torvalds1da177e2005-04-16 15:20:36 -070080
81 list_for_each_entry(p, &clocks, list) {
82 if (p->id == idno &&
83 strcmp(id, p->name) == 0 &&
84 try_module_get(p->owner)) {
85 clk = p;
86 break;
87 }
88 }
89
90 /* check for the case where a device was supplied, but the
91 * clock that was being searched for is not device specific */
92
93 if (IS_ERR(clk)) {
94 list_for_each_entry(p, &clocks, list) {
95 if (p->id == -1 && strcmp(id, p->name) == 0 &&
96 try_module_get(p->owner)) {
97 clk = p;
98 break;
99 }
100 }
101 }
102
Arjan van de Ven00431702006-01-12 18:42:23 +0000103 mutex_unlock(&clocks_mutex);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700104 return clk;
105}
106
107void clk_put(struct clk *clk)
108{
109 module_put(clk->owner);
110}
111
112int clk_enable(struct clk *clk)
113{
Ben Dooks2a513ce2006-02-08 21:09:05 +0000114 if (IS_ERR(clk) || clk == NULL)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700115 return -EINVAL;
116
Ben Dooks2a513ce2006-02-08 21:09:05 +0000117 clk_enable(clk->parent);
118
119 mutex_lock(&clocks_mutex);
120
121 if ((clk->usage++) == 0)
122 (clk->enable)(clk, 1);
123
124 mutex_unlock(&clocks_mutex);
125 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700126}
127
128void clk_disable(struct clk *clk)
129{
Ben Dooks2a513ce2006-02-08 21:09:05 +0000130 if (IS_ERR(clk) || clk == NULL)
131 return;
132
133 mutex_lock(&clocks_mutex);
134
135 if ((--clk->usage) == 0)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700136 (clk->enable)(clk, 0);
Ben Dooks2a513ce2006-02-08 21:09:05 +0000137
138 mutex_unlock(&clocks_mutex);
139 clk_disable(clk->parent);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700140}
141
142
Linus Torvalds1da177e2005-04-16 15:20:36 -0700143unsigned long clk_get_rate(struct clk *clk)
144{
145 if (IS_ERR(clk))
146 return 0;
147
148 if (clk->rate != 0)
149 return clk->rate;
150
Ben Dooks92b7eb82006-06-22 22:18:21 +0100151 if (clk->get_rate != NULL)
152 return (clk->get_rate)(clk);
153
154 if (clk->parent != NULL)
155 return clk_get_rate(clk->parent);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700156
157 return clk->rate;
158}
159
160long clk_round_rate(struct clk *clk, unsigned long rate)
161{
Ben Dooks6e8908e2006-03-20 21:00:08 +0000162 if (!IS_ERR(clk) && clk->round_rate)
163 return (clk->round_rate)(clk, rate);
164
Linus Torvalds1da177e2005-04-16 15:20:36 -0700165 return rate;
166}
167
168int clk_set_rate(struct clk *clk, unsigned long rate)
169{
Ben Dooks6e8908e2006-03-20 21:00:08 +0000170 int ret;
171
172 if (IS_ERR(clk))
173 return -EINVAL;
174
175 mutex_lock(&clocks_mutex);
176 ret = (clk->set_rate)(clk, rate);
177 mutex_unlock(&clocks_mutex);
178
179 return ret;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700180}
181
182struct clk *clk_get_parent(struct clk *clk)
183{
184 return clk->parent;
185}
186
Ben Dooksd3468da2006-03-20 17:10:04 +0000187int clk_set_parent(struct clk *clk, struct clk *parent)
188{
189 int ret = 0;
190
191 if (IS_ERR(clk))
192 return -EINVAL;
193
194 mutex_lock(&clocks_mutex);
195
196 if (clk->set_parent)
197 ret = (clk->set_parent)(clk, parent);
198
199 mutex_unlock(&clocks_mutex);
200
201 return ret;
202}
203
Linus Torvalds1da177e2005-04-16 15:20:36 -0700204EXPORT_SYMBOL(clk_get);
205EXPORT_SYMBOL(clk_put);
206EXPORT_SYMBOL(clk_enable);
207EXPORT_SYMBOL(clk_disable);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700208EXPORT_SYMBOL(clk_get_rate);
209EXPORT_SYMBOL(clk_round_rate);
210EXPORT_SYMBOL(clk_set_rate);
211EXPORT_SYMBOL(clk_get_parent);
Ben Dooksd3468da2006-03-20 17:10:04 +0000212EXPORT_SYMBOL(clk_set_parent);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700213
214/* base clocks */
215
216static struct clk clk_xtal = {
217 .name = "xtal",
218 .id = -1,
219 .rate = 0,
220 .parent = NULL,
221 .ctrlbit = 0,
222};
223
Ben Dooks99c13852006-06-22 22:18:20 +0100224struct clk clk_upll = {
Ben Dooks8e40a2f2006-03-20 17:10:04 +0000225 .name = "upll",
226 .id = -1,
227 .parent = NULL,
Ben Dooks8e40a2f2006-03-20 17:10:04 +0000228 .ctrlbit = 0,
229};
230
Ben Dooks99c13852006-06-22 22:18:20 +0100231struct clk clk_f = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700232 .name = "fclk",
233 .id = -1,
234 .rate = 0,
235 .parent = NULL,
236 .ctrlbit = 0,
237};
238
Ben Dooks99c13852006-06-22 22:18:20 +0100239struct clk clk_h = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700240 .name = "hclk",
241 .id = -1,
242 .rate = 0,
243 .parent = NULL,
244 .ctrlbit = 0,
245};
246
Ben Dooks99c13852006-06-22 22:18:20 +0100247struct clk clk_p = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700248 .name = "pclk",
249 .id = -1,
250 .rate = 0,
251 .parent = NULL,
252 .ctrlbit = 0,
253};
254
Ben Dooks36c64af2006-03-20 21:00:48 +0000255struct clk clk_usb_bus = {
256 .name = "usb-bus",
257 .id = -1,
258 .rate = 0,
259 .parent = &clk_upll,
260};
261
Linus Torvalds1da177e2005-04-16 15:20:36 -0700262/* clocks that could be registered by external code */
263
Ben Dooks3fc3e1c2006-03-20 17:10:07 +0000264static int s3c24xx_dclk_enable(struct clk *clk, int enable)
265{
266 unsigned long dclkcon = __raw_readl(S3C2410_DCLKCON);
267
268 if (enable)
269 dclkcon |= clk->ctrlbit;
270 else
271 dclkcon &= ~clk->ctrlbit;
272
273 __raw_writel(dclkcon, S3C2410_DCLKCON);
274
275 return 0;
276}
277
278static int s3c24xx_dclk_setparent(struct clk *clk, struct clk *parent)
279{
280 unsigned long dclkcon;
281 unsigned int uclk;
282
283 if (parent == &clk_upll)
284 uclk = 1;
285 else if (parent == &clk_p)
286 uclk = 0;
287 else
288 return -EINVAL;
289
290 clk->parent = parent;
291
292 dclkcon = __raw_readl(S3C2410_DCLKCON);
293
294 if (clk->ctrlbit == S3C2410_DCLKCON_DCLK0EN) {
295 if (uclk)
296 dclkcon |= S3C2410_DCLKCON_DCLK0_UCLK;
297 else
298 dclkcon &= ~S3C2410_DCLKCON_DCLK0_UCLK;
299 } else {
300 if (uclk)
301 dclkcon |= S3C2410_DCLKCON_DCLK1_UCLK;
302 else
303 dclkcon &= ~S3C2410_DCLKCON_DCLK1_UCLK;
304 }
305
306 __raw_writel(dclkcon, S3C2410_DCLKCON);
307
308 return 0;
309}
310
311
312static int s3c24xx_clkout_setparent(struct clk *clk, struct clk *parent)
313{
314 unsigned long mask;
315 unsigned long source;
316
317 /* calculate the MISCCR setting for the clock */
318
319 if (parent == &clk_xtal)
320 source = S3C2410_MISCCR_CLK0_MPLL;
321 else if (parent == &clk_upll)
322 source = S3C2410_MISCCR_CLK0_UPLL;
323 else if (parent == &clk_f)
324 source = S3C2410_MISCCR_CLK0_FCLK;
Ben Dooks73590362006-04-09 22:21:10 +0100325 else if (parent == &clk_h)
326 source = S3C2410_MISCCR_CLK0_HCLK;
Ben Dooks3fc3e1c2006-03-20 17:10:07 +0000327 else if (parent == &clk_p)
328 source = S3C2410_MISCCR_CLK0_PCLK;
329 else if (clk == &s3c24xx_clkout0 && parent == &s3c24xx_dclk0)
330 source = S3C2410_MISCCR_CLK0_DCLK0;
331 else if (clk == &s3c24xx_clkout1 && parent == &s3c24xx_dclk1)
332 source = S3C2410_MISCCR_CLK0_DCLK0;
333 else
334 return -EINVAL;
335
Ben Dooks73590362006-04-09 22:21:10 +0100336 clk->parent = parent;
337
Ben Dooks3fc3e1c2006-03-20 17:10:07 +0000338 if (clk == &s3c24xx_dclk0)
339 mask = S3C2410_MISCCR_CLK0_MASK;
340 else {
341 source <<= 4;
342 mask = S3C2410_MISCCR_CLK1_MASK;
343 }
344
345 s3c2410_modify_misccr(mask, source);
346 return 0;
347}
348
349/* external clock definitions */
350
Linus Torvalds1da177e2005-04-16 15:20:36 -0700351struct clk s3c24xx_dclk0 = {
352 .name = "dclk0",
353 .id = -1,
Ben Dooks3fc3e1c2006-03-20 17:10:07 +0000354 .ctrlbit = S3C2410_DCLKCON_DCLK0EN,
355 .enable = s3c24xx_dclk_enable,
356 .set_parent = s3c24xx_dclk_setparent,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700357};
358
359struct clk s3c24xx_dclk1 = {
360 .name = "dclk1",
361 .id = -1,
Ben Dooks3fc3e1c2006-03-20 17:10:07 +0000362 .ctrlbit = S3C2410_DCLKCON_DCLK0EN,
363 .enable = s3c24xx_dclk_enable,
364 .set_parent = s3c24xx_dclk_setparent,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700365};
366
367struct clk s3c24xx_clkout0 = {
368 .name = "clkout0",
369 .id = -1,
Ben Dooks3fc3e1c2006-03-20 17:10:07 +0000370 .set_parent = s3c24xx_clkout_setparent,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700371};
372
373struct clk s3c24xx_clkout1 = {
374 .name = "clkout1",
375 .id = -1,
Ben Dooks3fc3e1c2006-03-20 17:10:07 +0000376 .set_parent = s3c24xx_clkout_setparent,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700377};
378
379struct clk s3c24xx_uclk = {
380 .name = "uclk",
381 .id = -1,
382};
383
Linus Torvalds1da177e2005-04-16 15:20:36 -0700384/* initialise the clock system */
385
386int s3c24xx_register_clock(struct clk *clk)
387{
388 clk->owner = THIS_MODULE;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700389
390 if (clk->enable == NULL)
391 clk->enable = clk_null_enable;
392
393 /* add to the list of available clocks */
394
Arjan van de Ven00431702006-01-12 18:42:23 +0000395 mutex_lock(&clocks_mutex);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700396 list_add(&clk->list, &clocks);
Arjan van de Ven00431702006-01-12 18:42:23 +0000397 mutex_unlock(&clocks_mutex);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700398
399 return 0;
400}
401
402/* initalise all the clocks */
403
404int __init s3c24xx_setup_clocks(unsigned long xtal,
405 unsigned long fclk,
406 unsigned long hclk,
407 unsigned long pclk)
408{
Ben Dooks99c13852006-06-22 22:18:20 +0100409 printk(KERN_INFO "S3C24XX Clocks, (c) 2004 Simtec Electronics\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700410
411 /* initialise the main system clocks */
412
413 clk_xtal.rate = xtal;
Ben Dooks99c13852006-06-22 22:18:20 +0100414 clk_upll.rate = s3c2410_get_pll(__raw_readl(S3C2410_UPLLCON), xtal);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700415
416 clk_h.rate = hclk;
417 clk_p.rate = pclk;
418 clk_f.rate = fclk;
419
Linus Torvalds1da177e2005-04-16 15:20:36 -0700420 /* assume uart clocks are correctly setup */
421
422 /* register our clocks */
423
424 if (s3c24xx_register_clock(&clk_xtal) < 0)
425 printk(KERN_ERR "failed to register master xtal\n");
426
Ben Dooks8e40a2f2006-03-20 17:10:04 +0000427 if (s3c24xx_register_clock(&clk_upll) < 0)
428 printk(KERN_ERR "failed to register upll clock\n");
429
Linus Torvalds1da177e2005-04-16 15:20:36 -0700430 if (s3c24xx_register_clock(&clk_f) < 0)
431 printk(KERN_ERR "failed to register cpu fclk\n");
432
433 if (s3c24xx_register_clock(&clk_h) < 0)
434 printk(KERN_ERR "failed to register cpu hclk\n");
435
436 if (s3c24xx_register_clock(&clk_p) < 0)
437 printk(KERN_ERR "failed to register cpu pclk\n");
438
Linus Torvalds1da177e2005-04-16 15:20:36 -0700439 return 0;
440}