blob: 978a108ba7a1b32c10d299f2ced9554b6bffa2dc [file] [log] [blame]
Ben Skeggs6ee73862009-12-11 19:24:15 +10001/*
2 * Copyright 2009 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24
David Howells760285e2012-10-02 18:01:07 +010025#include <drm/drmP.h>
Linus Torvalds612a9aa2012-10-03 23:29:23 -070026#include <drm/drm_dp_helper.h>
Ben Skeggsb01f0602010-07-23 11:39:03 +100027
Ben Skeggs77145f12012-07-31 16:16:21 +100028#include "nouveau_drm.h"
Ben Skeggsb01f0602010-07-23 11:39:03 +100029#include "nouveau_connector.h"
Ben Skeggs6ee73862009-12-11 19:24:15 +100030#include "nouveau_encoder.h"
Ben Skeggs27a45982011-08-04 09:26:44 +100031#include "nouveau_crtc.h"
Ben Skeggs6ee73862009-12-11 19:24:15 +100032
Ben Skeggs77145f12012-07-31 16:16:21 +100033#include <subdev/gpio.h>
34#include <subdev/i2c.h>
Ben Skeggs43720132011-07-20 15:50:14 +100035
Ben Skeggs5f1800b2011-08-05 14:07:04 +100036u8 *
Ben Skeggscb75d972012-07-11 10:44:20 +100037nouveau_dp_bios_data(struct drm_device *dev, struct dcb_output *dcb, u8 **entry)
Ben Skeggs5f1800b2011-08-05 14:07:04 +100038{
Ben Skeggs77145f12012-07-31 16:16:21 +100039 struct nouveau_drm *drm = nouveau_drm(dev);
Ben Skeggs5f1800b2011-08-05 14:07:04 +100040 struct bit_entry d;
41 u8 *table;
42 int i;
43
44 if (bit_table(dev, 'd', &d)) {
Ben Skeggs77145f12012-07-31 16:16:21 +100045 NV_ERROR(drm, "BIT 'd' table not found\n");
Ben Skeggs5f1800b2011-08-05 14:07:04 +100046 return NULL;
47 }
48
49 if (d.version != 1) {
Ben Skeggs77145f12012-07-31 16:16:21 +100050 NV_ERROR(drm, "BIT 'd' table version %d unknown\n", d.version);
Ben Skeggs5f1800b2011-08-05 14:07:04 +100051 return NULL;
52 }
53
Ben Skeggsf9f9f532011-10-12 16:48:48 +100054 table = ROMPTR(dev, d.data[0]);
Ben Skeggs5f1800b2011-08-05 14:07:04 +100055 if (!table) {
Ben Skeggs77145f12012-07-31 16:16:21 +100056 NV_ERROR(drm, "displayport table pointer invalid\n");
Ben Skeggs5f1800b2011-08-05 14:07:04 +100057 return NULL;
58 }
59
60 switch (table[0]) {
61 case 0x20:
62 case 0x21:
Ben Skeggsc16a3a32011-08-05 14:47:28 +100063 case 0x30:
Ben Skeggs65445992012-03-11 16:08:05 +100064 case 0x40:
Ben Skeggs5f1800b2011-08-05 14:07:04 +100065 break;
66 default:
Ben Skeggs77145f12012-07-31 16:16:21 +100067 NV_ERROR(drm, "displayport table 0x%02x unknown\n", table[0]);
Ben Skeggs5f1800b2011-08-05 14:07:04 +100068 return NULL;
69 }
70
71 for (i = 0; i < table[3]; i++) {
Ben Skeggsf9f9f532011-10-12 16:48:48 +100072 *entry = ROMPTR(dev, table[table[1] + (i * table[2])]);
Ben Skeggs5f1800b2011-08-05 14:07:04 +100073 if (*entry && bios_encoder_match(dcb, ROM32((*entry)[0])))
74 return table;
75 }
76
Ben Skeggs77145f12012-07-31 16:16:21 +100077 NV_ERROR(drm, "displayport encoder table not found\n");
Ben Skeggs5f1800b2011-08-05 14:07:04 +100078 return NULL;
79}
80
Ben Skeggs27a45982011-08-04 09:26:44 +100081/******************************************************************************
82 * link training
83 *****************************************************************************/
84struct dp_state {
Ben Skeggs4196faa2012-07-10 14:36:38 +100085 struct nouveau_i2c_port *auxch;
Ben Skeggs8663bc72012-03-09 16:22:56 +100086 struct dp_train_func *func;
Ben Skeggscb75d972012-07-11 10:44:20 +100087 struct dcb_output *dcb;
Ben Skeggs27a45982011-08-04 09:26:44 +100088 int crtc;
Ben Skeggs52e0d0e2011-08-04 14:31:28 +100089 u8 *dpcd;
Ben Skeggs27a45982011-08-04 09:26:44 +100090 int link_nr;
91 u32 link_bw;
92 u8 stat[6];
93 u8 conf[4];
94};
95
96static void
97dp_set_link_config(struct drm_device *dev, struct dp_state *dp)
Ben Skeggs6ee73862009-12-11 19:24:15 +100098{
Ben Skeggs77145f12012-07-31 16:16:21 +100099 struct nouveau_drm *drm = nouveau_drm(dev);
Ben Skeggs8663bc72012-03-09 16:22:56 +1000100 u8 sink[2];
Ben Skeggs6ee73862009-12-11 19:24:15 +1000101
Ben Skeggs77145f12012-07-31 16:16:21 +1000102 NV_DEBUG(drm, "%d lanes at %d KB/s\n", dp->link_nr, dp->link_bw);
Ben Skeggs6ee73862009-12-11 19:24:15 +1000103
Ben Skeggs8663bc72012-03-09 16:22:56 +1000104 /* set desired link configuration on the source */
105 dp->func->link_set(dev, dp->dcb, dp->crtc, dp->link_nr, dp->link_bw,
106 dp->dpcd[2] & DP_ENHANCED_FRAME_CAP);
Ben Skeggs27a45982011-08-04 09:26:44 +1000107
Ben Skeggs28e2d122011-08-04 14:16:45 +1000108 /* inform the sink of the new configuration */
Ben Skeggs8663bc72012-03-09 16:22:56 +1000109 sink[0] = dp->link_bw / 27000;
110 sink[1] = dp->link_nr;
111 if (dp->dpcd[2] & DP_ENHANCED_FRAME_CAP)
112 sink[1] |= DP_LANE_COUNT_ENHANCED_FRAME_EN;
113
Ben Skeggs77145f12012-07-31 16:16:21 +1000114 nv_wraux(dp->auxch, DP_LINK_BW_SET, sink, 2);
Ben Skeggs27a45982011-08-04 09:26:44 +1000115}
116
117static void
Ben Skeggs8663bc72012-03-09 16:22:56 +1000118dp_set_training_pattern(struct drm_device *dev, struct dp_state *dp, u8 pattern)
Ben Skeggs27a45982011-08-04 09:26:44 +1000119{
Ben Skeggs77145f12012-07-31 16:16:21 +1000120 struct nouveau_drm *drm = nouveau_drm(dev);
Ben Skeggs5b3eb952011-08-05 15:56:53 +1000121 u8 sink_tp;
122
Ben Skeggs77145f12012-07-31 16:16:21 +1000123 NV_DEBUG(drm, "training pattern %d\n", pattern);
Ben Skeggs5b3eb952011-08-05 15:56:53 +1000124
Ben Skeggs8663bc72012-03-09 16:22:56 +1000125 dp->func->train_set(dev, dp->dcb, pattern);
Ben Skeggs5b3eb952011-08-05 15:56:53 +1000126
Ben Skeggs77145f12012-07-31 16:16:21 +1000127 nv_rdaux(dp->auxch, DP_TRAINING_PATTERN_SET, &sink_tp, 1);
Ben Skeggs5b3eb952011-08-05 15:56:53 +1000128 sink_tp &= ~DP_TRAINING_PATTERN_MASK;
Ben Skeggs8663bc72012-03-09 16:22:56 +1000129 sink_tp |= pattern;
Ben Skeggs77145f12012-07-31 16:16:21 +1000130 nv_wraux(dp->auxch, DP_TRAINING_PATTERN_SET, &sink_tp, 1);
Ben Skeggs6ee73862009-12-11 19:24:15 +1000131}
132
133static int
Ben Skeggs27a45982011-08-04 09:26:44 +1000134dp_link_train_commit(struct drm_device *dev, struct dp_state *dp)
Ben Skeggs6ee73862009-12-11 19:24:15 +1000135{
Ben Skeggs77145f12012-07-31 16:16:21 +1000136 struct nouveau_drm *drm = nouveau_drm(dev);
Ben Skeggs27a45982011-08-04 09:26:44 +1000137 int i;
Ben Skeggs6ee73862009-12-11 19:24:15 +1000138
Ben Skeggs27a45982011-08-04 09:26:44 +1000139 for (i = 0; i < dp->link_nr; i++) {
Ben Skeggsc16a3a32011-08-05 14:47:28 +1000140 u8 lane = (dp->stat[4 + (i >> 1)] >> ((i & 1) * 4)) & 0xf;
141 u8 lpre = (lane & 0x0c) >> 2;
142 u8 lvsw = (lane & 0x03) >> 0;
Ben Skeggs6ee73862009-12-11 19:24:15 +1000143
Ben Skeggsc16a3a32011-08-05 14:47:28 +1000144 dp->conf[i] = (lpre << 3) | lvsw;
145 if (lvsw == DP_TRAIN_VOLTAGE_SWING_1200)
Ben Skeggs27a45982011-08-04 09:26:44 +1000146 dp->conf[i] |= DP_TRAIN_MAX_SWING_REACHED;
Xi Wang44ab8cc2012-02-03 11:13:55 -0500147 if ((lpre << 3) == DP_TRAIN_PRE_EMPHASIS_9_5)
Ben Skeggs27a45982011-08-04 09:26:44 +1000148 dp->conf[i] |= DP_TRAIN_MAX_PRE_EMPHASIS_REACHED;
149
Ben Skeggs77145f12012-07-31 16:16:21 +1000150 NV_DEBUG(drm, "config lane %d %02x\n", i, dp->conf[i]);
Ben Skeggs8663bc72012-03-09 16:22:56 +1000151 dp->func->train_adj(dev, dp->dcb, i, lvsw, lpre);
Ben Skeggs27a45982011-08-04 09:26:44 +1000152 }
153
Ben Skeggs77145f12012-07-31 16:16:21 +1000154 return nv_wraux(dp->auxch, DP_TRAINING_LANE0_SET, dp->conf, 4);
Ben Skeggs6ee73862009-12-11 19:24:15 +1000155}
156
157static int
Ben Skeggs27a45982011-08-04 09:26:44 +1000158dp_link_train_update(struct drm_device *dev, struct dp_state *dp, u32 delay)
Ben Skeggs6ee73862009-12-11 19:24:15 +1000159{
Ben Skeggs77145f12012-07-31 16:16:21 +1000160 struct nouveau_drm *drm = nouveau_drm(dev);
Ben Skeggs6ee73862009-12-11 19:24:15 +1000161 int ret;
162
Ben Skeggs27a45982011-08-04 09:26:44 +1000163 udelay(delay);
Ben Skeggs6ee73862009-12-11 19:24:15 +1000164
Ben Skeggs77145f12012-07-31 16:16:21 +1000165 ret = nv_rdaux(dp->auxch, DP_LANE0_1_STATUS, dp->stat, 6);
Ben Skeggs6ee73862009-12-11 19:24:15 +1000166 if (ret)
167 return ret;
Ben Skeggs27a45982011-08-04 09:26:44 +1000168
Dave Airlie268d2832012-10-03 13:26:15 +1000169 NV_DEBUG(drm, "status %*ph\n", 6, dp->stat);
Ben Skeggs27a45982011-08-04 09:26:44 +1000170 return 0;
Ben Skeggs6ee73862009-12-11 19:24:15 +1000171}
172
173static int
Ben Skeggs27a45982011-08-04 09:26:44 +1000174dp_link_train_cr(struct drm_device *dev, struct dp_state *dp)
Ben Skeggs6ee73862009-12-11 19:24:15 +1000175{
Ben Skeggs27a45982011-08-04 09:26:44 +1000176 bool cr_done = false, abort = false;
177 int voltage = dp->conf[0] & DP_TRAIN_VOLTAGE_SWING_MASK;
178 int tries = 0, i;
Ben Skeggs6ee73862009-12-11 19:24:15 +1000179
Ben Skeggs27a45982011-08-04 09:26:44 +1000180 dp_set_training_pattern(dev, dp, DP_TRAINING_PATTERN_1);
Ben Skeggs6ee73862009-12-11 19:24:15 +1000181
Ben Skeggs27a45982011-08-04 09:26:44 +1000182 do {
183 if (dp_link_train_commit(dev, dp) ||
184 dp_link_train_update(dev, dp, 100))
Ben Skeggs6ee73862009-12-11 19:24:15 +1000185 break;
Ben Skeggs6ee73862009-12-11 19:24:15 +1000186
Ben Skeggs27a45982011-08-04 09:26:44 +1000187 cr_done = true;
188 for (i = 0; i < dp->link_nr; i++) {
189 u8 lane = (dp->stat[i >> 1] >> ((i & 1) * 4)) & 0xf;
190 if (!(lane & DP_LANE_CR_DONE)) {
191 cr_done = false;
192 if (dp->conf[i] & DP_TRAIN_MAX_SWING_REACHED)
193 abort = true;
194 break;
195 }
196 }
Ben Skeggs6ee73862009-12-11 19:24:15 +1000197
Ben Skeggs27a45982011-08-04 09:26:44 +1000198 if ((dp->conf[0] & DP_TRAIN_VOLTAGE_SWING_MASK) != voltage) {
199 voltage = dp->conf[0] & DP_TRAIN_VOLTAGE_SWING_MASK;
200 tries = 0;
201 }
202 } while (!cr_done && !abort && ++tries < 5);
Ben Skeggs6ee73862009-12-11 19:24:15 +1000203
Ben Skeggs27a45982011-08-04 09:26:44 +1000204 return cr_done ? 0 : -1;
205}
Ben Skeggs6ee73862009-12-11 19:24:15 +1000206
Ben Skeggs27a45982011-08-04 09:26:44 +1000207static int
208dp_link_train_eq(struct drm_device *dev, struct dp_state *dp)
209{
210 bool eq_done, cr_done = true;
211 int tries = 0, i;
212
213 dp_set_training_pattern(dev, dp, DP_TRAINING_PATTERN_2);
214
215 do {
216 if (dp_link_train_update(dev, dp, 400))
217 break;
218
219 eq_done = !!(dp->stat[2] & DP_INTERLANE_ALIGN_DONE);
220 for (i = 0; i < dp->link_nr && eq_done; i++) {
221 u8 lane = (dp->stat[i >> 1] >> ((i & 1) * 4)) & 0xf;
222 if (!(lane & DP_LANE_CR_DONE))
223 cr_done = false;
224 if (!(lane & DP_LANE_CHANNEL_EQ_DONE) ||
225 !(lane & DP_LANE_SYMBOL_LOCKED))
226 eq_done = false;
227 }
228
229 if (dp_link_train_commit(dev, dp))
230 break;
231 } while (!eq_done && cr_done && ++tries <= 5);
232
233 return eq_done ? 0 : -1;
Ben Skeggs6ee73862009-12-11 19:24:15 +1000234}
235
Ben Skeggs8c1dcb62012-03-09 15:22:19 +1000236static void
237dp_set_downspread(struct drm_device *dev, struct dp_state *dp, bool enable)
238{
239 u16 script = 0x0000;
240 u8 *entry, *table = nouveau_dp_bios_data(dev, dp->dcb, &entry);
241 if (table) {
242 if (table[0] >= 0x20 && table[0] <= 0x30) {
Ben Skeggs6e83fda2012-03-11 01:28:48 +1000243 if (enable) script = ROM16(entry[12]);
244 else script = ROM16(entry[14]);
Ben Skeggs65445992012-03-11 16:08:05 +1000245 } else
246 if (table[0] == 0x40) {
247 if (enable) script = ROM16(entry[11]);
248 else script = ROM16(entry[13]);
Ben Skeggs8c1dcb62012-03-09 15:22:19 +1000249 }
250 }
251
252 nouveau_bios_run_init_table(dev, script, dp->dcb, dp->crtc);
253}
254
255static void
256dp_link_train_init(struct drm_device *dev, struct dp_state *dp)
257{
258 u16 script = 0x0000;
259 u8 *entry, *table = nouveau_dp_bios_data(dev, dp->dcb, &entry);
260 if (table) {
261 if (table[0] >= 0x20 && table[0] <= 0x30)
262 script = ROM16(entry[6]);
Ben Skeggs65445992012-03-11 16:08:05 +1000263 else
264 if (table[0] == 0x40)
265 script = ROM16(entry[5]);
Ben Skeggs8c1dcb62012-03-09 15:22:19 +1000266 }
267
268 nouveau_bios_run_init_table(dev, script, dp->dcb, dp->crtc);
269}
270
271static void
272dp_link_train_fini(struct drm_device *dev, struct dp_state *dp)
273{
274 u16 script = 0x0000;
275 u8 *entry, *table = nouveau_dp_bios_data(dev, dp->dcb, &entry);
276 if (table) {
277 if (table[0] >= 0x20 && table[0] <= 0x30)
278 script = ROM16(entry[8]);
Ben Skeggs65445992012-03-11 16:08:05 +1000279 else
280 if (table[0] == 0x40)
281 script = ROM16(entry[7]);
Ben Skeggs8c1dcb62012-03-09 15:22:19 +1000282 }
283
284 nouveau_bios_run_init_table(dev, script, dp->dcb, dp->crtc);
285}
286
Marcin Slusarz5b8a43a2012-08-19 23:00:00 +0200287static bool
Ben Skeggs8663bc72012-03-09 16:22:56 +1000288nouveau_dp_link_train(struct drm_encoder *encoder, u32 datarate,
289 struct dp_train_func *func)
Ben Skeggs6ee73862009-12-11 19:24:15 +1000290{
Ben Skeggs6ee73862009-12-11 19:24:15 +1000291 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
Ben Skeggs27a45982011-08-04 09:26:44 +1000292 struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc);
293 struct nouveau_connector *nv_connector =
294 nouveau_encoder_connector_get(nv_encoder);
295 struct drm_device *dev = encoder->dev;
Ben Skeggs77145f12012-07-31 16:16:21 +1000296 struct nouveau_drm *drm = nouveau_drm(dev);
297 struct nouveau_i2c *i2c = nouveau_i2c(drm->device);
298 struct nouveau_gpio *gpio = nouveau_gpio(drm->device);
Ben Skeggs27a45982011-08-04 09:26:44 +1000299 const u32 bw_list[] = { 270000, 162000, 0 };
300 const u32 *link_bw = bw_list;
301 struct dp_state dp;
Ben Skeggs6ee73862009-12-11 19:24:15 +1000302
Ben Skeggs77145f12012-07-31 16:16:21 +1000303 dp.auxch = i2c->find(i2c, nv_encoder->dcb->i2c_index);
Ben Skeggs4196faa2012-07-10 14:36:38 +1000304 if (!dp.auxch)
Ben Skeggsb01f0602010-07-23 11:39:03 +1000305 return false;
306
Ben Skeggs8663bc72012-03-09 16:22:56 +1000307 dp.func = func;
Ben Skeggs27a45982011-08-04 09:26:44 +1000308 dp.dcb = nv_encoder->dcb;
309 dp.crtc = nv_crtc->index;
Ben Skeggs52e0d0e2011-08-04 14:31:28 +1000310 dp.dpcd = nv_encoder->dp.dpcd;
Ben Skeggs27a45982011-08-04 09:26:44 +1000311
Ben Skeggs6860dc82012-03-12 11:16:55 +1000312 /* adjust required bandwidth for 8B/10B coding overhead */
313 datarate = (datarate / 8) * 10;
314
Ben Skeggs27a45982011-08-04 09:26:44 +1000315 /* some sinks toggle hotplug in response to some of the actions
316 * we take during link training (DP_SET_POWER is one), we need
317 * to ignore them for the moment to avoid races.
Ben Skeggsb01f0602010-07-23 11:39:03 +1000318 */
Ben Skeggs77145f12012-07-31 16:16:21 +1000319 gpio->irq(gpio, 0, nv_connector->hpd, 0xff, false);
Ben Skeggsb01f0602010-07-23 11:39:03 +1000320
Ben Skeggs52e0d0e2011-08-04 14:31:28 +1000321 /* enable down-spreading, if possible */
Ben Skeggs8c1dcb62012-03-09 15:22:19 +1000322 dp_set_downspread(dev, &dp, nv_encoder->dp.dpcd[3] & 1);
Ben Skeggs52e0d0e2011-08-04 14:31:28 +1000323
Ben Skeggs27a45982011-08-04 09:26:44 +1000324 /* execute pre-train script from vbios */
Ben Skeggs8c1dcb62012-03-09 15:22:19 +1000325 dp_link_train_init(dev, &dp);
Ben Skeggs27a45982011-08-04 09:26:44 +1000326
327 /* start off at highest link rate supported by encoder and display */
Ben Skeggs75a1fcc2011-08-04 09:55:44 +1000328 while (*link_bw > nv_encoder->dp.link_bw)
Ben Skeggs27a45982011-08-04 09:26:44 +1000329 link_bw++;
330
331 while (link_bw[0]) {
332 /* find minimum required lane count at this link rate */
333 dp.link_nr = nv_encoder->dp.link_nr;
334 while ((dp.link_nr >> 1) * link_bw[0] > datarate)
335 dp.link_nr >>= 1;
336
337 /* drop link rate to minimum with this lane count */
338 while ((link_bw[1] * dp.link_nr) > datarate)
339 link_bw++;
340 dp.link_bw = link_bw[0];
341
342 /* program selected link configuration */
343 dp_set_link_config(dev, &dp);
344
345 /* attempt to train the link at this configuration */
346 memset(dp.stat, 0x00, sizeof(dp.stat));
347 if (!dp_link_train_cr(dev, &dp) &&
348 !dp_link_train_eq(dev, &dp))
349 break;
350
351 /* retry at lower rate */
352 link_bw++;
Ben Skeggsea4718d2010-07-06 11:00:42 +1000353 }
354
Ben Skeggs27a45982011-08-04 09:26:44 +1000355 /* finish link training */
356 dp_set_training_pattern(dev, &dp, DP_TRAINING_PATTERN_DISABLE);
Ben Skeggs6ee73862009-12-11 19:24:15 +1000357
Ben Skeggs27a45982011-08-04 09:26:44 +1000358 /* execute post-train script from vbios */
Ben Skeggs8c1dcb62012-03-09 15:22:19 +1000359 dp_link_train_fini(dev, &dp);
Ben Skeggsea4718d2010-07-06 11:00:42 +1000360
Ben Skeggsb01f0602010-07-23 11:39:03 +1000361 /* re-enable hotplug detect */
Ben Skeggs77145f12012-07-31 16:16:21 +1000362 gpio->irq(gpio, 0, nv_connector->hpd, 0xff, true);
Ben Skeggs27a45982011-08-04 09:26:44 +1000363 return true;
Ben Skeggs6ee73862009-12-11 19:24:15 +1000364}
365
Ben Skeggsf14d9a42012-03-11 01:20:54 +1000366void
367nouveau_dp_dpms(struct drm_encoder *encoder, int mode, u32 datarate,
368 struct dp_train_func *func)
369{
370 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
Ben Skeggs77145f12012-07-31 16:16:21 +1000371 struct nouveau_drm *drm = nouveau_drm(encoder->dev);
372 struct nouveau_i2c *i2c = nouveau_i2c(drm->device);
Ben Skeggs4196faa2012-07-10 14:36:38 +1000373 struct nouveau_i2c_port *auxch;
Ben Skeggsf14d9a42012-03-11 01:20:54 +1000374 u8 status;
375
Ben Skeggs77145f12012-07-31 16:16:21 +1000376 auxch = i2c->find(i2c, nv_encoder->dcb->i2c_index);
Ben Skeggsf14d9a42012-03-11 01:20:54 +1000377 if (!auxch)
378 return;
379
380 if (mode == DRM_MODE_DPMS_ON)
381 status = DP_SET_POWER_D0;
382 else
383 status = DP_SET_POWER_D3;
384
Ben Skeggs77145f12012-07-31 16:16:21 +1000385 nv_wraux(auxch, DP_SET_POWER, &status, 1);
Ben Skeggsf14d9a42012-03-11 01:20:54 +1000386
387 if (mode == DRM_MODE_DPMS_ON)
388 nouveau_dp_link_train(encoder, datarate, func);
389}
390
Adam Jackson6225ee02012-05-14 16:05:49 -0400391static void
Ben Skeggs4196faa2012-07-10 14:36:38 +1000392nouveau_dp_probe_oui(struct drm_device *dev, struct nouveau_i2c_port *auxch,
Adam Jackson6225ee02012-05-14 16:05:49 -0400393 u8 *dpcd)
394{
Ben Skeggs77145f12012-07-31 16:16:21 +1000395 struct nouveau_drm *drm = nouveau_drm(dev);
Adam Jackson6225ee02012-05-14 16:05:49 -0400396 u8 buf[3];
397
398 if (!(dpcd[DP_DOWN_STREAM_PORT_COUNT] & DP_OUI_SUPPORT))
399 return;
400
Ben Skeggs77145f12012-07-31 16:16:21 +1000401 if (!nv_rdaux(auxch, DP_SINK_OUI, buf, 3))
402 NV_DEBUG(drm, "Sink OUI: %02hx%02hx%02hx\n",
Adam Jackson6225ee02012-05-14 16:05:49 -0400403 buf[0], buf[1], buf[2]);
404
Ben Skeggs77145f12012-07-31 16:16:21 +1000405 if (!nv_rdaux(auxch, DP_BRANCH_OUI, buf, 3))
406 NV_DEBUG(drm, "Branch OUI: %02hx%02hx%02hx\n",
Adam Jackson6225ee02012-05-14 16:05:49 -0400407 buf[0], buf[1], buf[2]);
408
409}
410
Ben Skeggs6ee73862009-12-11 19:24:15 +1000411bool
412nouveau_dp_detect(struct drm_encoder *encoder)
413{
414 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
415 struct drm_device *dev = encoder->dev;
Ben Skeggs77145f12012-07-31 16:16:21 +1000416 struct nouveau_drm *drm = nouveau_drm(dev);
417 struct nouveau_i2c *i2c = nouveau_i2c(drm->device);
Ben Skeggs4196faa2012-07-10 14:36:38 +1000418 struct nouveau_i2c_port *auxch;
Ben Skeggs52e0d0e2011-08-04 14:31:28 +1000419 u8 *dpcd = nv_encoder->dp.dpcd;
Ben Skeggs6ee73862009-12-11 19:24:15 +1000420 int ret;
421
Ben Skeggs77145f12012-07-31 16:16:21 +1000422 auxch = i2c->find(i2c, nv_encoder->dcb->i2c_index);
Ben Skeggs52e0d0e2011-08-04 14:31:28 +1000423 if (!auxch)
424 return false;
425
Ben Skeggs77145f12012-07-31 16:16:21 +1000426 ret = nv_rdaux(auxch, DP_DPCD_REV, dpcd, 8);
Ben Skeggs6ee73862009-12-11 19:24:15 +1000427 if (ret)
428 return false;
429
Ben Skeggs75a1fcc2011-08-04 09:55:44 +1000430 nv_encoder->dp.link_bw = 27000 * dpcd[1];
Ben Skeggs85341f22010-09-28 10:03:57 +1000431 nv_encoder->dp.link_nr = dpcd[2] & DP_MAX_LANE_COUNT_MASK;
Ben Skeggs6ee73862009-12-11 19:24:15 +1000432
Ben Skeggs77145f12012-07-31 16:16:21 +1000433 NV_DEBUG(drm, "display: %dx%d dpcd 0x%02x\n",
Ben Skeggs75a1fcc2011-08-04 09:55:44 +1000434 nv_encoder->dp.link_nr, nv_encoder->dp.link_bw, dpcd[0]);
Ben Skeggs77145f12012-07-31 16:16:21 +1000435 NV_DEBUG(drm, "encoder: %dx%d\n",
Ben Skeggs75a1fcc2011-08-04 09:55:44 +1000436 nv_encoder->dcb->dpconf.link_nr,
437 nv_encoder->dcb->dpconf.link_bw);
438
439 if (nv_encoder->dcb->dpconf.link_nr < nv_encoder->dp.link_nr)
440 nv_encoder->dp.link_nr = nv_encoder->dcb->dpconf.link_nr;
441 if (nv_encoder->dcb->dpconf.link_bw < nv_encoder->dp.link_bw)
442 nv_encoder->dp.link_bw = nv_encoder->dcb->dpconf.link_bw;
443
Ben Skeggs77145f12012-07-31 16:16:21 +1000444 NV_DEBUG(drm, "maximum: %dx%d\n",
Ben Skeggs75a1fcc2011-08-04 09:55:44 +1000445 nv_encoder->dp.link_nr, nv_encoder->dp.link_bw);
Ben Skeggsfe224bb2010-09-27 08:29:33 +1000446
Adam Jackson6225ee02012-05-14 16:05:49 -0400447 nouveau_dp_probe_oui(dev, auxch, dpcd);
448
Ben Skeggs6ee73862009-12-11 19:24:15 +1000449 return true;
450}