Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 1 | /* |
| 2 | * SMP initialisation and IPI support |
| 3 | * Based on arch/arm/kernel/smp.c |
| 4 | * |
| 5 | * Copyright (C) 2012 ARM Ltd. |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License version 2 as |
| 9 | * published by the Free Software Foundation. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program. If not, see <http://www.gnu.org/licenses/>. |
| 18 | */ |
| 19 | |
| 20 | #include <linux/delay.h> |
| 21 | #include <linux/init.h> |
| 22 | #include <linux/spinlock.h> |
| 23 | #include <linux/sched.h> |
| 24 | #include <linux/interrupt.h> |
| 25 | #include <linux/cache.h> |
| 26 | #include <linux/profile.h> |
| 27 | #include <linux/errno.h> |
| 28 | #include <linux/mm.h> |
| 29 | #include <linux/err.h> |
| 30 | #include <linux/cpu.h> |
| 31 | #include <linux/smp.h> |
| 32 | #include <linux/seq_file.h> |
| 33 | #include <linux/irq.h> |
| 34 | #include <linux/percpu.h> |
| 35 | #include <linux/clockchips.h> |
| 36 | #include <linux/completion.h> |
| 37 | #include <linux/of.h> |
| 38 | |
| 39 | #include <asm/atomic.h> |
| 40 | #include <asm/cacheflush.h> |
| 41 | #include <asm/cputype.h> |
| 42 | #include <asm/mmu_context.h> |
| 43 | #include <asm/pgtable.h> |
| 44 | #include <asm/pgalloc.h> |
| 45 | #include <asm/processor.h> |
| 46 | #include <asm/sections.h> |
| 47 | #include <asm/tlbflush.h> |
| 48 | #include <asm/ptrace.h> |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 49 | |
| 50 | /* |
| 51 | * as from 2.5, kernels no longer have an init_tasks structure |
| 52 | * so we need some other way of telling a new secondary core |
| 53 | * where to place its SVC stack |
| 54 | */ |
| 55 | struct secondary_data secondary_data; |
| 56 | volatile unsigned long secondary_holding_pen_release = -1; |
| 57 | |
| 58 | enum ipi_msg_type { |
| 59 | IPI_RESCHEDULE, |
| 60 | IPI_CALL_FUNC, |
| 61 | IPI_CALL_FUNC_SINGLE, |
| 62 | IPI_CPU_STOP, |
| 63 | }; |
| 64 | |
| 65 | static DEFINE_RAW_SPINLOCK(boot_lock); |
| 66 | |
| 67 | /* |
| 68 | * Write secondary_holding_pen_release in a way that is guaranteed to be |
| 69 | * visible to all observers, irrespective of whether they're taking part |
| 70 | * in coherency or not. This is necessary for the hotplug code to work |
| 71 | * reliably. |
| 72 | */ |
| 73 | static void __cpuinit write_pen_release(int val) |
| 74 | { |
| 75 | void *start = (void *)&secondary_holding_pen_release; |
| 76 | unsigned long size = sizeof(secondary_holding_pen_release); |
| 77 | |
| 78 | secondary_holding_pen_release = val; |
| 79 | __flush_dcache_area(start, size); |
| 80 | } |
| 81 | |
| 82 | /* |
| 83 | * Boot a secondary CPU, and assign it the specified idle task. |
| 84 | * This also gives us the initial stack to use for this CPU. |
| 85 | */ |
| 86 | static int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) |
| 87 | { |
| 88 | unsigned long timeout; |
| 89 | |
| 90 | /* |
| 91 | * Set synchronisation state between this boot processor |
| 92 | * and the secondary one |
| 93 | */ |
| 94 | raw_spin_lock(&boot_lock); |
| 95 | |
| 96 | /* |
| 97 | * Update the pen release flag. |
| 98 | */ |
| 99 | write_pen_release(cpu); |
| 100 | |
| 101 | /* |
| 102 | * Send an event, causing the secondaries to read pen_release. |
| 103 | */ |
| 104 | sev(); |
| 105 | |
| 106 | timeout = jiffies + (1 * HZ); |
| 107 | while (time_before(jiffies, timeout)) { |
| 108 | if (secondary_holding_pen_release == -1UL) |
| 109 | break; |
| 110 | udelay(10); |
| 111 | } |
| 112 | |
| 113 | /* |
| 114 | * Now the secondary core is starting up let it run its |
| 115 | * calibrations, then wait for it to finish |
| 116 | */ |
| 117 | raw_spin_unlock(&boot_lock); |
| 118 | |
| 119 | return secondary_holding_pen_release != -1 ? -ENOSYS : 0; |
| 120 | } |
| 121 | |
| 122 | static DECLARE_COMPLETION(cpu_running); |
| 123 | |
| 124 | int __cpuinit __cpu_up(unsigned int cpu, struct task_struct *idle) |
| 125 | { |
| 126 | int ret; |
| 127 | |
| 128 | /* |
| 129 | * We need to tell the secondary core where to find its stack and the |
| 130 | * page tables. |
| 131 | */ |
| 132 | secondary_data.stack = task_stack_page(idle) + THREAD_START_SP; |
| 133 | __flush_dcache_area(&secondary_data, sizeof(secondary_data)); |
| 134 | |
| 135 | /* |
| 136 | * Now bring the CPU into our world. |
| 137 | */ |
| 138 | ret = boot_secondary(cpu, idle); |
| 139 | if (ret == 0) { |
| 140 | /* |
| 141 | * CPU was successfully started, wait for it to come online or |
| 142 | * time out. |
| 143 | */ |
| 144 | wait_for_completion_timeout(&cpu_running, |
| 145 | msecs_to_jiffies(1000)); |
| 146 | |
| 147 | if (!cpu_online(cpu)) { |
| 148 | pr_crit("CPU%u: failed to come online\n", cpu); |
| 149 | ret = -EIO; |
| 150 | } |
| 151 | } else { |
| 152 | pr_err("CPU%u: failed to boot: %d\n", cpu, ret); |
| 153 | } |
| 154 | |
| 155 | secondary_data.stack = NULL; |
| 156 | |
| 157 | return ret; |
| 158 | } |
| 159 | |
| 160 | /* |
| 161 | * This is the secondary CPU boot entry. We're using this CPUs |
| 162 | * idle thread stack, but a set of temporary page tables. |
| 163 | */ |
| 164 | asmlinkage void __cpuinit secondary_start_kernel(void) |
| 165 | { |
| 166 | struct mm_struct *mm = &init_mm; |
| 167 | unsigned int cpu = smp_processor_id(); |
| 168 | |
| 169 | printk("CPU%u: Booted secondary processor\n", cpu); |
| 170 | |
| 171 | /* |
| 172 | * All kernel threads share the same mm context; grab a |
| 173 | * reference and switch to it. |
| 174 | */ |
| 175 | atomic_inc(&mm->mm_count); |
| 176 | current->active_mm = mm; |
| 177 | cpumask_set_cpu(cpu, mm_cpumask(mm)); |
| 178 | |
| 179 | /* |
| 180 | * TTBR0 is only used for the identity mapping at this stage. Make it |
| 181 | * point to zero page to avoid speculatively fetching new entries. |
| 182 | */ |
| 183 | cpu_set_reserved_ttbr0(); |
| 184 | flush_tlb_all(); |
| 185 | |
| 186 | preempt_disable(); |
| 187 | trace_hardirqs_off(); |
| 188 | |
| 189 | /* |
| 190 | * Let the primary processor know we're out of the |
| 191 | * pen, then head off into the C entry point |
| 192 | */ |
| 193 | write_pen_release(-1); |
| 194 | |
| 195 | /* |
| 196 | * Synchronise with the boot thread. |
| 197 | */ |
| 198 | raw_spin_lock(&boot_lock); |
| 199 | raw_spin_unlock(&boot_lock); |
| 200 | |
| 201 | /* |
| 202 | * Enable local interrupts. |
| 203 | */ |
| 204 | notify_cpu_starting(cpu); |
| 205 | local_irq_enable(); |
| 206 | local_fiq_enable(); |
| 207 | |
| 208 | /* |
| 209 | * OK, now it's safe to let the boot CPU continue. Wait for |
| 210 | * the CPU migration code to notice that the CPU is online |
| 211 | * before we continue. |
| 212 | */ |
| 213 | set_cpu_online(cpu, true); |
Will Deacon | b3770b3 | 2012-11-07 17:00:05 +0000 | [diff] [blame] | 214 | complete(&cpu_running); |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 215 | |
| 216 | /* |
| 217 | * OK, it's off to the idle thread for us |
| 218 | */ |
Thomas Gleixner | 0087298 | 2013-03-21 22:49:39 +0100 | [diff] [blame] | 219 | cpu_startup_entry(CPUHP_ONLINE); |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 220 | } |
| 221 | |
| 222 | void __init smp_cpus_done(unsigned int max_cpus) |
| 223 | { |
| 224 | unsigned long bogosum = loops_per_jiffy * num_online_cpus(); |
| 225 | |
| 226 | pr_info("SMP: Total of %d processors activated (%lu.%02lu BogoMIPS).\n", |
| 227 | num_online_cpus(), bogosum / (500000/HZ), |
| 228 | (bogosum / (5000/HZ)) % 100); |
| 229 | } |
| 230 | |
| 231 | void __init smp_prepare_boot_cpu(void) |
| 232 | { |
| 233 | } |
| 234 | |
| 235 | static void (*smp_cross_call)(const struct cpumask *, unsigned int); |
Marc Zyngier | d329de3 | 2013-01-02 15:24:22 +0000 | [diff] [blame] | 236 | |
| 237 | static const struct smp_enable_ops *enable_ops[] __initconst = { |
| 238 | &smp_spin_table_ops, |
Marc Zyngier | 0459ca9 | 2013-01-02 15:34:50 +0000 | [diff] [blame] | 239 | &smp_psci_ops, |
Marc Zyngier | d329de3 | 2013-01-02 15:24:22 +0000 | [diff] [blame] | 240 | NULL, |
| 241 | }; |
| 242 | |
| 243 | static const struct smp_enable_ops *smp_enable_ops[NR_CPUS]; |
| 244 | |
| 245 | static const struct smp_enable_ops * __init smp_get_enable_ops(const char *name) |
| 246 | { |
| 247 | const struct smp_enable_ops *ops = enable_ops[0]; |
| 248 | |
| 249 | while (ops) { |
| 250 | if (!strcmp(name, ops->name)) |
| 251 | return ops; |
| 252 | |
| 253 | ops++; |
| 254 | } |
| 255 | |
| 256 | return NULL; |
| 257 | } |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 258 | |
| 259 | /* |
| 260 | * Enumerate the possible CPU set from the device tree. |
| 261 | */ |
| 262 | void __init smp_init_cpus(void) |
| 263 | { |
| 264 | const char *enable_method; |
| 265 | struct device_node *dn = NULL; |
| 266 | int cpu = 0; |
| 267 | |
| 268 | while ((dn = of_find_node_by_type(dn, "cpu"))) { |
| 269 | if (cpu >= NR_CPUS) |
| 270 | goto next; |
| 271 | |
| 272 | /* |
| 273 | * We currently support only the "spin-table" enable-method. |
| 274 | */ |
| 275 | enable_method = of_get_property(dn, "enable-method", NULL); |
Marc Zyngier | d329de3 | 2013-01-02 15:24:22 +0000 | [diff] [blame] | 276 | if (!enable_method) { |
| 277 | pr_err("CPU %d: missing enable-method property\n", cpu); |
| 278 | goto next; |
| 279 | } |
| 280 | |
| 281 | smp_enable_ops[cpu] = smp_get_enable_ops(enable_method); |
| 282 | |
| 283 | if (!smp_enable_ops[cpu]) { |
| 284 | pr_err("CPU %d: invalid enable-method property: %s\n", |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 285 | cpu, enable_method); |
| 286 | goto next; |
| 287 | } |
| 288 | |
Marc Zyngier | d329de3 | 2013-01-02 15:24:22 +0000 | [diff] [blame] | 289 | if (smp_enable_ops[cpu]->init_cpu(dn, cpu)) |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 290 | goto next; |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 291 | |
| 292 | set_cpu_possible(cpu, true); |
| 293 | next: |
| 294 | cpu++; |
| 295 | } |
| 296 | |
| 297 | /* sanity check */ |
| 298 | if (cpu > NR_CPUS) |
| 299 | pr_warning("no. of cores (%d) greater than configured maximum of %d - clipping\n", |
| 300 | cpu, NR_CPUS); |
| 301 | } |
| 302 | |
| 303 | void __init smp_prepare_cpus(unsigned int max_cpus) |
| 304 | { |
Marc Zyngier | d329de3 | 2013-01-02 15:24:22 +0000 | [diff] [blame] | 305 | int cpu, err; |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 306 | unsigned int ncores = num_possible_cpus(); |
| 307 | |
| 308 | /* |
| 309 | * are we trying to boot more cores than exist? |
| 310 | */ |
| 311 | if (max_cpus > ncores) |
| 312 | max_cpus = ncores; |
| 313 | |
Marc Zyngier | d329de3 | 2013-01-02 15:24:22 +0000 | [diff] [blame] | 314 | /* Don't bother if we're effectively UP */ |
| 315 | if (max_cpus <= 1) |
| 316 | return; |
| 317 | |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 318 | /* |
| 319 | * Initialise the present map (which describes the set of CPUs |
| 320 | * actually populated at the present time) and release the |
| 321 | * secondaries from the bootloader. |
Marc Zyngier | d329de3 | 2013-01-02 15:24:22 +0000 | [diff] [blame] | 322 | * |
| 323 | * Make sure we online at most (max_cpus - 1) additional CPUs. |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 324 | */ |
Marc Zyngier | d329de3 | 2013-01-02 15:24:22 +0000 | [diff] [blame] | 325 | max_cpus--; |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 326 | for_each_possible_cpu(cpu) { |
| 327 | if (max_cpus == 0) |
| 328 | break; |
| 329 | |
Marc Zyngier | d329de3 | 2013-01-02 15:24:22 +0000 | [diff] [blame] | 330 | if (cpu == smp_processor_id()) |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 331 | continue; |
| 332 | |
Marc Zyngier | d329de3 | 2013-01-02 15:24:22 +0000 | [diff] [blame] | 333 | if (!smp_enable_ops[cpu]) |
| 334 | continue; |
| 335 | |
| 336 | err = smp_enable_ops[cpu]->prepare_cpu(cpu); |
| 337 | if (err) |
| 338 | continue; |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 339 | |
| 340 | set_cpu_present(cpu, true); |
| 341 | max_cpus--; |
| 342 | } |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 343 | } |
| 344 | |
| 345 | |
| 346 | void __init set_smp_cross_call(void (*fn)(const struct cpumask *, unsigned int)) |
| 347 | { |
| 348 | smp_cross_call = fn; |
| 349 | } |
| 350 | |
| 351 | void arch_send_call_function_ipi_mask(const struct cpumask *mask) |
| 352 | { |
| 353 | smp_cross_call(mask, IPI_CALL_FUNC); |
| 354 | } |
| 355 | |
| 356 | void arch_send_call_function_single_ipi(int cpu) |
| 357 | { |
| 358 | smp_cross_call(cpumask_of(cpu), IPI_CALL_FUNC_SINGLE); |
| 359 | } |
| 360 | |
| 361 | static const char *ipi_types[NR_IPI] = { |
| 362 | #define S(x,s) [x - IPI_RESCHEDULE] = s |
| 363 | S(IPI_RESCHEDULE, "Rescheduling interrupts"), |
| 364 | S(IPI_CALL_FUNC, "Function call interrupts"), |
| 365 | S(IPI_CALL_FUNC_SINGLE, "Single function call interrupts"), |
| 366 | S(IPI_CPU_STOP, "CPU stop interrupts"), |
| 367 | }; |
| 368 | |
| 369 | void show_ipi_list(struct seq_file *p, int prec) |
| 370 | { |
| 371 | unsigned int cpu, i; |
| 372 | |
| 373 | for (i = 0; i < NR_IPI; i++) { |
| 374 | seq_printf(p, "%*s%u:%s", prec - 1, "IPI", i + IPI_RESCHEDULE, |
| 375 | prec >= 4 ? " " : ""); |
| 376 | for_each_present_cpu(cpu) |
| 377 | seq_printf(p, "%10u ", |
| 378 | __get_irq_stat(cpu, ipi_irqs[i])); |
| 379 | seq_printf(p, " %s\n", ipi_types[i]); |
| 380 | } |
| 381 | } |
| 382 | |
| 383 | u64 smp_irq_stat_cpu(unsigned int cpu) |
| 384 | { |
| 385 | u64 sum = 0; |
| 386 | int i; |
| 387 | |
| 388 | for (i = 0; i < NR_IPI; i++) |
| 389 | sum += __get_irq_stat(cpu, ipi_irqs[i]); |
| 390 | |
| 391 | return sum; |
| 392 | } |
| 393 | |
| 394 | static DEFINE_RAW_SPINLOCK(stop_lock); |
| 395 | |
| 396 | /* |
| 397 | * ipi_cpu_stop - handle IPI from smp_send_stop() |
| 398 | */ |
| 399 | static void ipi_cpu_stop(unsigned int cpu) |
| 400 | { |
| 401 | if (system_state == SYSTEM_BOOTING || |
| 402 | system_state == SYSTEM_RUNNING) { |
| 403 | raw_spin_lock(&stop_lock); |
| 404 | pr_crit("CPU%u: stopping\n", cpu); |
| 405 | dump_stack(); |
| 406 | raw_spin_unlock(&stop_lock); |
| 407 | } |
| 408 | |
| 409 | set_cpu_online(cpu, false); |
| 410 | |
| 411 | local_fiq_disable(); |
| 412 | local_irq_disable(); |
| 413 | |
| 414 | while (1) |
| 415 | cpu_relax(); |
| 416 | } |
| 417 | |
| 418 | /* |
| 419 | * Main handler for inter-processor interrupts |
| 420 | */ |
| 421 | void handle_IPI(int ipinr, struct pt_regs *regs) |
| 422 | { |
| 423 | unsigned int cpu = smp_processor_id(); |
| 424 | struct pt_regs *old_regs = set_irq_regs(regs); |
| 425 | |
| 426 | if (ipinr >= IPI_RESCHEDULE && ipinr < IPI_RESCHEDULE + NR_IPI) |
| 427 | __inc_irq_stat(cpu, ipi_irqs[ipinr - IPI_RESCHEDULE]); |
| 428 | |
| 429 | switch (ipinr) { |
| 430 | case IPI_RESCHEDULE: |
| 431 | scheduler_ipi(); |
| 432 | break; |
| 433 | |
| 434 | case IPI_CALL_FUNC: |
| 435 | irq_enter(); |
| 436 | generic_smp_call_function_interrupt(); |
| 437 | irq_exit(); |
| 438 | break; |
| 439 | |
| 440 | case IPI_CALL_FUNC_SINGLE: |
| 441 | irq_enter(); |
| 442 | generic_smp_call_function_single_interrupt(); |
| 443 | irq_exit(); |
| 444 | break; |
| 445 | |
| 446 | case IPI_CPU_STOP: |
| 447 | irq_enter(); |
| 448 | ipi_cpu_stop(cpu); |
| 449 | irq_exit(); |
| 450 | break; |
| 451 | |
| 452 | default: |
| 453 | pr_crit("CPU%u: Unknown IPI message 0x%x\n", cpu, ipinr); |
| 454 | break; |
| 455 | } |
| 456 | set_irq_regs(old_regs); |
| 457 | } |
| 458 | |
| 459 | void smp_send_reschedule(int cpu) |
| 460 | { |
| 461 | smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE); |
| 462 | } |
| 463 | |
| 464 | void smp_send_stop(void) |
| 465 | { |
| 466 | unsigned long timeout; |
| 467 | |
| 468 | if (num_online_cpus() > 1) { |
| 469 | cpumask_t mask; |
| 470 | |
| 471 | cpumask_copy(&mask, cpu_online_mask); |
| 472 | cpu_clear(smp_processor_id(), mask); |
| 473 | |
| 474 | smp_cross_call(&mask, IPI_CPU_STOP); |
| 475 | } |
| 476 | |
| 477 | /* Wait up to one second for other CPUs to stop */ |
| 478 | timeout = USEC_PER_SEC; |
| 479 | while (num_online_cpus() > 1 && timeout--) |
| 480 | udelay(1); |
| 481 | |
| 482 | if (num_online_cpus() > 1) |
| 483 | pr_warning("SMP: failed to stop secondary CPUs\n"); |
| 484 | } |
| 485 | |
| 486 | /* |
| 487 | * not supported here |
| 488 | */ |
| 489 | int setup_profiling_timer(unsigned int multiplier) |
| 490 | { |
| 491 | return -EINVAL; |
| 492 | } |