Linus Walleij | bc58177 | 2009-09-15 17:30:37 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2008-2009 ST-Ericsson AB |
| 3 | * License terms: GNU General Public License (GPL) version 2 |
| 4 | * TCM memory handling for ARM systems |
| 5 | * |
| 6 | * Author: Linus Walleij <linus.walleij@stericsson.com> |
| 7 | * Author: Rickard Andersson <rickard.andersson@stericsson.com> |
| 8 | */ |
| 9 | #include <linux/init.h> |
| 10 | #include <linux/kernel.h> |
| 11 | #include <linux/module.h> |
| 12 | #include <linux/stddef.h> |
| 13 | #include <linux/ioport.h> |
| 14 | #include <linux/genalloc.h> |
| 15 | #include <linux/string.h> /* memcpy */ |
Linus Walleij | bc58177 | 2009-09-15 17:30:37 +0100 | [diff] [blame] | 16 | #include <asm/cputype.h> |
| 17 | #include <asm/mach/map.h> |
Russell King | f4117ac | 2011-01-04 18:07:14 +0000 | [diff] [blame] | 18 | #include <asm/memory.h> |
David Howells | 9f97da7 | 2012-03-28 18:30:01 +0100 | [diff] [blame] | 19 | #include <asm/system_info.h> |
Linus Walleij | bc58177 | 2009-09-15 17:30:37 +0100 | [diff] [blame] | 20 | |
Linus Walleij | bc58177 | 2009-09-15 17:30:37 +0100 | [diff] [blame] | 21 | static struct gen_pool *tcm_pool; |
Linus Walleij | 201043f | 2011-07-01 08:23:36 +0100 | [diff] [blame] | 22 | static bool dtcm_present; |
| 23 | static bool itcm_present; |
Linus Walleij | bc58177 | 2009-09-15 17:30:37 +0100 | [diff] [blame] | 24 | |
| 25 | /* TCM section definitions from the linker */ |
| 26 | extern char __itcm_start, __sitcm_text, __eitcm_text; |
| 27 | extern char __dtcm_start, __sdtcm_data, __edtcm_data; |
| 28 | |
Linus Walleij | 1dbd30e | 2010-07-12 21:53:28 +0100 | [diff] [blame] | 29 | /* These will be increased as we run */ |
| 30 | u32 dtcm_end = DTCM_OFFSET; |
| 31 | u32 itcm_end = ITCM_OFFSET; |
| 32 | |
Linus Walleij | bc58177 | 2009-09-15 17:30:37 +0100 | [diff] [blame] | 33 | /* |
| 34 | * TCM memory resources |
| 35 | */ |
| 36 | static struct resource dtcm_res = { |
| 37 | .name = "DTCM RAM", |
| 38 | .start = DTCM_OFFSET, |
Linus Walleij | 1dbd30e | 2010-07-12 21:53:28 +0100 | [diff] [blame] | 39 | .end = DTCM_OFFSET, |
Linus Walleij | bc58177 | 2009-09-15 17:30:37 +0100 | [diff] [blame] | 40 | .flags = IORESOURCE_MEM |
| 41 | }; |
| 42 | |
| 43 | static struct resource itcm_res = { |
| 44 | .name = "ITCM RAM", |
| 45 | .start = ITCM_OFFSET, |
Linus Walleij | 1dbd30e | 2010-07-12 21:53:28 +0100 | [diff] [blame] | 46 | .end = ITCM_OFFSET, |
Linus Walleij | bc58177 | 2009-09-15 17:30:37 +0100 | [diff] [blame] | 47 | .flags = IORESOURCE_MEM |
| 48 | }; |
| 49 | |
| 50 | static struct map_desc dtcm_iomap[] __initdata = { |
| 51 | { |
| 52 | .virtual = DTCM_OFFSET, |
| 53 | .pfn = __phys_to_pfn(DTCM_OFFSET), |
Linus Walleij | 1dbd30e | 2010-07-12 21:53:28 +0100 | [diff] [blame] | 54 | .length = 0, |
Russell King | 2e2c9de | 2013-10-24 10:26:40 +0100 | [diff] [blame] | 55 | .type = MT_MEMORY_RW_DTCM |
Linus Walleij | bc58177 | 2009-09-15 17:30:37 +0100 | [diff] [blame] | 56 | } |
| 57 | }; |
| 58 | |
| 59 | static struct map_desc itcm_iomap[] __initdata = { |
| 60 | { |
| 61 | .virtual = ITCM_OFFSET, |
| 62 | .pfn = __phys_to_pfn(ITCM_OFFSET), |
Linus Walleij | 1dbd30e | 2010-07-12 21:53:28 +0100 | [diff] [blame] | 63 | .length = 0, |
Russell King | 2e2c9de | 2013-10-24 10:26:40 +0100 | [diff] [blame] | 64 | .type = MT_MEMORY_RWX_ITCM, |
Linus Walleij | bc58177 | 2009-09-15 17:30:37 +0100 | [diff] [blame] | 65 | } |
| 66 | }; |
| 67 | |
| 68 | /* |
| 69 | * Allocate a chunk of TCM memory |
| 70 | */ |
| 71 | void *tcm_alloc(size_t len) |
| 72 | { |
| 73 | unsigned long vaddr; |
| 74 | |
| 75 | if (!tcm_pool) |
| 76 | return NULL; |
| 77 | |
| 78 | vaddr = gen_pool_alloc(tcm_pool, len); |
| 79 | if (!vaddr) |
| 80 | return NULL; |
| 81 | |
| 82 | return (void *) vaddr; |
| 83 | } |
| 84 | EXPORT_SYMBOL(tcm_alloc); |
| 85 | |
| 86 | /* |
| 87 | * Free a chunk of TCM memory |
| 88 | */ |
| 89 | void tcm_free(void *addr, size_t len) |
| 90 | { |
| 91 | gen_pool_free(tcm_pool, (unsigned long) addr, len); |
| 92 | } |
| 93 | EXPORT_SYMBOL(tcm_free); |
| 94 | |
Linus Walleij | 201043f | 2011-07-01 08:23:36 +0100 | [diff] [blame] | 95 | bool tcm_dtcm_present(void) |
| 96 | { |
| 97 | return dtcm_present; |
| 98 | } |
| 99 | EXPORT_SYMBOL(tcm_dtcm_present); |
| 100 | |
| 101 | bool tcm_itcm_present(void) |
| 102 | { |
| 103 | return itcm_present; |
| 104 | } |
| 105 | EXPORT_SYMBOL(tcm_itcm_present); |
| 106 | |
Linus Walleij | 1dbd30e | 2010-07-12 21:53:28 +0100 | [diff] [blame] | 107 | static int __init setup_tcm_bank(u8 type, u8 bank, u8 banks, |
| 108 | u32 *offset) |
Linus Walleij | bc58177 | 2009-09-15 17:30:37 +0100 | [diff] [blame] | 109 | { |
| 110 | const int tcm_sizes[16] = { 0, -1, -1, 4, 8, 16, 32, 64, 128, |
| 111 | 256, 512, 1024, -1, -1, -1, -1 }; |
| 112 | u32 tcm_region; |
| 113 | int tcm_size; |
| 114 | |
Linus Walleij | 5985097 | 2010-07-12 21:51:41 +0100 | [diff] [blame] | 115 | /* |
| 116 | * If there are more than one TCM bank of this type, |
| 117 | * select the TCM bank to operate on in the TCM selection |
| 118 | * register. |
| 119 | */ |
| 120 | if (banks > 1) |
| 121 | asm("mcr p15, 0, %0, c9, c2, 0" |
| 122 | : /* No output operands */ |
| 123 | : "r" (bank)); |
| 124 | |
Linus Walleij | bc58177 | 2009-09-15 17:30:37 +0100 | [diff] [blame] | 125 | /* Read the special TCM region register c9, 0 */ |
| 126 | if (!type) |
| 127 | asm("mrc p15, 0, %0, c9, c1, 0" |
| 128 | : "=r" (tcm_region)); |
| 129 | else |
| 130 | asm("mrc p15, 0, %0, c9, c1, 1" |
| 131 | : "=r" (tcm_region)); |
| 132 | |
| 133 | tcm_size = tcm_sizes[(tcm_region >> 2) & 0x0f]; |
| 134 | if (tcm_size < 0) { |
Linus Walleij | 1dbd30e | 2010-07-12 21:53:28 +0100 | [diff] [blame] | 135 | pr_err("CPU: %sTCM%d of unknown size\n", |
Linus Walleij | 5985097 | 2010-07-12 21:51:41 +0100 | [diff] [blame] | 136 | type ? "I" : "D", bank); |
Linus Walleij | 1dbd30e | 2010-07-12 21:53:28 +0100 | [diff] [blame] | 137 | return -EINVAL; |
| 138 | } else if (tcm_size > 32) { |
| 139 | pr_err("CPU: %sTCM%d larger than 32k found\n", |
| 140 | type ? "I" : "D", bank); |
| 141 | return -EINVAL; |
Linus Walleij | bc58177 | 2009-09-15 17:30:37 +0100 | [diff] [blame] | 142 | } else { |
Linus Walleij | 5985097 | 2010-07-12 21:51:41 +0100 | [diff] [blame] | 143 | pr_info("CPU: found %sTCM%d %dk @ %08x, %senabled\n", |
Linus Walleij | bc58177 | 2009-09-15 17:30:37 +0100 | [diff] [blame] | 144 | type ? "I" : "D", |
Linus Walleij | 5985097 | 2010-07-12 21:51:41 +0100 | [diff] [blame] | 145 | bank, |
Linus Walleij | bc58177 | 2009-09-15 17:30:37 +0100 | [diff] [blame] | 146 | tcm_size, |
| 147 | (tcm_region & 0xfffff000U), |
| 148 | (tcm_region & 1) ? "" : "not "); |
| 149 | } |
| 150 | |
Linus Walleij | 9715efb | 2011-07-01 08:23:06 +0100 | [diff] [blame] | 151 | /* Not much fun you can do with a size 0 bank */ |
| 152 | if (tcm_size == 0) |
| 153 | return 0; |
| 154 | |
Linus Walleij | bc58177 | 2009-09-15 17:30:37 +0100 | [diff] [blame] | 155 | /* Force move the TCM bank to where we want it, enable */ |
Linus Walleij | 1dbd30e | 2010-07-12 21:53:28 +0100 | [diff] [blame] | 156 | tcm_region = *offset | (tcm_region & 0x00000ffeU) | 1; |
Linus Walleij | bc58177 | 2009-09-15 17:30:37 +0100 | [diff] [blame] | 157 | |
| 158 | if (!type) |
| 159 | asm("mcr p15, 0, %0, c9, c1, 0" |
| 160 | : /* No output operands */ |
| 161 | : "r" (tcm_region)); |
| 162 | else |
| 163 | asm("mcr p15, 0, %0, c9, c1, 1" |
| 164 | : /* No output operands */ |
| 165 | : "r" (tcm_region)); |
| 166 | |
Linus Walleij | 1dbd30e | 2010-07-12 21:53:28 +0100 | [diff] [blame] | 167 | /* Increase offset */ |
| 168 | *offset += (tcm_size << 10); |
| 169 | |
Linus Walleij | 5985097 | 2010-07-12 21:51:41 +0100 | [diff] [blame] | 170 | pr_info("CPU: moved %sTCM%d %dk to %08x, enabled\n", |
| 171 | type ? "I" : "D", |
| 172 | bank, |
| 173 | tcm_size, |
| 174 | (tcm_region & 0xfffff000U)); |
Linus Walleij | 1dbd30e | 2010-07-12 21:53:28 +0100 | [diff] [blame] | 175 | return 0; |
Linus Walleij | bc58177 | 2009-09-15 17:30:37 +0100 | [diff] [blame] | 176 | } |
| 177 | |
| 178 | /* |
| 179 | * This initializes the TCM memory |
| 180 | */ |
| 181 | void __init tcm_init(void) |
| 182 | { |
Linus Walleij | 90b9222 | 2011-12-12 09:24:40 +0100 | [diff] [blame] | 183 | u32 tcm_status; |
| 184 | u8 dtcm_banks; |
| 185 | u8 itcm_banks; |
Linus Walleij | 9715efb | 2011-07-01 08:23:06 +0100 | [diff] [blame] | 186 | size_t dtcm_code_sz = &__edtcm_data - &__sdtcm_data; |
| 187 | size_t itcm_code_sz = &__eitcm_text - &__sitcm_text; |
Linus Walleij | bc58177 | 2009-09-15 17:30:37 +0100 | [diff] [blame] | 188 | char *start; |
| 189 | char *end; |
| 190 | char *ram; |
Linus Walleij | 1dbd30e | 2010-07-12 21:53:28 +0100 | [diff] [blame] | 191 | int ret; |
Linus Walleij | 5985097 | 2010-07-12 21:51:41 +0100 | [diff] [blame] | 192 | int i; |
Linus Walleij | bc58177 | 2009-09-15 17:30:37 +0100 | [diff] [blame] | 193 | |
Linus Walleij | 90b9222 | 2011-12-12 09:24:40 +0100 | [diff] [blame] | 194 | /* |
| 195 | * Prior to ARMv5 there is no TCM, and trying to read the status |
| 196 | * register will hang the processor. |
| 197 | */ |
| 198 | if (cpu_architecture() < CPU_ARCH_ARMv5) { |
| 199 | if (dtcm_code_sz || itcm_code_sz) |
| 200 | pr_info("CPU TCM: %u bytes of DTCM and %u bytes of " |
| 201 | "ITCM code compiled in, but no TCM present " |
| 202 | "in pre-v5 CPU\n", dtcm_code_sz, itcm_code_sz); |
| 203 | return; |
| 204 | } |
| 205 | |
| 206 | tcm_status = read_cpuid_tcmstatus(); |
| 207 | dtcm_banks = (tcm_status >> 16) & 0x03; |
| 208 | itcm_banks = (tcm_status & 0x03); |
| 209 | |
Linus Walleij | 9715efb | 2011-07-01 08:23:06 +0100 | [diff] [blame] | 210 | /* Values greater than 2 for D/ITCM banks are "reserved" */ |
| 211 | if (dtcm_banks > 2) |
| 212 | dtcm_banks = 0; |
| 213 | if (itcm_banks > 2) |
| 214 | itcm_banks = 0; |
| 215 | |
Linus Walleij | bc58177 | 2009-09-15 17:30:37 +0100 | [diff] [blame] | 216 | /* Setup DTCM if present */ |
Linus Walleij | 1dbd30e | 2010-07-12 21:53:28 +0100 | [diff] [blame] | 217 | if (dtcm_banks > 0) { |
| 218 | for (i = 0; i < dtcm_banks; i++) { |
| 219 | ret = setup_tcm_bank(0, i, dtcm_banks, &dtcm_end); |
| 220 | if (ret) |
| 221 | return; |
| 222 | } |
Linus Walleij | 9715efb | 2011-07-01 08:23:06 +0100 | [diff] [blame] | 223 | /* This means you compiled more code than fits into DTCM */ |
| 224 | if (dtcm_code_sz > (dtcm_end - DTCM_OFFSET)) { |
| 225 | pr_info("CPU DTCM: %u bytes of code compiled to " |
| 226 | "DTCM but only %lu bytes of DTCM present\n", |
| 227 | dtcm_code_sz, (dtcm_end - DTCM_OFFSET)); |
| 228 | goto no_dtcm; |
| 229 | } |
Linus Walleij | 1dbd30e | 2010-07-12 21:53:28 +0100 | [diff] [blame] | 230 | dtcm_res.end = dtcm_end - 1; |
Linus Walleij | bc58177 | 2009-09-15 17:30:37 +0100 | [diff] [blame] | 231 | request_resource(&iomem_resource, &dtcm_res); |
Linus Walleij | 1dbd30e | 2010-07-12 21:53:28 +0100 | [diff] [blame] | 232 | dtcm_iomap[0].length = dtcm_end - DTCM_OFFSET; |
Linus Walleij | bc58177 | 2009-09-15 17:30:37 +0100 | [diff] [blame] | 233 | iotable_init(dtcm_iomap, 1); |
| 234 | /* Copy data from RAM to DTCM */ |
| 235 | start = &__sdtcm_data; |
| 236 | end = &__edtcm_data; |
| 237 | ram = &__dtcm_start; |
Linus Walleij | 9715efb | 2011-07-01 08:23:06 +0100 | [diff] [blame] | 238 | memcpy(start, ram, dtcm_code_sz); |
| 239 | pr_debug("CPU DTCM: copied data from %p - %p\n", |
| 240 | start, end); |
Linus Walleij | 201043f | 2011-07-01 08:23:36 +0100 | [diff] [blame] | 241 | dtcm_present = true; |
Linus Walleij | 9715efb | 2011-07-01 08:23:06 +0100 | [diff] [blame] | 242 | } else if (dtcm_code_sz) { |
| 243 | pr_info("CPU DTCM: %u bytes of code compiled to DTCM but no " |
| 244 | "DTCM banks present in CPU\n", dtcm_code_sz); |
Linus Walleij | bc58177 | 2009-09-15 17:30:37 +0100 | [diff] [blame] | 245 | } |
| 246 | |
Linus Walleij | 9715efb | 2011-07-01 08:23:06 +0100 | [diff] [blame] | 247 | no_dtcm: |
Linus Walleij | bc58177 | 2009-09-15 17:30:37 +0100 | [diff] [blame] | 248 | /* Setup ITCM if present */ |
Linus Walleij | 1dbd30e | 2010-07-12 21:53:28 +0100 | [diff] [blame] | 249 | if (itcm_banks > 0) { |
| 250 | for (i = 0; i < itcm_banks; i++) { |
| 251 | ret = setup_tcm_bank(1, i, itcm_banks, &itcm_end); |
| 252 | if (ret) |
| 253 | return; |
| 254 | } |
Linus Walleij | 9715efb | 2011-07-01 08:23:06 +0100 | [diff] [blame] | 255 | /* This means you compiled more code than fits into ITCM */ |
| 256 | if (itcm_code_sz > (itcm_end - ITCM_OFFSET)) { |
| 257 | pr_info("CPU ITCM: %u bytes of code compiled to " |
| 258 | "ITCM but only %lu bytes of ITCM present\n", |
| 259 | itcm_code_sz, (itcm_end - ITCM_OFFSET)); |
| 260 | return; |
| 261 | } |
Linus Walleij | 1dbd30e | 2010-07-12 21:53:28 +0100 | [diff] [blame] | 262 | itcm_res.end = itcm_end - 1; |
Linus Walleij | bc58177 | 2009-09-15 17:30:37 +0100 | [diff] [blame] | 263 | request_resource(&iomem_resource, &itcm_res); |
Linus Walleij | 1dbd30e | 2010-07-12 21:53:28 +0100 | [diff] [blame] | 264 | itcm_iomap[0].length = itcm_end - ITCM_OFFSET; |
Linus Walleij | bc58177 | 2009-09-15 17:30:37 +0100 | [diff] [blame] | 265 | iotable_init(itcm_iomap, 1); |
| 266 | /* Copy code from RAM to ITCM */ |
| 267 | start = &__sitcm_text; |
| 268 | end = &__eitcm_text; |
| 269 | ram = &__itcm_start; |
Linus Walleij | 9715efb | 2011-07-01 08:23:06 +0100 | [diff] [blame] | 270 | memcpy(start, ram, itcm_code_sz); |
| 271 | pr_debug("CPU ITCM: copied code from %p - %p\n", |
| 272 | start, end); |
Linus Walleij | 201043f | 2011-07-01 08:23:36 +0100 | [diff] [blame] | 273 | itcm_present = true; |
Linus Walleij | 9715efb | 2011-07-01 08:23:06 +0100 | [diff] [blame] | 274 | } else if (itcm_code_sz) { |
| 275 | pr_info("CPU ITCM: %u bytes of code compiled to ITCM but no " |
| 276 | "ITCM banks present in CPU\n", itcm_code_sz); |
Linus Walleij | bc58177 | 2009-09-15 17:30:37 +0100 | [diff] [blame] | 277 | } |
| 278 | } |
| 279 | |
| 280 | /* |
| 281 | * This creates the TCM memory pool and has to be done later, |
| 282 | * during the core_initicalls, since the allocator is not yet |
| 283 | * up and running when the first initialization runs. |
| 284 | */ |
| 285 | static int __init setup_tcm_pool(void) |
| 286 | { |
Linus Walleij | bc58177 | 2009-09-15 17:30:37 +0100 | [diff] [blame] | 287 | u32 dtcm_pool_start = (u32) &__edtcm_data; |
| 288 | u32 itcm_pool_start = (u32) &__eitcm_text; |
| 289 | int ret; |
| 290 | |
| 291 | /* |
| 292 | * Set up malloc pool, 2^2 = 4 bytes granularity since |
| 293 | * the TCM is sometimes just 4 KiB. NB: pages and cache |
| 294 | * line alignments does not matter in TCM! |
| 295 | */ |
| 296 | tcm_pool = gen_pool_create(2, -1); |
| 297 | |
| 298 | pr_debug("Setting up TCM memory pool\n"); |
| 299 | |
| 300 | /* Add the rest of DTCM to the TCM pool */ |
Linus Walleij | 201043f | 2011-07-01 08:23:36 +0100 | [diff] [blame] | 301 | if (dtcm_present) { |
Linus Walleij | 1dbd30e | 2010-07-12 21:53:28 +0100 | [diff] [blame] | 302 | if (dtcm_pool_start < dtcm_end) { |
Linus Walleij | bc58177 | 2009-09-15 17:30:37 +0100 | [diff] [blame] | 303 | ret = gen_pool_add(tcm_pool, dtcm_pool_start, |
Linus Walleij | 1dbd30e | 2010-07-12 21:53:28 +0100 | [diff] [blame] | 304 | dtcm_end - dtcm_pool_start, -1); |
Linus Walleij | bc58177 | 2009-09-15 17:30:37 +0100 | [diff] [blame] | 305 | if (ret) { |
| 306 | pr_err("CPU DTCM: could not add DTCM " \ |
| 307 | "remainder to pool!\n"); |
| 308 | return ret; |
| 309 | } |
| 310 | pr_debug("CPU DTCM: Added %08x bytes @ %08x to " \ |
| 311 | "the TCM memory pool\n", |
Linus Walleij | 1dbd30e | 2010-07-12 21:53:28 +0100 | [diff] [blame] | 312 | dtcm_end - dtcm_pool_start, |
Linus Walleij | bc58177 | 2009-09-15 17:30:37 +0100 | [diff] [blame] | 313 | dtcm_pool_start); |
| 314 | } |
| 315 | } |
| 316 | |
| 317 | /* Add the rest of ITCM to the TCM pool */ |
Linus Walleij | 201043f | 2011-07-01 08:23:36 +0100 | [diff] [blame] | 318 | if (itcm_present) { |
Linus Walleij | 1dbd30e | 2010-07-12 21:53:28 +0100 | [diff] [blame] | 319 | if (itcm_pool_start < itcm_end) { |
Linus Walleij | bc58177 | 2009-09-15 17:30:37 +0100 | [diff] [blame] | 320 | ret = gen_pool_add(tcm_pool, itcm_pool_start, |
Linus Walleij | 1dbd30e | 2010-07-12 21:53:28 +0100 | [diff] [blame] | 321 | itcm_end - itcm_pool_start, -1); |
Linus Walleij | bc58177 | 2009-09-15 17:30:37 +0100 | [diff] [blame] | 322 | if (ret) { |
| 323 | pr_err("CPU ITCM: could not add ITCM " \ |
| 324 | "remainder to pool!\n"); |
| 325 | return ret; |
| 326 | } |
| 327 | pr_debug("CPU ITCM: Added %08x bytes @ %08x to " \ |
| 328 | "the TCM memory pool\n", |
Linus Walleij | 1dbd30e | 2010-07-12 21:53:28 +0100 | [diff] [blame] | 329 | itcm_end - itcm_pool_start, |
Linus Walleij | bc58177 | 2009-09-15 17:30:37 +0100 | [diff] [blame] | 330 | itcm_pool_start); |
| 331 | } |
| 332 | } |
| 333 | return 0; |
| 334 | } |
| 335 | |
| 336 | core_initcall(setup_tcm_pool); |