Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * linux/arch/arm/kernel/bios32.c |
| 3 | * |
| 4 | * PCI bios-type initialisation for PCI machines |
| 5 | * |
| 6 | * Bits taken from various places. |
| 7 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 8 | #include <linux/module.h> |
| 9 | #include <linux/kernel.h> |
| 10 | #include <linux/pci.h> |
| 11 | #include <linux/slab.h> |
| 12 | #include <linux/init.h> |
| 13 | |
| 14 | #include <asm/io.h> |
| 15 | #include <asm/mach-types.h> |
| 16 | #include <asm/mach/pci.h> |
| 17 | |
| 18 | static int debug_pci; |
| 19 | static int use_firmware; |
| 20 | |
| 21 | /* |
| 22 | * We can't use pci_find_device() here since we are |
| 23 | * called from interrupt context. |
| 24 | */ |
| 25 | static void pcibios_bus_report_status(struct pci_bus *bus, u_int status_mask, int warn) |
| 26 | { |
| 27 | struct pci_dev *dev; |
| 28 | |
| 29 | list_for_each_entry(dev, &bus->devices, bus_list) { |
| 30 | u16 status; |
| 31 | |
| 32 | /* |
| 33 | * ignore host bridge - we handle |
| 34 | * that separately |
| 35 | */ |
| 36 | if (dev->bus->number == 0 && dev->devfn == 0) |
| 37 | continue; |
| 38 | |
| 39 | pci_read_config_word(dev, PCI_STATUS, &status); |
| 40 | if (status == 0xffff) |
| 41 | continue; |
| 42 | |
| 43 | if ((status & status_mask) == 0) |
| 44 | continue; |
| 45 | |
| 46 | /* clear the status errors */ |
| 47 | pci_write_config_word(dev, PCI_STATUS, status & status_mask); |
| 48 | |
| 49 | if (warn) |
| 50 | printk("(%s: %04X) ", pci_name(dev), status); |
| 51 | } |
| 52 | |
| 53 | list_for_each_entry(dev, &bus->devices, bus_list) |
| 54 | if (dev->subordinate) |
| 55 | pcibios_bus_report_status(dev->subordinate, status_mask, warn); |
| 56 | } |
| 57 | |
| 58 | void pcibios_report_status(u_int status_mask, int warn) |
| 59 | { |
| 60 | struct list_head *l; |
| 61 | |
| 62 | list_for_each(l, &pci_root_buses) { |
| 63 | struct pci_bus *bus = pci_bus_b(l); |
| 64 | |
| 65 | pcibios_bus_report_status(bus, status_mask, warn); |
| 66 | } |
| 67 | } |
| 68 | |
| 69 | /* |
| 70 | * We don't use this to fix the device, but initialisation of it. |
| 71 | * It's not the correct use for this, but it works. |
| 72 | * Note that the arbiter/ISA bridge appears to be buggy, specifically in |
| 73 | * the following area: |
| 74 | * 1. park on CPU |
| 75 | * 2. ISA bridge ping-pong |
| 76 | * 3. ISA bridge master handling of target RETRY |
| 77 | * |
| 78 | * Bug 3 is responsible for the sound DMA grinding to a halt. We now |
| 79 | * live with bug 2. |
| 80 | */ |
| 81 | static void __devinit pci_fixup_83c553(struct pci_dev *dev) |
| 82 | { |
| 83 | /* |
| 84 | * Set memory region to start at address 0, and enable IO |
| 85 | */ |
| 86 | pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, PCI_BASE_ADDRESS_SPACE_MEMORY); |
| 87 | pci_write_config_word(dev, PCI_COMMAND, PCI_COMMAND_IO); |
| 88 | |
| 89 | dev->resource[0].end -= dev->resource[0].start; |
| 90 | dev->resource[0].start = 0; |
| 91 | |
| 92 | /* |
| 93 | * All memory requests from ISA to be channelled to PCI |
| 94 | */ |
| 95 | pci_write_config_byte(dev, 0x48, 0xff); |
| 96 | |
| 97 | /* |
| 98 | * Enable ping-pong on bus master to ISA bridge transactions. |
| 99 | * This improves the sound DMA substantially. The fixed |
| 100 | * priority arbiter also helps (see below). |
| 101 | */ |
| 102 | pci_write_config_byte(dev, 0x42, 0x01); |
| 103 | |
| 104 | /* |
| 105 | * Enable PCI retry |
| 106 | */ |
| 107 | pci_write_config_byte(dev, 0x40, 0x22); |
| 108 | |
| 109 | /* |
| 110 | * We used to set the arbiter to "park on last master" (bit |
| 111 | * 1 set), but unfortunately the CyberPro does not park the |
| 112 | * bus. We must therefore park on CPU. Unfortunately, this |
| 113 | * may trigger yet another bug in the 553. |
| 114 | */ |
| 115 | pci_write_config_byte(dev, 0x83, 0x02); |
| 116 | |
| 117 | /* |
| 118 | * Make the ISA DMA request lowest priority, and disable |
| 119 | * rotating priorities completely. |
| 120 | */ |
| 121 | pci_write_config_byte(dev, 0x80, 0x11); |
| 122 | pci_write_config_byte(dev, 0x81, 0x00); |
| 123 | |
| 124 | /* |
| 125 | * Route INTA input to IRQ 11, and set IRQ11 to be level |
| 126 | * sensitive. |
| 127 | */ |
| 128 | pci_write_config_word(dev, 0x44, 0xb000); |
| 129 | outb(0x08, 0x4d1); |
| 130 | } |
| 131 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_83C553, pci_fixup_83c553); |
| 132 | |
| 133 | static void __devinit pci_fixup_unassign(struct pci_dev *dev) |
| 134 | { |
| 135 | dev->resource[0].end -= dev->resource[0].start; |
| 136 | dev->resource[0].start = 0; |
| 137 | } |
| 138 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_WINBOND2, PCI_DEVICE_ID_WINBOND2_89C940F, pci_fixup_unassign); |
| 139 | |
| 140 | /* |
| 141 | * Prevent the PCI layer from seeing the resources allocated to this device |
| 142 | * if it is the host bridge by marking it as such. These resources are of |
| 143 | * no consequence to the PCI layer (they are handled elsewhere). |
| 144 | */ |
| 145 | static void __devinit pci_fixup_dec21285(struct pci_dev *dev) |
| 146 | { |
| 147 | int i; |
| 148 | |
| 149 | if (dev->devfn == 0) { |
| 150 | dev->class &= 0xff; |
| 151 | dev->class |= PCI_CLASS_BRIDGE_HOST << 8; |
| 152 | for (i = 0; i < PCI_NUM_RESOURCES; i++) { |
| 153 | dev->resource[i].start = 0; |
| 154 | dev->resource[i].end = 0; |
| 155 | dev->resource[i].flags = 0; |
| 156 | } |
| 157 | } |
| 158 | } |
| 159 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_21285, pci_fixup_dec21285); |
| 160 | |
| 161 | /* |
| 162 | * Same as above. The PrPMC800 carrier board for the PrPMC1100 |
| 163 | * card maps the host-bridge @ 00:01:00 for some reason and it |
| 164 | * ends up getting scanned. Note that we only want to do this |
| 165 | * fixup when we find the IXP4xx on a PrPMC system, which is why |
| 166 | * we check the machine type. We could be running on a board |
| 167 | * with an IXP4xx target device and we don't want to kill the |
| 168 | * resources in that case. |
| 169 | */ |
| 170 | static void __devinit pci_fixup_prpmc1100(struct pci_dev *dev) |
| 171 | { |
| 172 | int i; |
| 173 | |
| 174 | if (machine_is_prpmc1100()) { |
| 175 | dev->class &= 0xff; |
| 176 | dev->class |= PCI_CLASS_BRIDGE_HOST << 8; |
| 177 | for (i = 0; i < PCI_NUM_RESOURCES; i++) { |
| 178 | dev->resource[i].start = 0; |
| 179 | dev->resource[i].end = 0; |
| 180 | dev->resource[i].flags = 0; |
| 181 | } |
| 182 | } |
| 183 | } |
| 184 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IXP4XX, pci_fixup_prpmc1100); |
| 185 | |
| 186 | /* |
| 187 | * PCI IDE controllers use non-standard I/O port decoding, respect it. |
| 188 | */ |
| 189 | static void __devinit pci_fixup_ide_bases(struct pci_dev *dev) |
| 190 | { |
| 191 | struct resource *r; |
| 192 | int i; |
| 193 | |
| 194 | if ((dev->class >> 8) != PCI_CLASS_STORAGE_IDE) |
| 195 | return; |
| 196 | |
| 197 | for (i = 0; i < PCI_NUM_RESOURCES; i++) { |
| 198 | r = dev->resource + i; |
| 199 | if ((r->start & ~0x80) == 0x374) { |
| 200 | r->start |= 2; |
| 201 | r->end = r->start; |
| 202 | } |
| 203 | } |
| 204 | } |
| 205 | DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pci_fixup_ide_bases); |
| 206 | |
| 207 | /* |
| 208 | * Put the DEC21142 to sleep |
| 209 | */ |
| 210 | static void __devinit pci_fixup_dec21142(struct pci_dev *dev) |
| 211 | { |
| 212 | pci_write_config_dword(dev, 0x40, 0x80000000); |
| 213 | } |
| 214 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_21142, pci_fixup_dec21142); |
| 215 | |
| 216 | /* |
| 217 | * The CY82C693 needs some rather major fixups to ensure that it does |
| 218 | * the right thing. Idea from the Alpha people, with a few additions. |
| 219 | * |
| 220 | * We ensure that the IDE base registers are set to 1f0/3f4 for the |
| 221 | * primary bus, and 170/374 for the secondary bus. Also, hide them |
| 222 | * from the PCI subsystem view as well so we won't try to perform |
| 223 | * our own auto-configuration on them. |
| 224 | * |
| 225 | * In addition, we ensure that the PCI IDE interrupts are routed to |
| 226 | * IRQ 14 and IRQ 15 respectively. |
| 227 | * |
| 228 | * The above gets us to a point where the IDE on this device is |
| 229 | * functional. However, The CY82C693U _does not work_ in bus |
| 230 | * master mode without locking the PCI bus solid. |
| 231 | */ |
| 232 | static void __devinit pci_fixup_cy82c693(struct pci_dev *dev) |
| 233 | { |
| 234 | if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE) { |
| 235 | u32 base0, base1; |
| 236 | |
| 237 | if (dev->class & 0x80) { /* primary */ |
| 238 | base0 = 0x1f0; |
| 239 | base1 = 0x3f4; |
| 240 | } else { /* secondary */ |
| 241 | base0 = 0x170; |
| 242 | base1 = 0x374; |
| 243 | } |
| 244 | |
| 245 | pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, |
| 246 | base0 | PCI_BASE_ADDRESS_SPACE_IO); |
| 247 | pci_write_config_dword(dev, PCI_BASE_ADDRESS_1, |
| 248 | base1 | PCI_BASE_ADDRESS_SPACE_IO); |
| 249 | |
| 250 | dev->resource[0].start = 0; |
| 251 | dev->resource[0].end = 0; |
| 252 | dev->resource[0].flags = 0; |
| 253 | |
| 254 | dev->resource[1].start = 0; |
| 255 | dev->resource[1].end = 0; |
| 256 | dev->resource[1].flags = 0; |
| 257 | } else if (PCI_FUNC(dev->devfn) == 0) { |
| 258 | /* |
| 259 | * Setup IDE IRQ routing. |
| 260 | */ |
| 261 | pci_write_config_byte(dev, 0x4b, 14); |
| 262 | pci_write_config_byte(dev, 0x4c, 15); |
| 263 | |
| 264 | /* |
| 265 | * Disable FREQACK handshake, enable USB. |
| 266 | */ |
| 267 | pci_write_config_byte(dev, 0x4d, 0x41); |
| 268 | |
| 269 | /* |
| 270 | * Enable PCI retry, and PCI post-write buffer. |
| 271 | */ |
| 272 | pci_write_config_byte(dev, 0x44, 0x17); |
| 273 | |
| 274 | /* |
| 275 | * Enable ISA master and DMA post write buffering. |
| 276 | */ |
| 277 | pci_write_config_byte(dev, 0x45, 0x03); |
| 278 | } |
| 279 | } |
| 280 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_CONTAQ, PCI_DEVICE_ID_CONTAQ_82C693, pci_fixup_cy82c693); |
| 281 | |
| 282 | void __devinit pcibios_update_irq(struct pci_dev *dev, int irq) |
| 283 | { |
| 284 | if (debug_pci) |
| 285 | printk("PCI: Assigning IRQ %02d to %s\n", irq, pci_name(dev)); |
| 286 | pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq); |
| 287 | } |
| 288 | |
| 289 | /* |
| 290 | * If the bus contains any of these devices, then we must not turn on |
| 291 | * parity checking of any kind. Currently this is CyberPro 20x0 only. |
| 292 | */ |
| 293 | static inline int pdev_bad_for_parity(struct pci_dev *dev) |
| 294 | { |
| 295 | return (dev->vendor == PCI_VENDOR_ID_INTERG && |
| 296 | (dev->device == PCI_DEVICE_ID_INTERG_2000 || |
| 297 | dev->device == PCI_DEVICE_ID_INTERG_2010)); |
| 298 | } |
| 299 | |
| 300 | /* |
| 301 | * Adjust the device resources from bus-centric to Linux-centric. |
| 302 | */ |
| 303 | static void __devinit |
| 304 | pdev_fixup_device_resources(struct pci_sys_data *root, struct pci_dev *dev) |
| 305 | { |
Greg Kroah-Hartman | e31dd6e | 2006-06-12 17:06:02 -0700 | [diff] [blame] | 306 | resource_size_t offset; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 307 | int i; |
| 308 | |
| 309 | for (i = 0; i < PCI_NUM_RESOURCES; i++) { |
| 310 | if (dev->resource[i].start == 0) |
| 311 | continue; |
| 312 | if (dev->resource[i].flags & IORESOURCE_MEM) |
| 313 | offset = root->mem_offset; |
| 314 | else |
| 315 | offset = root->io_offset; |
| 316 | |
| 317 | dev->resource[i].start += offset; |
| 318 | dev->resource[i].end += offset; |
| 319 | } |
| 320 | } |
| 321 | |
| 322 | static void __devinit |
| 323 | pbus_assign_bus_resources(struct pci_bus *bus, struct pci_sys_data *root) |
| 324 | { |
| 325 | struct pci_dev *dev = bus->self; |
| 326 | int i; |
| 327 | |
| 328 | if (!dev) { |
| 329 | /* |
| 330 | * Assign root bus resources. |
| 331 | */ |
| 332 | for (i = 0; i < 3; i++) |
| 333 | bus->resource[i] = root->resource[i]; |
| 334 | } |
| 335 | } |
| 336 | |
| 337 | /* |
| 338 | * pcibios_fixup_bus - Called after each bus is probed, |
| 339 | * but before its children are examined. |
| 340 | */ |
| 341 | void __devinit pcibios_fixup_bus(struct pci_bus *bus) |
| 342 | { |
| 343 | struct pci_sys_data *root = bus->sysdata; |
| 344 | struct pci_dev *dev; |
| 345 | u16 features = PCI_COMMAND_SERR | PCI_COMMAND_PARITY | PCI_COMMAND_FAST_BACK; |
| 346 | |
| 347 | pbus_assign_bus_resources(bus, root); |
| 348 | |
| 349 | /* |
| 350 | * Walk the devices on this bus, working out what we can |
| 351 | * and can't support. |
| 352 | */ |
| 353 | list_for_each_entry(dev, &bus->devices, bus_list) { |
| 354 | u16 status; |
| 355 | |
| 356 | pdev_fixup_device_resources(root, dev); |
| 357 | |
| 358 | pci_read_config_word(dev, PCI_STATUS, &status); |
| 359 | |
| 360 | /* |
| 361 | * If any device on this bus does not support fast back |
| 362 | * to back transfers, then the bus as a whole is not able |
| 363 | * to support them. Having fast back to back transfers |
| 364 | * on saves us one PCI cycle per transaction. |
| 365 | */ |
| 366 | if (!(status & PCI_STATUS_FAST_BACK)) |
| 367 | features &= ~PCI_COMMAND_FAST_BACK; |
| 368 | |
| 369 | if (pdev_bad_for_parity(dev)) |
| 370 | features &= ~(PCI_COMMAND_SERR | PCI_COMMAND_PARITY); |
| 371 | |
| 372 | switch (dev->class >> 8) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 373 | case PCI_CLASS_BRIDGE_PCI: |
| 374 | pci_read_config_word(dev, PCI_BRIDGE_CONTROL, &status); |
| 375 | status |= PCI_BRIDGE_CTL_PARITY|PCI_BRIDGE_CTL_MASTER_ABORT; |
| 376 | status &= ~(PCI_BRIDGE_CTL_BUS_RESET|PCI_BRIDGE_CTL_FAST_BACK); |
| 377 | pci_write_config_word(dev, PCI_BRIDGE_CONTROL, status); |
| 378 | break; |
| 379 | |
| 380 | case PCI_CLASS_BRIDGE_CARDBUS: |
| 381 | pci_read_config_word(dev, PCI_CB_BRIDGE_CONTROL, &status); |
| 382 | status |= PCI_CB_BRIDGE_CTL_PARITY|PCI_CB_BRIDGE_CTL_MASTER_ABORT; |
| 383 | pci_write_config_word(dev, PCI_CB_BRIDGE_CONTROL, status); |
| 384 | break; |
| 385 | } |
| 386 | } |
| 387 | |
| 388 | /* |
| 389 | * Now walk the devices again, this time setting them up. |
| 390 | */ |
| 391 | list_for_each_entry(dev, &bus->devices, bus_list) { |
| 392 | u16 cmd; |
| 393 | |
| 394 | pci_read_config_word(dev, PCI_COMMAND, &cmd); |
| 395 | cmd |= features; |
| 396 | pci_write_config_word(dev, PCI_COMMAND, cmd); |
| 397 | |
| 398 | pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, |
| 399 | L1_CACHE_BYTES >> 2); |
| 400 | } |
| 401 | |
| 402 | /* |
| 403 | * Propagate the flags to the PCI bridge. |
| 404 | */ |
| 405 | if (bus->self && bus->self->hdr_type == PCI_HEADER_TYPE_BRIDGE) { |
| 406 | if (features & PCI_COMMAND_FAST_BACK) |
| 407 | bus->bridge_ctl |= PCI_BRIDGE_CTL_FAST_BACK; |
| 408 | if (features & PCI_COMMAND_PARITY) |
| 409 | bus->bridge_ctl |= PCI_BRIDGE_CTL_PARITY; |
| 410 | } |
| 411 | |
| 412 | /* |
| 413 | * Report what we did for this bus |
| 414 | */ |
| 415 | printk(KERN_INFO "PCI: bus%d: Fast back to back transfers %sabled\n", |
| 416 | bus->number, (features & PCI_COMMAND_FAST_BACK) ? "en" : "dis"); |
| 417 | } |
| 418 | |
| 419 | /* |
| 420 | * Convert from Linux-centric to bus-centric addresses for bridge devices. |
| 421 | */ |
| 422 | void __devinit |
| 423 | pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region, |
| 424 | struct resource *res) |
| 425 | { |
| 426 | struct pci_sys_data *root = dev->sysdata; |
| 427 | unsigned long offset = 0; |
| 428 | |
| 429 | if (res->flags & IORESOURCE_IO) |
| 430 | offset = root->io_offset; |
| 431 | if (res->flags & IORESOURCE_MEM) |
| 432 | offset = root->mem_offset; |
| 433 | |
| 434 | region->start = res->start - offset; |
| 435 | region->end = res->end - offset; |
| 436 | } |
| 437 | |
Dominik Brodowski | 43c3473 | 2005-08-04 18:06:21 -0700 | [diff] [blame] | 438 | void __devinit |
| 439 | pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res, |
| 440 | struct pci_bus_region *region) |
| 441 | { |
| 442 | struct pci_sys_data *root = dev->sysdata; |
| 443 | unsigned long offset = 0; |
| 444 | |
| 445 | if (res->flags & IORESOURCE_IO) |
| 446 | offset = root->io_offset; |
| 447 | if (res->flags & IORESOURCE_MEM) |
| 448 | offset = root->mem_offset; |
| 449 | |
| 450 | res->start = region->start + offset; |
| 451 | res->end = region->end + offset; |
| 452 | } |
| 453 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 454 | #ifdef CONFIG_HOTPLUG |
| 455 | EXPORT_SYMBOL(pcibios_fixup_bus); |
| 456 | EXPORT_SYMBOL(pcibios_resource_to_bus); |
Dominik Brodowski | 43c3473 | 2005-08-04 18:06:21 -0700 | [diff] [blame] | 457 | EXPORT_SYMBOL(pcibios_bus_to_resource); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 458 | #endif |
| 459 | |
| 460 | /* |
| 461 | * This is the standard PCI-PCI bridge swizzling algorithm: |
| 462 | * |
| 463 | * Dev: 0 1 2 3 |
| 464 | * A A B C D |
| 465 | * B B C D A |
| 466 | * C C D A B |
| 467 | * D D A B C |
| 468 | * ^^^^^^^^^^ irq pin on bridge |
| 469 | */ |
| 470 | u8 __devinit pci_std_swizzle(struct pci_dev *dev, u8 *pinp) |
| 471 | { |
| 472 | int pin = *pinp - 1; |
| 473 | |
| 474 | while (dev->bus->self) { |
| 475 | pin = (pin + PCI_SLOT(dev->devfn)) & 3; |
| 476 | /* |
| 477 | * move up the chain of bridges, |
| 478 | * swizzling as we go. |
| 479 | */ |
| 480 | dev = dev->bus->self; |
| 481 | } |
| 482 | *pinp = pin + 1; |
| 483 | |
| 484 | return PCI_SLOT(dev->devfn); |
| 485 | } |
| 486 | |
| 487 | /* |
| 488 | * Swizzle the device pin each time we cross a bridge. |
| 489 | * This might update pin and returns the slot number. |
| 490 | */ |
| 491 | static u8 __devinit pcibios_swizzle(struct pci_dev *dev, u8 *pin) |
| 492 | { |
| 493 | struct pci_sys_data *sys = dev->sysdata; |
| 494 | int slot = 0, oldpin = *pin; |
| 495 | |
| 496 | if (sys->swizzle) |
| 497 | slot = sys->swizzle(dev, pin); |
| 498 | |
| 499 | if (debug_pci) |
| 500 | printk("PCI: %s swizzling pin %d => pin %d slot %d\n", |
| 501 | pci_name(dev), oldpin, *pin, slot); |
| 502 | |
| 503 | return slot; |
| 504 | } |
| 505 | |
| 506 | /* |
| 507 | * Map a slot/pin to an IRQ. |
| 508 | */ |
| 509 | static int pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin) |
| 510 | { |
| 511 | struct pci_sys_data *sys = dev->sysdata; |
| 512 | int irq = -1; |
| 513 | |
| 514 | if (sys->map_irq) |
| 515 | irq = sys->map_irq(dev, slot, pin); |
| 516 | |
| 517 | if (debug_pci) |
| 518 | printk("PCI: %s mapping slot %d pin %d => irq %d\n", |
| 519 | pci_name(dev), slot, pin, irq); |
| 520 | |
| 521 | return irq; |
| 522 | } |
| 523 | |
| 524 | static void __init pcibios_init_hw(struct hw_pci *hw) |
| 525 | { |
| 526 | struct pci_sys_data *sys = NULL; |
| 527 | int ret; |
| 528 | int nr, busnr; |
| 529 | |
| 530 | for (nr = busnr = 0; nr < hw->nr_controllers; nr++) { |
Russell King | d2a02b9 | 2006-03-20 19:46:41 +0000 | [diff] [blame] | 531 | sys = kzalloc(sizeof(struct pci_sys_data), GFP_KERNEL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 532 | if (!sys) |
| 533 | panic("PCI: unable to allocate sys data!"); |
| 534 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 535 | sys->hw = hw; |
| 536 | sys->busnr = busnr; |
| 537 | sys->swizzle = hw->swizzle; |
| 538 | sys->map_irq = hw->map_irq; |
| 539 | sys->resource[0] = &ioport_resource; |
| 540 | sys->resource[1] = &iomem_resource; |
| 541 | |
| 542 | ret = hw->setup(nr, sys); |
| 543 | |
| 544 | if (ret > 0) { |
| 545 | sys->bus = hw->scan(nr, sys); |
| 546 | |
| 547 | if (!sys->bus) |
| 548 | panic("PCI: unable to scan bus!"); |
| 549 | |
| 550 | busnr = sys->bus->subordinate + 1; |
| 551 | |
| 552 | list_add(&sys->node, &hw->buses); |
| 553 | } else { |
| 554 | kfree(sys); |
| 555 | if (ret < 0) |
| 556 | break; |
| 557 | } |
| 558 | } |
| 559 | } |
| 560 | |
| 561 | void __init pci_common_init(struct hw_pci *hw) |
| 562 | { |
| 563 | struct pci_sys_data *sys; |
| 564 | |
| 565 | INIT_LIST_HEAD(&hw->buses); |
| 566 | |
| 567 | if (hw->preinit) |
| 568 | hw->preinit(); |
| 569 | pcibios_init_hw(hw); |
| 570 | if (hw->postinit) |
| 571 | hw->postinit(); |
| 572 | |
| 573 | pci_fixup_irqs(pcibios_swizzle, pcibios_map_irq); |
| 574 | |
| 575 | list_for_each_entry(sys, &hw->buses, node) { |
| 576 | struct pci_bus *bus = sys->bus; |
| 577 | |
| 578 | if (!use_firmware) { |
| 579 | /* |
| 580 | * Size the bridge windows. |
| 581 | */ |
| 582 | pci_bus_size_bridges(bus); |
| 583 | |
| 584 | /* |
| 585 | * Assign resources. |
| 586 | */ |
| 587 | pci_bus_assign_resources(bus); |
| 588 | } |
| 589 | |
| 590 | /* |
| 591 | * Tell drivers about devices found. |
| 592 | */ |
| 593 | pci_bus_add_devices(bus); |
| 594 | } |
| 595 | } |
| 596 | |
| 597 | char * __init pcibios_setup(char *str) |
| 598 | { |
| 599 | if (!strcmp(str, "debug")) { |
| 600 | debug_pci = 1; |
| 601 | return NULL; |
| 602 | } else if (!strcmp(str, "firmware")) { |
| 603 | use_firmware = 1; |
| 604 | return NULL; |
| 605 | } |
| 606 | return str; |
| 607 | } |
| 608 | |
| 609 | /* |
| 610 | * From arch/i386/kernel/pci-i386.c: |
| 611 | * |
| 612 | * We need to avoid collisions with `mirrored' VGA ports |
| 613 | * and other strange ISA hardware, so we always want the |
| 614 | * addresses to be allocated in the 0x000-0x0ff region |
| 615 | * modulo 0x400. |
| 616 | * |
| 617 | * Why? Because some silly external IO cards only decode |
| 618 | * the low 10 bits of the IO address. The 0x00-0xff region |
| 619 | * is reserved for motherboard devices that decode all 16 |
| 620 | * bits, so it's ok to allocate at, say, 0x2800-0x28ff, |
| 621 | * but we want to try to avoid allocating at 0x2900-0x2bff |
| 622 | * which might be mirrored at 0x0100-0x03ff.. |
| 623 | */ |
| 624 | void pcibios_align_resource(void *data, struct resource *res, |
Greg Kroah-Hartman | e31dd6e | 2006-06-12 17:06:02 -0700 | [diff] [blame] | 625 | resource_size_t size, resource_size_t align) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 626 | { |
Greg Kroah-Hartman | e31dd6e | 2006-06-12 17:06:02 -0700 | [diff] [blame] | 627 | resource_size_t start = res->start; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 628 | |
| 629 | if (res->flags & IORESOURCE_IO && start & 0x300) |
| 630 | start = (start + 0x3ff) & ~0x3ff; |
| 631 | |
| 632 | res->start = (start + align - 1) & ~(align - 1); |
| 633 | } |
| 634 | |
| 635 | /** |
| 636 | * pcibios_enable_device - Enable I/O and memory. |
| 637 | * @dev: PCI device to be enabled |
| 638 | */ |
| 639 | int pcibios_enable_device(struct pci_dev *dev, int mask) |
| 640 | { |
| 641 | u16 cmd, old_cmd; |
| 642 | int idx; |
| 643 | struct resource *r; |
| 644 | |
| 645 | pci_read_config_word(dev, PCI_COMMAND, &cmd); |
| 646 | old_cmd = cmd; |
| 647 | for (idx = 0; idx < 6; idx++) { |
| 648 | /* Only set up the requested stuff */ |
| 649 | if (!(mask & (1 << idx))) |
| 650 | continue; |
| 651 | |
| 652 | r = dev->resource + idx; |
| 653 | if (!r->start && r->end) { |
| 654 | printk(KERN_ERR "PCI: Device %s not available because" |
| 655 | " of resource collisions\n", pci_name(dev)); |
| 656 | return -EINVAL; |
| 657 | } |
| 658 | if (r->flags & IORESOURCE_IO) |
| 659 | cmd |= PCI_COMMAND_IO; |
| 660 | if (r->flags & IORESOURCE_MEM) |
| 661 | cmd |= PCI_COMMAND_MEMORY; |
| 662 | } |
| 663 | |
| 664 | /* |
| 665 | * Bridges (eg, cardbus bridges) need to be fully enabled |
| 666 | */ |
| 667 | if ((dev->class >> 16) == PCI_BASE_CLASS_BRIDGE) |
| 668 | cmd |= PCI_COMMAND_IO | PCI_COMMAND_MEMORY; |
| 669 | |
| 670 | if (cmd != old_cmd) { |
| 671 | printk("PCI: enabling device %s (%04x -> %04x)\n", |
| 672 | pci_name(dev), old_cmd, cmd); |
| 673 | pci_write_config_word(dev, PCI_COMMAND, cmd); |
| 674 | } |
| 675 | return 0; |
| 676 | } |
| 677 | |
| 678 | int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, |
| 679 | enum pci_mmap_state mmap_state, int write_combine) |
| 680 | { |
| 681 | struct pci_sys_data *root = dev->sysdata; |
| 682 | unsigned long phys; |
| 683 | |
| 684 | if (mmap_state == pci_mmap_io) { |
| 685 | return -EINVAL; |
| 686 | } else { |
| 687 | phys = vma->vm_pgoff + (root->mem_offset >> PAGE_SHIFT); |
| 688 | } |
| 689 | |
| 690 | /* |
| 691 | * Mark this as IO |
| 692 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 693 | vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); |
| 694 | |
| 695 | if (remap_pfn_range(vma, vma->vm_start, phys, |
| 696 | vma->vm_end - vma->vm_start, |
| 697 | vma->vm_page_prot)) |
| 698 | return -EAGAIN; |
| 699 | |
| 700 | return 0; |
| 701 | } |