blob: 710af89b176d0b8a7fcbed56dbb3a56b762e27f8 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * Intel AGPGART routines.
3 */
4
Linus Torvalds1da177e2005-04-16 15:20:36 -07005#include <linux/module.h>
6#include <linux/pci.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +09007#include <linux/slab.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -07008#include <linux/init.h>
Ahmed S. Darwish1eaf1222007-02-06 18:08:28 +02009#include <linux/kernel.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070010#include <linux/pagemap.h>
11#include <linux/agp_backend.h>
Borislav Petkov48a719c2010-01-22 16:01:04 +010012#include <asm/smp.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070013#include "agp.h"
Daniel Vetterff7cdd62010-04-14 00:29:51 +020014#include "intel-agp.h"
Linus Torvalds1da177e2005-04-16 15:20:36 -070015
Daniel Vetterf51b7662010-04-14 00:29:52 +020016#include "intel-gtt.c"
Linus Torvalds1da177e2005-04-16 15:20:36 -070017
Zhenyu Wang1f7a6e32010-02-23 14:05:24 +080018int intel_agp_enabled;
19EXPORT_SYMBOL(intel_agp_enabled);
20
Linus Torvalds1da177e2005-04-16 15:20:36 -070021static int intel_fetch_size(void)
22{
23 int i;
24 u16 temp;
25 struct aper_size_info_16 *values;
26
27 pci_read_config_word(agp_bridge->dev, INTEL_APSIZE, &temp);
28 values = A_SIZE_16(agp_bridge->driver->aperture_sizes);
29
30 for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) {
31 if (temp == values[i].size_value) {
32 agp_bridge->previous_size = agp_bridge->current_size = (void *) (values + i);
33 agp_bridge->aperture_size_idx = i;
34 return values[i].size;
35 }
36 }
37
38 return 0;
39}
40
41static int __intel_8xx_fetch_size(u8 temp)
42{
43 int i;
44 struct aper_size_info_8 *values;
45
46 values = A_SIZE_8(agp_bridge->driver->aperture_sizes);
47
48 for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) {
49 if (temp == values[i].size_value) {
50 agp_bridge->previous_size =
51 agp_bridge->current_size = (void *) (values + i);
52 agp_bridge->aperture_size_idx = i;
53 return values[i].size;
54 }
55 }
56 return 0;
57}
58
59static int intel_8xx_fetch_size(void)
60{
61 u8 temp;
62
63 pci_read_config_byte(agp_bridge->dev, INTEL_APSIZE, &temp);
64 return __intel_8xx_fetch_size(temp);
65}
66
67static int intel_815_fetch_size(void)
68{
69 u8 temp;
70
71 /* Intel 815 chipsets have a _weird_ APSIZE register with only
72 * one non-reserved bit, so mask the others out ... */
73 pci_read_config_byte(agp_bridge->dev, INTEL_APSIZE, &temp);
74 temp &= (1 << 3);
75
76 return __intel_8xx_fetch_size(temp);
77}
78
79static void intel_tlbflush(struct agp_memory *mem)
80{
81 pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x2200);
82 pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x2280);
83}
84
85
86static void intel_8xx_tlbflush(struct agp_memory *mem)
87{
88 u32 temp;
89 pci_read_config_dword(agp_bridge->dev, INTEL_AGPCTRL, &temp);
90 pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, temp & ~(1 << 7));
91 pci_read_config_dword(agp_bridge->dev, INTEL_AGPCTRL, &temp);
92 pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, temp | (1 << 7));
93}
94
95
96static void intel_cleanup(void)
97{
98 u16 temp;
99 struct aper_size_info_16 *previous_size;
100
101 previous_size = A_SIZE_16(agp_bridge->previous_size);
102 pci_read_config_word(agp_bridge->dev, INTEL_NBXCFG, &temp);
103 pci_write_config_word(agp_bridge->dev, INTEL_NBXCFG, temp & ~(1 << 9));
104 pci_write_config_word(agp_bridge->dev, INTEL_APSIZE, previous_size->size_value);
105}
106
107
108static void intel_8xx_cleanup(void)
109{
110 u16 temp;
111 struct aper_size_info_8 *previous_size;
112
113 previous_size = A_SIZE_8(agp_bridge->previous_size);
114 pci_read_config_word(agp_bridge->dev, INTEL_NBXCFG, &temp);
115 pci_write_config_word(agp_bridge->dev, INTEL_NBXCFG, temp & ~(1 << 9));
116 pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, previous_size->size_value);
117}
118
119
120static int intel_configure(void)
121{
122 u32 temp;
123 u16 temp2;
124 struct aper_size_info_16 *current_size;
125
126 current_size = A_SIZE_16(agp_bridge->current_size);
127
128 /* aperture size */
129 pci_write_config_word(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
130
131 /* address to map to */
132 pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
133 agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
134
135 /* attbase - aperture base */
136 pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
137
138 /* agpctrl */
139 pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x2280);
140
141 /* paccfg/nbxcfg */
142 pci_read_config_word(agp_bridge->dev, INTEL_NBXCFG, &temp2);
143 pci_write_config_word(agp_bridge->dev, INTEL_NBXCFG,
144 (temp2 & ~(1 << 10)) | (1 << 9));
145 /* clear any possible error conditions */
146 pci_write_config_byte(agp_bridge->dev, INTEL_ERRSTS + 1, 7);
147 return 0;
148}
149
150static int intel_815_configure(void)
151{
152 u32 temp, addr;
153 u8 temp2;
154 struct aper_size_info_8 *current_size;
155
156 /* attbase - aperture base */
157 /* the Intel 815 chipset spec. says that bits 29-31 in the
158 * ATTBASE register are reserved -> try not to write them */
159 if (agp_bridge->gatt_bus_addr & INTEL_815_ATTBASE_MASK) {
Bjorn Helgaase3cf6952008-07-30 12:26:51 -0700160 dev_emerg(&agp_bridge->dev->dev, "gatt bus addr too high");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700161 return -EINVAL;
162 }
163
164 current_size = A_SIZE_8(agp_bridge->current_size);
165
166 /* aperture size */
167 pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE,
168 current_size->size_value);
169
170 /* address to map to */
171 pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
172 agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
173
174 pci_read_config_dword(agp_bridge->dev, INTEL_ATTBASE, &addr);
175 addr &= INTEL_815_ATTBASE_MASK;
176 addr |= agp_bridge->gatt_bus_addr;
177 pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, addr);
178
179 /* agpctrl */
180 pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
181
182 /* apcont */
183 pci_read_config_byte(agp_bridge->dev, INTEL_815_APCONT, &temp2);
184 pci_write_config_byte(agp_bridge->dev, INTEL_815_APCONT, temp2 | (1 << 1));
185
186 /* clear any possible error conditions */
187 /* Oddness : this chipset seems to have no ERRSTS register ! */
188 return 0;
189}
190
191static void intel_820_tlbflush(struct agp_memory *mem)
192{
193 return;
194}
195
196static void intel_820_cleanup(void)
197{
198 u8 temp;
199 struct aper_size_info_8 *previous_size;
200
201 previous_size = A_SIZE_8(agp_bridge->previous_size);
202 pci_read_config_byte(agp_bridge->dev, INTEL_I820_RDCR, &temp);
203 pci_write_config_byte(agp_bridge->dev, INTEL_I820_RDCR,
204 temp & ~(1 << 1));
205 pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE,
206 previous_size->size_value);
207}
208
209
210static int intel_820_configure(void)
211{
212 u32 temp;
213 u8 temp2;
214 struct aper_size_info_8 *current_size;
215
216 current_size = A_SIZE_8(agp_bridge->current_size);
217
218 /* aperture size */
219 pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
220
221 /* address to map to */
222 pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
223 agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
224
225 /* attbase - aperture base */
226 pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
227
228 /* agpctrl */
229 pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
230
231 /* global enable aperture access */
232 /* This flag is not accessed through MCHCFG register as in */
233 /* i850 chipset. */
234 pci_read_config_byte(agp_bridge->dev, INTEL_I820_RDCR, &temp2);
235 pci_write_config_byte(agp_bridge->dev, INTEL_I820_RDCR, temp2 | (1 << 1));
236 /* clear any possible AGP-related error conditions */
237 pci_write_config_word(agp_bridge->dev, INTEL_I820_ERRSTS, 0x001c);
238 return 0;
239}
240
241static int intel_840_configure(void)
242{
243 u32 temp;
244 u16 temp2;
245 struct aper_size_info_8 *current_size;
246
247 current_size = A_SIZE_8(agp_bridge->current_size);
248
249 /* aperture size */
250 pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
251
252 /* address to map to */
253 pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
254 agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
255
256 /* attbase - aperture base */
257 pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
258
259 /* agpctrl */
260 pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
261
262 /* mcgcfg */
263 pci_read_config_word(agp_bridge->dev, INTEL_I840_MCHCFG, &temp2);
264 pci_write_config_word(agp_bridge->dev, INTEL_I840_MCHCFG, temp2 | (1 << 9));
265 /* clear any possible error conditions */
266 pci_write_config_word(agp_bridge->dev, INTEL_I840_ERRSTS, 0xc000);
267 return 0;
268}
269
270static int intel_845_configure(void)
271{
272 u32 temp;
273 u8 temp2;
274 struct aper_size_info_8 *current_size;
275
276 current_size = A_SIZE_8(agp_bridge->current_size);
277
278 /* aperture size */
279 pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
280
Matthew Garrettb0825482005-07-29 14:03:39 -0700281 if (agp_bridge->apbase_config != 0) {
282 pci_write_config_dword(agp_bridge->dev, AGP_APBASE,
283 agp_bridge->apbase_config);
284 } else {
285 /* address to map to */
286 pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
287 agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
288 agp_bridge->apbase_config = temp;
289 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700290
291 /* attbase - aperture base */
292 pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
293
294 /* agpctrl */
295 pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
296
297 /* agpm */
298 pci_read_config_byte(agp_bridge->dev, INTEL_I845_AGPM, &temp2);
299 pci_write_config_byte(agp_bridge->dev, INTEL_I845_AGPM, temp2 | (1 << 1));
300 /* clear any possible error conditions */
301 pci_write_config_word(agp_bridge->dev, INTEL_I845_ERRSTS, 0x001c);
302 return 0;
303}
304
305static int intel_850_configure(void)
306{
307 u32 temp;
308 u16 temp2;
309 struct aper_size_info_8 *current_size;
310
311 current_size = A_SIZE_8(agp_bridge->current_size);
312
313 /* aperture size */
314 pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
315
316 /* address to map to */
317 pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
318 agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
319
320 /* attbase - aperture base */
321 pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
322
323 /* agpctrl */
324 pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
325
326 /* mcgcfg */
327 pci_read_config_word(agp_bridge->dev, INTEL_I850_MCHCFG, &temp2);
328 pci_write_config_word(agp_bridge->dev, INTEL_I850_MCHCFG, temp2 | (1 << 9));
329 /* clear any possible AGP-related error conditions */
330 pci_write_config_word(agp_bridge->dev, INTEL_I850_ERRSTS, 0x001c);
331 return 0;
332}
333
334static int intel_860_configure(void)
335{
336 u32 temp;
337 u16 temp2;
338 struct aper_size_info_8 *current_size;
339
340 current_size = A_SIZE_8(agp_bridge->current_size);
341
342 /* aperture size */
343 pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
344
345 /* address to map to */
346 pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
347 agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
348
349 /* attbase - aperture base */
350 pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
351
352 /* agpctrl */
353 pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
354
355 /* mcgcfg */
356 pci_read_config_word(agp_bridge->dev, INTEL_I860_MCHCFG, &temp2);
357 pci_write_config_word(agp_bridge->dev, INTEL_I860_MCHCFG, temp2 | (1 << 9));
358 /* clear any possible AGP-related error conditions */
359 pci_write_config_word(agp_bridge->dev, INTEL_I860_ERRSTS, 0xf700);
360 return 0;
361}
362
363static int intel_830mp_configure(void)
364{
365 u32 temp;
366 u16 temp2;
367 struct aper_size_info_8 *current_size;
368
369 current_size = A_SIZE_8(agp_bridge->current_size);
370
371 /* aperture size */
372 pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
373
374 /* address to map to */
375 pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
376 agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
377
378 /* attbase - aperture base */
379 pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
380
381 /* agpctrl */
382 pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
383
384 /* gmch */
385 pci_read_config_word(agp_bridge->dev, INTEL_NBXCFG, &temp2);
386 pci_write_config_word(agp_bridge->dev, INTEL_NBXCFG, temp2 | (1 << 9));
387 /* clear any possible AGP-related error conditions */
388 pci_write_config_word(agp_bridge->dev, INTEL_I830_ERRSTS, 0x1c);
389 return 0;
390}
391
392static int intel_7505_configure(void)
393{
394 u32 temp;
395 u16 temp2;
396 struct aper_size_info_8 *current_size;
397
398 current_size = A_SIZE_8(agp_bridge->current_size);
399
400 /* aperture size */
401 pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
402
403 /* address to map to */
404 pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
405 agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
406
407 /* attbase - aperture base */
408 pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
409
410 /* agpctrl */
411 pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
412
413 /* mchcfg */
414 pci_read_config_word(agp_bridge->dev, INTEL_I7505_MCHCFG, &temp2);
415 pci_write_config_word(agp_bridge->dev, INTEL_I7505_MCHCFG, temp2 | (1 << 9));
416
417 return 0;
418}
419
420/* Setup function */
Dave Jonese5524f32007-02-22 18:41:28 -0500421static const struct gatt_mask intel_generic_masks[] =
Linus Torvalds1da177e2005-04-16 15:20:36 -0700422{
423 {.mask = 0x00000017, .type = 0}
424};
425
Dave Jonese5524f32007-02-22 18:41:28 -0500426static const struct aper_size_info_8 intel_815_sizes[2] =
Linus Torvalds1da177e2005-04-16 15:20:36 -0700427{
428 {64, 16384, 4, 0},
429 {32, 8192, 3, 8},
430};
431
Dave Jonese5524f32007-02-22 18:41:28 -0500432static const struct aper_size_info_8 intel_8xx_sizes[7] =
Linus Torvalds1da177e2005-04-16 15:20:36 -0700433{
434 {256, 65536, 6, 0},
435 {128, 32768, 5, 32},
436 {64, 16384, 4, 48},
437 {32, 8192, 3, 56},
438 {16, 4096, 2, 60},
439 {8, 2048, 1, 62},
440 {4, 1024, 0, 63}
441};
442
Dave Jonese5524f32007-02-22 18:41:28 -0500443static const struct aper_size_info_16 intel_generic_sizes[7] =
Linus Torvalds1da177e2005-04-16 15:20:36 -0700444{
445 {256, 65536, 6, 0},
446 {128, 32768, 5, 32},
447 {64, 16384, 4, 48},
448 {32, 8192, 3, 56},
449 {16, 4096, 2, 60},
450 {8, 2048, 1, 62},
451 {4, 1024, 0, 63}
452};
453
Dave Jonese5524f32007-02-22 18:41:28 -0500454static const struct aper_size_info_8 intel_830mp_sizes[4] =
Linus Torvalds1da177e2005-04-16 15:20:36 -0700455{
456 {256, 65536, 6, 0},
457 {128, 32768, 5, 32},
458 {64, 16384, 4, 48},
459 {32, 8192, 3, 56}
460};
461
Dave Jonese5524f32007-02-22 18:41:28 -0500462static const struct agp_bridge_driver intel_generic_driver = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700463 .owner = THIS_MODULE,
464 .aperture_sizes = intel_generic_sizes,
465 .size_type = U16_APER_SIZE,
466 .num_aperture_sizes = 7,
Jerome Glisse61cf0592010-04-20 17:43:34 +0200467 .needs_scratch_page = true,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700468 .configure = intel_configure,
469 .fetch_size = intel_fetch_size,
470 .cleanup = intel_cleanup,
471 .tlb_flush = intel_tlbflush,
472 .mask_memory = agp_generic_mask_memory,
473 .masks = intel_generic_masks,
474 .agp_enable = agp_generic_enable,
475 .cache_flush = global_cache_flush,
476 .create_gatt_table = agp_generic_create_gatt_table,
477 .free_gatt_table = agp_generic_free_gatt_table,
478 .insert_memory = agp_generic_insert_memory,
479 .remove_memory = agp_generic_remove_memory,
480 .alloc_by_type = agp_generic_alloc_by_type,
481 .free_by_type = agp_generic_free_by_type,
482 .agp_alloc_page = agp_generic_alloc_page,
Shaohua Li37acee12008-08-21 10:46:11 +0800483 .agp_alloc_pages = agp_generic_alloc_pages,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700484 .agp_destroy_page = agp_generic_destroy_page,
Shaohua Libd079282008-08-21 10:46:17 +0800485 .agp_destroy_pages = agp_generic_destroy_pages,
Thomas Hellstroma030ce42007-01-23 10:33:43 +0100486 .agp_type_to_mask_type = agp_generic_type_to_mask_type,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700487};
488
Dave Jonese5524f32007-02-22 18:41:28 -0500489static const struct agp_bridge_driver intel_815_driver = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700490 .owner = THIS_MODULE,
491 .aperture_sizes = intel_815_sizes,
492 .size_type = U8_APER_SIZE,
493 .num_aperture_sizes = 2,
Jerome Glisse61cf0592010-04-20 17:43:34 +0200494 .needs_scratch_page = true,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700495 .configure = intel_815_configure,
496 .fetch_size = intel_815_fetch_size,
497 .cleanup = intel_8xx_cleanup,
498 .tlb_flush = intel_8xx_tlbflush,
499 .mask_memory = agp_generic_mask_memory,
500 .masks = intel_generic_masks,
501 .agp_enable = agp_generic_enable,
502 .cache_flush = global_cache_flush,
503 .create_gatt_table = agp_generic_create_gatt_table,
504 .free_gatt_table = agp_generic_free_gatt_table,
505 .insert_memory = agp_generic_insert_memory,
506 .remove_memory = agp_generic_remove_memory,
507 .alloc_by_type = agp_generic_alloc_by_type,
508 .free_by_type = agp_generic_free_by_type,
509 .agp_alloc_page = agp_generic_alloc_page,
Shaohua Li37acee12008-08-21 10:46:11 +0800510 .agp_alloc_pages = agp_generic_alloc_pages,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700511 .agp_destroy_page = agp_generic_destroy_page,
Shaohua Libd079282008-08-21 10:46:17 +0800512 .agp_destroy_pages = agp_generic_destroy_pages,
Dave Airlie62c96b92008-06-19 14:27:53 +1000513 .agp_type_to_mask_type = agp_generic_type_to_mask_type,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700514};
515
Dave Jonese5524f32007-02-22 18:41:28 -0500516static const struct agp_bridge_driver intel_820_driver = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700517 .owner = THIS_MODULE,
518 .aperture_sizes = intel_8xx_sizes,
519 .size_type = U8_APER_SIZE,
520 .num_aperture_sizes = 7,
Jerome Glisse61cf0592010-04-20 17:43:34 +0200521 .needs_scratch_page = true,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700522 .configure = intel_820_configure,
523 .fetch_size = intel_8xx_fetch_size,
524 .cleanup = intel_820_cleanup,
525 .tlb_flush = intel_820_tlbflush,
526 .mask_memory = agp_generic_mask_memory,
527 .masks = intel_generic_masks,
528 .agp_enable = agp_generic_enable,
529 .cache_flush = global_cache_flush,
530 .create_gatt_table = agp_generic_create_gatt_table,
531 .free_gatt_table = agp_generic_free_gatt_table,
532 .insert_memory = agp_generic_insert_memory,
533 .remove_memory = agp_generic_remove_memory,
534 .alloc_by_type = agp_generic_alloc_by_type,
535 .free_by_type = agp_generic_free_by_type,
536 .agp_alloc_page = agp_generic_alloc_page,
Shaohua Li37acee12008-08-21 10:46:11 +0800537 .agp_alloc_pages = agp_generic_alloc_pages,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700538 .agp_destroy_page = agp_generic_destroy_page,
Shaohua Libd079282008-08-21 10:46:17 +0800539 .agp_destroy_pages = agp_generic_destroy_pages,
Thomas Hellstroma030ce42007-01-23 10:33:43 +0100540 .agp_type_to_mask_type = agp_generic_type_to_mask_type,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700541};
542
Dave Jonese5524f32007-02-22 18:41:28 -0500543static const struct agp_bridge_driver intel_830mp_driver = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700544 .owner = THIS_MODULE,
545 .aperture_sizes = intel_830mp_sizes,
546 .size_type = U8_APER_SIZE,
547 .num_aperture_sizes = 4,
Jerome Glisse61cf0592010-04-20 17:43:34 +0200548 .needs_scratch_page = true,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700549 .configure = intel_830mp_configure,
550 .fetch_size = intel_8xx_fetch_size,
551 .cleanup = intel_8xx_cleanup,
552 .tlb_flush = intel_8xx_tlbflush,
553 .mask_memory = agp_generic_mask_memory,
554 .masks = intel_generic_masks,
555 .agp_enable = agp_generic_enable,
556 .cache_flush = global_cache_flush,
557 .create_gatt_table = agp_generic_create_gatt_table,
558 .free_gatt_table = agp_generic_free_gatt_table,
559 .insert_memory = agp_generic_insert_memory,
560 .remove_memory = agp_generic_remove_memory,
561 .alloc_by_type = agp_generic_alloc_by_type,
562 .free_by_type = agp_generic_free_by_type,
563 .agp_alloc_page = agp_generic_alloc_page,
Shaohua Li37acee12008-08-21 10:46:11 +0800564 .agp_alloc_pages = agp_generic_alloc_pages,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700565 .agp_destroy_page = agp_generic_destroy_page,
Shaohua Libd079282008-08-21 10:46:17 +0800566 .agp_destroy_pages = agp_generic_destroy_pages,
Thomas Hellstroma030ce42007-01-23 10:33:43 +0100567 .agp_type_to_mask_type = agp_generic_type_to_mask_type,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700568};
569
Dave Jonese5524f32007-02-22 18:41:28 -0500570static const struct agp_bridge_driver intel_840_driver = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700571 .owner = THIS_MODULE,
572 .aperture_sizes = intel_8xx_sizes,
573 .size_type = U8_APER_SIZE,
574 .num_aperture_sizes = 7,
Jerome Glisse61cf0592010-04-20 17:43:34 +0200575 .needs_scratch_page = true,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700576 .configure = intel_840_configure,
577 .fetch_size = intel_8xx_fetch_size,
578 .cleanup = intel_8xx_cleanup,
579 .tlb_flush = intel_8xx_tlbflush,
580 .mask_memory = agp_generic_mask_memory,
581 .masks = intel_generic_masks,
582 .agp_enable = agp_generic_enable,
583 .cache_flush = global_cache_flush,
584 .create_gatt_table = agp_generic_create_gatt_table,
585 .free_gatt_table = agp_generic_free_gatt_table,
586 .insert_memory = agp_generic_insert_memory,
587 .remove_memory = agp_generic_remove_memory,
588 .alloc_by_type = agp_generic_alloc_by_type,
589 .free_by_type = agp_generic_free_by_type,
590 .agp_alloc_page = agp_generic_alloc_page,
Shaohua Li37acee12008-08-21 10:46:11 +0800591 .agp_alloc_pages = agp_generic_alloc_pages,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700592 .agp_destroy_page = agp_generic_destroy_page,
Shaohua Libd079282008-08-21 10:46:17 +0800593 .agp_destroy_pages = agp_generic_destroy_pages,
Thomas Hellstroma030ce42007-01-23 10:33:43 +0100594 .agp_type_to_mask_type = agp_generic_type_to_mask_type,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700595};
596
Dave Jonese5524f32007-02-22 18:41:28 -0500597static const struct agp_bridge_driver intel_845_driver = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700598 .owner = THIS_MODULE,
599 .aperture_sizes = intel_8xx_sizes,
600 .size_type = U8_APER_SIZE,
601 .num_aperture_sizes = 7,
Jerome Glisse61cf0592010-04-20 17:43:34 +0200602 .needs_scratch_page = true,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700603 .configure = intel_845_configure,
604 .fetch_size = intel_8xx_fetch_size,
605 .cleanup = intel_8xx_cleanup,
606 .tlb_flush = intel_8xx_tlbflush,
607 .mask_memory = agp_generic_mask_memory,
608 .masks = intel_generic_masks,
609 .agp_enable = agp_generic_enable,
610 .cache_flush = global_cache_flush,
611 .create_gatt_table = agp_generic_create_gatt_table,
612 .free_gatt_table = agp_generic_free_gatt_table,
613 .insert_memory = agp_generic_insert_memory,
614 .remove_memory = agp_generic_remove_memory,
615 .alloc_by_type = agp_generic_alloc_by_type,
616 .free_by_type = agp_generic_free_by_type,
617 .agp_alloc_page = agp_generic_alloc_page,
Shaohua Li37acee12008-08-21 10:46:11 +0800618 .agp_alloc_pages = agp_generic_alloc_pages,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700619 .agp_destroy_page = agp_generic_destroy_page,
Shaohua Libd079282008-08-21 10:46:17 +0800620 .agp_destroy_pages = agp_generic_destroy_pages,
Thomas Hellstroma030ce42007-01-23 10:33:43 +0100621 .agp_type_to_mask_type = agp_generic_type_to_mask_type,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700622};
623
Dave Jonese5524f32007-02-22 18:41:28 -0500624static const struct agp_bridge_driver intel_850_driver = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700625 .owner = THIS_MODULE,
626 .aperture_sizes = intel_8xx_sizes,
627 .size_type = U8_APER_SIZE,
628 .num_aperture_sizes = 7,
Jerome Glisse61cf0592010-04-20 17:43:34 +0200629 .needs_scratch_page = true,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700630 .configure = intel_850_configure,
631 .fetch_size = intel_8xx_fetch_size,
632 .cleanup = intel_8xx_cleanup,
633 .tlb_flush = intel_8xx_tlbflush,
634 .mask_memory = agp_generic_mask_memory,
635 .masks = intel_generic_masks,
636 .agp_enable = agp_generic_enable,
637 .cache_flush = global_cache_flush,
638 .create_gatt_table = agp_generic_create_gatt_table,
639 .free_gatt_table = agp_generic_free_gatt_table,
640 .insert_memory = agp_generic_insert_memory,
641 .remove_memory = agp_generic_remove_memory,
642 .alloc_by_type = agp_generic_alloc_by_type,
643 .free_by_type = agp_generic_free_by_type,
644 .agp_alloc_page = agp_generic_alloc_page,
Shaohua Li37acee12008-08-21 10:46:11 +0800645 .agp_alloc_pages = agp_generic_alloc_pages,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700646 .agp_destroy_page = agp_generic_destroy_page,
Shaohua Libd079282008-08-21 10:46:17 +0800647 .agp_destroy_pages = agp_generic_destroy_pages,
Thomas Hellstroma030ce42007-01-23 10:33:43 +0100648 .agp_type_to_mask_type = agp_generic_type_to_mask_type,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700649};
650
Dave Jonese5524f32007-02-22 18:41:28 -0500651static const struct agp_bridge_driver intel_860_driver = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700652 .owner = THIS_MODULE,
653 .aperture_sizes = intel_8xx_sizes,
654 .size_type = U8_APER_SIZE,
655 .num_aperture_sizes = 7,
Jerome Glisse61cf0592010-04-20 17:43:34 +0200656 .needs_scratch_page = true,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700657 .configure = intel_860_configure,
658 .fetch_size = intel_8xx_fetch_size,
659 .cleanup = intel_8xx_cleanup,
660 .tlb_flush = intel_8xx_tlbflush,
661 .mask_memory = agp_generic_mask_memory,
662 .masks = intel_generic_masks,
663 .agp_enable = agp_generic_enable,
664 .cache_flush = global_cache_flush,
665 .create_gatt_table = agp_generic_create_gatt_table,
666 .free_gatt_table = agp_generic_free_gatt_table,
667 .insert_memory = agp_generic_insert_memory,
668 .remove_memory = agp_generic_remove_memory,
669 .alloc_by_type = agp_generic_alloc_by_type,
670 .free_by_type = agp_generic_free_by_type,
671 .agp_alloc_page = agp_generic_alloc_page,
Shaohua Li37acee12008-08-21 10:46:11 +0800672 .agp_alloc_pages = agp_generic_alloc_pages,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700673 .agp_destroy_page = agp_generic_destroy_page,
Shaohua Libd079282008-08-21 10:46:17 +0800674 .agp_destroy_pages = agp_generic_destroy_pages,
Thomas Hellstroma030ce42007-01-23 10:33:43 +0100675 .agp_type_to_mask_type = agp_generic_type_to_mask_type,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700676};
677
Dave Jonese5524f32007-02-22 18:41:28 -0500678static const struct agp_bridge_driver intel_7505_driver = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700679 .owner = THIS_MODULE,
680 .aperture_sizes = intel_8xx_sizes,
681 .size_type = U8_APER_SIZE,
682 .num_aperture_sizes = 7,
Jerome Glisse61cf0592010-04-20 17:43:34 +0200683 .needs_scratch_page = true,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700684 .configure = intel_7505_configure,
685 .fetch_size = intel_8xx_fetch_size,
686 .cleanup = intel_8xx_cleanup,
687 .tlb_flush = intel_8xx_tlbflush,
688 .mask_memory = agp_generic_mask_memory,
689 .masks = intel_generic_masks,
690 .agp_enable = agp_generic_enable,
691 .cache_flush = global_cache_flush,
692 .create_gatt_table = agp_generic_create_gatt_table,
693 .free_gatt_table = agp_generic_free_gatt_table,
694 .insert_memory = agp_generic_insert_memory,
695 .remove_memory = agp_generic_remove_memory,
696 .alloc_by_type = agp_generic_alloc_by_type,
697 .free_by_type = agp_generic_free_by_type,
698 .agp_alloc_page = agp_generic_alloc_page,
Shaohua Li37acee12008-08-21 10:46:11 +0800699 .agp_alloc_pages = agp_generic_alloc_pages,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700700 .agp_destroy_page = agp_generic_destroy_page,
Shaohua Libd079282008-08-21 10:46:17 +0800701 .agp_destroy_pages = agp_generic_destroy_pages,
Thomas Hellstroma030ce42007-01-23 10:33:43 +0100702 .agp_type_to_mask_type = agp_generic_type_to_mask_type,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700703};
704
Wang Zhenyu9614ece2007-05-30 09:45:58 +0800705static int find_gmch(u16 device)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700706{
Wang Zhenyu9614ece2007-05-30 09:45:58 +0800707 struct pci_dev *gmch_device;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700708
Wang Zhenyu9614ece2007-05-30 09:45:58 +0800709 gmch_device = pci_get_device(PCI_VENDOR_ID_INTEL, device, NULL);
710 if (gmch_device && PCI_FUNC(gmch_device->devfn) != 0) {
711 gmch_device = pci_get_device(PCI_VENDOR_ID_INTEL,
Dave Airlief011ae72008-01-25 11:23:04 +1000712 device, gmch_device);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700713 }
714
Wang Zhenyu9614ece2007-05-30 09:45:58 +0800715 if (!gmch_device)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700716 return 0;
717
Wang Zhenyu9614ece2007-05-30 09:45:58 +0800718 intel_private.pcidev = gmch_device;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700719 return 1;
720}
721
Wang Zhenyu9614ece2007-05-30 09:45:58 +0800722/* Table to describe Intel GMCH and AGP/PCIE GART drivers. At least one of
723 * driver and gmch_driver must be non-null, and find_gmch will determine
724 * which one should be used if a gmch_chip_id is present.
725 */
726static const struct intel_driver_description {
727 unsigned int chip_id;
728 unsigned int gmch_chip_id;
729 char *name;
730 const struct agp_bridge_driver *driver;
731 const struct agp_bridge_driver *gmch_driver;
732} intel_agp_chipsets[] = {
Daniel Vetter059efc62010-04-14 00:29:54 +0200733 { PCI_DEVICE_ID_INTEL_82443LX_0, 0, "440LX", &intel_generic_driver, NULL },
734 { PCI_DEVICE_ID_INTEL_82443BX_0, 0, "440BX", &intel_generic_driver, NULL },
735 { PCI_DEVICE_ID_INTEL_82443GX_0, 0, "440GX", &intel_generic_driver, NULL },
736 { PCI_DEVICE_ID_INTEL_82810_MC1, PCI_DEVICE_ID_INTEL_82810_IG1, "i810",
Wang Zhenyu9614ece2007-05-30 09:45:58 +0800737 NULL, &intel_810_driver },
Daniel Vetter059efc62010-04-14 00:29:54 +0200738 { PCI_DEVICE_ID_INTEL_82810_MC3, PCI_DEVICE_ID_INTEL_82810_IG3, "i810",
Wang Zhenyu9614ece2007-05-30 09:45:58 +0800739 NULL, &intel_810_driver },
Daniel Vetter059efc62010-04-14 00:29:54 +0200740 { PCI_DEVICE_ID_INTEL_82810E_MC, PCI_DEVICE_ID_INTEL_82810E_IG, "i810",
Wang Zhenyu9614ece2007-05-30 09:45:58 +0800741 NULL, &intel_810_driver },
Daniel Vetter059efc62010-04-14 00:29:54 +0200742 { PCI_DEVICE_ID_INTEL_82815_MC, PCI_DEVICE_ID_INTEL_82815_CGC, "i815",
Wang Zhenyu88889852007-06-14 10:01:04 +0800743 &intel_815_driver, &intel_810_driver },
Daniel Vetter059efc62010-04-14 00:29:54 +0200744 { PCI_DEVICE_ID_INTEL_82820_HB, 0, "i820", &intel_820_driver, NULL },
745 { PCI_DEVICE_ID_INTEL_82820_UP_HB, 0, "i820", &intel_820_driver, NULL },
746 { PCI_DEVICE_ID_INTEL_82830_HB, PCI_DEVICE_ID_INTEL_82830_CGC, "830M",
Wang Zhenyu9614ece2007-05-30 09:45:58 +0800747 &intel_830mp_driver, &intel_830_driver },
Daniel Vetter059efc62010-04-14 00:29:54 +0200748 { PCI_DEVICE_ID_INTEL_82840_HB, 0, "i840", &intel_840_driver, NULL },
749 { PCI_DEVICE_ID_INTEL_82845_HB, 0, "845G", &intel_845_driver, NULL },
750 { PCI_DEVICE_ID_INTEL_82845G_HB, PCI_DEVICE_ID_INTEL_82845G_IG, "830M",
Wang Zhenyu9614ece2007-05-30 09:45:58 +0800751 &intel_845_driver, &intel_830_driver },
Daniel Vetter059efc62010-04-14 00:29:54 +0200752 { PCI_DEVICE_ID_INTEL_82850_HB, 0, "i850", &intel_850_driver, NULL },
753 { PCI_DEVICE_ID_INTEL_82854_HB, PCI_DEVICE_ID_INTEL_82854_IG, "854",
Stefan Husemann347486b2009-04-13 14:40:10 -0700754 &intel_845_driver, &intel_830_driver },
Daniel Vetter059efc62010-04-14 00:29:54 +0200755 { PCI_DEVICE_ID_INTEL_82855PM_HB, 0, "855PM", &intel_845_driver, NULL },
756 { PCI_DEVICE_ID_INTEL_82855GM_HB, PCI_DEVICE_ID_INTEL_82855GM_IG, "855GM",
Wang Zhenyu9614ece2007-05-30 09:45:58 +0800757 &intel_845_driver, &intel_830_driver },
Daniel Vetter059efc62010-04-14 00:29:54 +0200758 { PCI_DEVICE_ID_INTEL_82860_HB, 0, "i860", &intel_860_driver, NULL },
759 { PCI_DEVICE_ID_INTEL_82865_HB, PCI_DEVICE_ID_INTEL_82865_IG, "865",
Wang Zhenyu9614ece2007-05-30 09:45:58 +0800760 &intel_845_driver, &intel_830_driver },
Daniel Vetter059efc62010-04-14 00:29:54 +0200761 { PCI_DEVICE_ID_INTEL_82875_HB, 0, "i875", &intel_845_driver, NULL },
762 { PCI_DEVICE_ID_INTEL_E7221_HB, PCI_DEVICE_ID_INTEL_E7221_IG, "E7221 (i915)",
Carlos Martíne914a362008-01-24 10:34:09 +1000763 NULL, &intel_915_driver },
Daniel Vetter059efc62010-04-14 00:29:54 +0200764 { PCI_DEVICE_ID_INTEL_82915G_HB, PCI_DEVICE_ID_INTEL_82915G_IG, "915G",
Wang Zhenyu47d46372007-06-21 13:43:18 +0800765 NULL, &intel_915_driver },
Daniel Vetter059efc62010-04-14 00:29:54 +0200766 { PCI_DEVICE_ID_INTEL_82915GM_HB, PCI_DEVICE_ID_INTEL_82915GM_IG, "915GM",
Wang Zhenyu47d46372007-06-21 13:43:18 +0800767 NULL, &intel_915_driver },
Daniel Vetter059efc62010-04-14 00:29:54 +0200768 { PCI_DEVICE_ID_INTEL_82945G_HB, PCI_DEVICE_ID_INTEL_82945G_IG, "945G",
Wang Zhenyu47d46372007-06-21 13:43:18 +0800769 NULL, &intel_915_driver },
Daniel Vetter059efc62010-04-14 00:29:54 +0200770 { PCI_DEVICE_ID_INTEL_82945GM_HB, PCI_DEVICE_ID_INTEL_82945GM_IG, "945GM",
Wang Zhenyu47d46372007-06-21 13:43:18 +0800771 NULL, &intel_915_driver },
Daniel Vetter059efc62010-04-14 00:29:54 +0200772 { PCI_DEVICE_ID_INTEL_82945GME_HB, PCI_DEVICE_ID_INTEL_82945GME_IG, "945GME",
Wang Zhenyu47d46372007-06-21 13:43:18 +0800773 NULL, &intel_915_driver },
Daniel Vetter059efc62010-04-14 00:29:54 +0200774 { PCI_DEVICE_ID_INTEL_82946GZ_HB, PCI_DEVICE_ID_INTEL_82946GZ_IG, "946GZ",
Wang Zhenyu47d46372007-06-21 13:43:18 +0800775 NULL, &intel_i965_driver },
Daniel Vetter059efc62010-04-14 00:29:54 +0200776 { PCI_DEVICE_ID_INTEL_82G35_HB, PCI_DEVICE_ID_INTEL_82G35_IG, "G35",
Wang Zhenyu47d46372007-06-21 13:43:18 +0800777 NULL, &intel_i965_driver },
Daniel Vetter059efc62010-04-14 00:29:54 +0200778 { PCI_DEVICE_ID_INTEL_82965Q_HB, PCI_DEVICE_ID_INTEL_82965Q_IG, "965Q",
Wang Zhenyu47d46372007-06-21 13:43:18 +0800779 NULL, &intel_i965_driver },
Daniel Vetter059efc62010-04-14 00:29:54 +0200780 { PCI_DEVICE_ID_INTEL_82965G_HB, PCI_DEVICE_ID_INTEL_82965G_IG, "965G",
Wang Zhenyu47d46372007-06-21 13:43:18 +0800781 NULL, &intel_i965_driver },
Daniel Vetter059efc62010-04-14 00:29:54 +0200782 { PCI_DEVICE_ID_INTEL_82965GM_HB, PCI_DEVICE_ID_INTEL_82965GM_IG, "965GM",
Wang Zhenyu47d46372007-06-21 13:43:18 +0800783 NULL, &intel_i965_driver },
Daniel Vetter059efc62010-04-14 00:29:54 +0200784 { PCI_DEVICE_ID_INTEL_82965GME_HB, PCI_DEVICE_ID_INTEL_82965GME_IG, "965GME/GLE",
Wang Zhenyu47d46372007-06-21 13:43:18 +0800785 NULL, &intel_i965_driver },
Daniel Vetter059efc62010-04-14 00:29:54 +0200786 { PCI_DEVICE_ID_INTEL_7505_0, 0, "E7505", &intel_7505_driver, NULL },
787 { PCI_DEVICE_ID_INTEL_7205_0, 0, "E7205", &intel_7505_driver, NULL },
788 { PCI_DEVICE_ID_INTEL_G33_HB, PCI_DEVICE_ID_INTEL_G33_IG, "G33",
Wang Zhenyu47d46372007-06-21 13:43:18 +0800789 NULL, &intel_g33_driver },
Daniel Vetter059efc62010-04-14 00:29:54 +0200790 { PCI_DEVICE_ID_INTEL_Q35_HB, PCI_DEVICE_ID_INTEL_Q35_IG, "Q35",
Wang Zhenyu47d46372007-06-21 13:43:18 +0800791 NULL, &intel_g33_driver },
Daniel Vetter059efc62010-04-14 00:29:54 +0200792 { PCI_DEVICE_ID_INTEL_Q33_HB, PCI_DEVICE_ID_INTEL_Q33_IG, "Q33",
Wang Zhenyu47d46372007-06-21 13:43:18 +0800793 NULL, &intel_g33_driver },
Daniel Vetter059efc62010-04-14 00:29:54 +0200794 { PCI_DEVICE_ID_INTEL_PINEVIEW_M_HB, PCI_DEVICE_ID_INTEL_PINEVIEW_M_IG, "GMA3150",
Shaohua Li21778322009-02-23 15:19:16 +0800795 NULL, &intel_g33_driver },
Daniel Vetter059efc62010-04-14 00:29:54 +0200796 { PCI_DEVICE_ID_INTEL_PINEVIEW_HB, PCI_DEVICE_ID_INTEL_PINEVIEW_IG, "GMA3150",
Shaohua Li21778322009-02-23 15:19:16 +0800797 NULL, &intel_g33_driver },
Daniel Vetter059efc62010-04-14 00:29:54 +0200798 { PCI_DEVICE_ID_INTEL_GM45_HB, PCI_DEVICE_ID_INTEL_GM45_IG,
Adam Jackson107f5172009-12-03 17:14:41 -0500799 "GM45", NULL, &intel_i965_driver },
Daniel Vetter059efc62010-04-14 00:29:54 +0200800 { PCI_DEVICE_ID_INTEL_EAGLELAKE_HB, PCI_DEVICE_ID_INTEL_EAGLELAKE_IG,
Adam Jackson107f5172009-12-03 17:14:41 -0500801 "Eaglelake", NULL, &intel_i965_driver },
Daniel Vetter059efc62010-04-14 00:29:54 +0200802 { PCI_DEVICE_ID_INTEL_Q45_HB, PCI_DEVICE_ID_INTEL_Q45_IG,
Zhenyu Wang25ce77a2008-06-19 14:17:58 +1000803 "Q45/Q43", NULL, &intel_i965_driver },
Daniel Vetter059efc62010-04-14 00:29:54 +0200804 { PCI_DEVICE_ID_INTEL_G45_HB, PCI_DEVICE_ID_INTEL_G45_IG,
Zhenyu Wang25ce77a2008-06-19 14:17:58 +1000805 "G45/G43", NULL, &intel_i965_driver },
Daniel Vetter059efc62010-04-14 00:29:54 +0200806 { PCI_DEVICE_ID_INTEL_B43_HB, PCI_DEVICE_ID_INTEL_B43_IG,
Fabian Henze38d8a952009-09-08 00:59:58 +0800807 "B43", NULL, &intel_i965_driver },
Daniel Vetter059efc62010-04-14 00:29:54 +0200808 { PCI_DEVICE_ID_INTEL_G41_HB, PCI_DEVICE_ID_INTEL_G41_IG,
Zhenyu Wanga50ccc62008-11-17 14:39:00 +0800809 "G41", NULL, &intel_i965_driver },
Daniel Vetter059efc62010-04-14 00:29:54 +0200810 { PCI_DEVICE_ID_INTEL_IRONLAKE_D_HB, PCI_DEVICE_ID_INTEL_IRONLAKE_D_IG,
Zhenyu Wangaf86d4b2010-02-10 10:39:33 +0800811 "HD Graphics", NULL, &intel_i965_driver },
Daniel Vetter059efc62010-04-14 00:29:54 +0200812 { PCI_DEVICE_ID_INTEL_IRONLAKE_M_HB, PCI_DEVICE_ID_INTEL_IRONLAKE_M_IG,
Zhenyu Wangaf86d4b2010-02-10 10:39:33 +0800813 "HD Graphics", NULL, &intel_i965_driver },
Daniel Vetter059efc62010-04-14 00:29:54 +0200814 { PCI_DEVICE_ID_INTEL_IRONLAKE_MA_HB, PCI_DEVICE_ID_INTEL_IRONLAKE_M_IG,
Zhenyu Wangaf86d4b2010-02-10 10:39:33 +0800815 "HD Graphics", NULL, &intel_i965_driver },
Daniel Vetter059efc62010-04-14 00:29:54 +0200816 { PCI_DEVICE_ID_INTEL_IRONLAKE_MC2_HB, PCI_DEVICE_ID_INTEL_IRONLAKE_M_IG,
Zhenyu Wangaf86d4b2010-02-10 10:39:33 +0800817 "HD Graphics", NULL, &intel_i965_driver },
Daniel Vetter059efc62010-04-14 00:29:54 +0200818 { PCI_DEVICE_ID_INTEL_SANDYBRIDGE_HB, PCI_DEVICE_ID_INTEL_SANDYBRIDGE_IG,
Zhenyu Wang3869d4a2010-07-09 10:40:58 -0700819 "Sandybridge", NULL, &intel_gen6_driver },
Daniel Vetter059efc62010-04-14 00:29:54 +0200820 { PCI_DEVICE_ID_INTEL_SANDYBRIDGE_M_HB, PCI_DEVICE_ID_INTEL_SANDYBRIDGE_M_IG,
Zhenyu Wang3869d4a2010-07-09 10:40:58 -0700821 "Sandybridge", NULL, &intel_gen6_driver },
Zhenyu Wang4fefe432010-08-19 09:46:16 +0800822 { PCI_DEVICE_ID_INTEL_SANDYBRIDGE_M_HB, PCI_DEVICE_ID_INTEL_SANDYBRIDGE_M_D0_IG,
823 "Sandybridge", NULL, &intel_gen6_driver },
Daniel Vetter059efc62010-04-14 00:29:54 +0200824 { 0, 0, NULL, NULL, NULL }
Wang Zhenyu9614ece2007-05-30 09:45:58 +0800825};
826
Daniel Vetter22dd82a2010-04-14 00:29:55 +0200827static int __devinit intel_gmch_probe(struct pci_dev *pdev,
828 struct agp_bridge_data *bridge)
829{
Zhenyu Wang877fdac2010-08-19 09:46:13 +0800830 int i, mask;
831
Daniel Vetter22dd82a2010-04-14 00:29:55 +0200832 bridge->driver = NULL;
833
834 for (i = 0; intel_agp_chipsets[i].name != NULL; i++) {
835 if ((intel_agp_chipsets[i].gmch_chip_id != 0) &&
836 find_gmch(intel_agp_chipsets[i].gmch_chip_id)) {
837 bridge->driver =
838 intel_agp_chipsets[i].gmch_driver;
839 break;
840 }
841 }
842
843 if (!bridge->driver)
844 return 0;
845
846 bridge->dev_private_data = &intel_private;
847 bridge->dev = pdev;
848
849 dev_info(&pdev->dev, "Intel %s Chipset\n", intel_agp_chipsets[i].name);
850
Zhenyu Wang877fdac2010-08-19 09:46:13 +0800851 if (bridge->driver->mask_memory == intel_gen6_mask_memory)
852 mask = 40;
853 else if (bridge->driver->mask_memory == intel_i965_mask_memory)
854 mask = 36;
855 else
856 mask = 32;
857
858 if (pci_set_dma_mask(intel_private.pcidev, DMA_BIT_MASK(mask)))
859 dev_err(&intel_private.pcidev->dev,
860 "set gfx device dma mask %d-bit failed!\n", mask);
861 else
862 pci_set_consistent_dma_mask(intel_private.pcidev,
863 DMA_BIT_MASK(mask));
Daniel Vetter22dd82a2010-04-14 00:29:55 +0200864
865 return 1;
866}
867
Linus Torvalds1da177e2005-04-16 15:20:36 -0700868static int __devinit agp_intel_probe(struct pci_dev *pdev,
869 const struct pci_device_id *ent)
870{
871 struct agp_bridge_data *bridge;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700872 u8 cap_ptr = 0;
873 struct resource *r;
Zhenyu Wang1f7a6e32010-02-23 14:05:24 +0800874 int i, err;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700875
876 cap_ptr = pci_find_capability(pdev, PCI_CAP_ID_AGP);
877
878 bridge = agp_alloc_bridge();
879 if (!bridge)
880 return -ENOMEM;
881
Daniel Vetter22dd82a2010-04-14 00:29:55 +0200882 bridge->capndx = cap_ptr;
883
884 if (intel_gmch_probe(pdev, bridge))
885 goto found_gmch;
886
Wang Zhenyu9614ece2007-05-30 09:45:58 +0800887 for (i = 0; intel_agp_chipsets[i].name != NULL; i++) {
888 /* In case that multiple models of gfx chip may
889 stand on same host bridge type, this can be
890 sure we detect the right IGD. */
Wang Zhenyu88889852007-06-14 10:01:04 +0800891 if (pdev->device == intel_agp_chipsets[i].chip_id) {
Daniel Vetter22dd82a2010-04-14 00:29:55 +0200892 bridge->driver = intel_agp_chipsets[i].driver;
893 break;
Wang Zhenyu88889852007-06-14 10:01:04 +0800894 }
Wang Zhenyu9614ece2007-05-30 09:45:58 +0800895 }
896
897 if (intel_agp_chipsets[i].name == NULL) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700898 if (cap_ptr)
Bjorn Helgaase3cf6952008-07-30 12:26:51 -0700899 dev_warn(&pdev->dev, "unsupported Intel chipset [%04x/%04x]\n",
900 pdev->vendor, pdev->device);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700901 agp_put_bridge(bridge);
902 return -ENODEV;
Wang Zhenyu9614ece2007-05-30 09:45:58 +0800903 }
904
Dave Airlie10fd8832010-04-20 16:34:20 +1000905 if (!bridge->driver) {
906 if (cap_ptr)
907 dev_warn(&pdev->dev, "can't find bridge device (chip_id: %04x)\n",
908 intel_agp_chipsets[i].gmch_chip_id);
909 agp_put_bridge(bridge);
910 return -ENODEV;
911 }
912
Linus Torvalds1da177e2005-04-16 15:20:36 -0700913 bridge->dev = pdev;
Daniel Vetter22dd82a2010-04-14 00:29:55 +0200914 bridge->dev_private_data = NULL;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700915
Bjorn Helgaase3cf6952008-07-30 12:26:51 -0700916 dev_info(&pdev->dev, "Intel %s Chipset\n", intel_agp_chipsets[i].name);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700917
918 /*
Kulikov Vasiliy96576a92010-08-03 19:42:34 +0400919 * If the device has not been properly setup, the following will catch
920 * the problem and should stop the system from crashing.
921 * 20030610 - hamish@zot.org
922 */
923 if (pci_enable_device(pdev)) {
924 dev_err(&pdev->dev, "can't enable PCI device\n");
925 agp_put_bridge(bridge);
926 return -ENODEV;
927 }
928
929 /*
Linus Torvalds1da177e2005-04-16 15:20:36 -0700930 * The following fixes the case where the BIOS has "forgotten" to
931 * provide an address range for the GART.
932 * 20030610 - hamish@zot.org
933 */
934 r = &pdev->resource[0];
935 if (!r->start && r->end) {
Dave Jones6a92a4e2006-02-28 00:54:25 -0500936 if (pci_assign_resource(pdev, 0)) {
Bjorn Helgaase3cf6952008-07-30 12:26:51 -0700937 dev_err(&pdev->dev, "can't assign resource 0\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700938 agp_put_bridge(bridge);
939 return -ENODEV;
940 }
941 }
942
Linus Torvalds1da177e2005-04-16 15:20:36 -0700943 /* Fill in the mode register */
944 if (cap_ptr) {
945 pci_read_config_dword(pdev,
946 bridge->capndx+PCI_AGP_STATUS,
947 &bridge->mode);
948 }
949
Daniel Vetter22dd82a2010-04-14 00:29:55 +0200950found_gmch:
Linus Torvalds1da177e2005-04-16 15:20:36 -0700951 pci_set_drvdata(pdev, bridge);
Zhenyu Wang1f7a6e32010-02-23 14:05:24 +0800952 err = agp_add_bridge(bridge);
953 if (!err)
954 intel_agp_enabled = 1;
955 return err;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700956}
957
958static void __devexit agp_intel_remove(struct pci_dev *pdev)
959{
960 struct agp_bridge_data *bridge = pci_get_drvdata(pdev);
961
962 agp_remove_bridge(bridge);
963
Wang Zhenyuc4ca8812007-05-30 09:40:46 +0800964 if (intel_private.pcidev)
965 pci_dev_put(intel_private.pcidev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700966
967 agp_put_bridge(bridge);
968}
969
Alexey Dobriyan85be7d62006-08-12 02:02:02 +0400970#ifdef CONFIG_PM
Linus Torvalds1da177e2005-04-16 15:20:36 -0700971static int agp_intel_resume(struct pci_dev *pdev)
972{
973 struct agp_bridge_data *bridge = pci_get_drvdata(pdev);
Keith Packarda8c84df2008-07-31 15:48:07 +1000974 int ret_val;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700975
Daniel Vettere5a04d52010-04-14 00:29:53 +0200976 bridge->driver->configure();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700977
Keith Packarda8c84df2008-07-31 15:48:07 +1000978 ret_val = agp_rebind_memory();
979 if (ret_val != 0)
980 return ret_val;
981
Linus Torvalds1da177e2005-04-16 15:20:36 -0700982 return 0;
983}
Alexey Dobriyan85be7d62006-08-12 02:02:02 +0400984#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700985
986static struct pci_device_id agp_intel_pci_table[] = {
987#define ID(x) \
988 { \
989 .class = (PCI_CLASS_BRIDGE_HOST << 8), \
990 .class_mask = ~0, \
991 .vendor = PCI_VENDOR_ID_INTEL, \
992 .device = x, \
993 .subvendor = PCI_ANY_ID, \
994 .subdevice = PCI_ANY_ID, \
995 }
996 ID(PCI_DEVICE_ID_INTEL_82443LX_0),
997 ID(PCI_DEVICE_ID_INTEL_82443BX_0),
998 ID(PCI_DEVICE_ID_INTEL_82443GX_0),
999 ID(PCI_DEVICE_ID_INTEL_82810_MC1),
1000 ID(PCI_DEVICE_ID_INTEL_82810_MC3),
1001 ID(PCI_DEVICE_ID_INTEL_82810E_MC),
1002 ID(PCI_DEVICE_ID_INTEL_82815_MC),
1003 ID(PCI_DEVICE_ID_INTEL_82820_HB),
1004 ID(PCI_DEVICE_ID_INTEL_82820_UP_HB),
1005 ID(PCI_DEVICE_ID_INTEL_82830_HB),
1006 ID(PCI_DEVICE_ID_INTEL_82840_HB),
1007 ID(PCI_DEVICE_ID_INTEL_82845_HB),
1008 ID(PCI_DEVICE_ID_INTEL_82845G_HB),
1009 ID(PCI_DEVICE_ID_INTEL_82850_HB),
Stefan Husemann347486b2009-04-13 14:40:10 -07001010 ID(PCI_DEVICE_ID_INTEL_82854_HB),
Linus Torvalds1da177e2005-04-16 15:20:36 -07001011 ID(PCI_DEVICE_ID_INTEL_82855PM_HB),
1012 ID(PCI_DEVICE_ID_INTEL_82855GM_HB),
1013 ID(PCI_DEVICE_ID_INTEL_82860_HB),
1014 ID(PCI_DEVICE_ID_INTEL_82865_HB),
1015 ID(PCI_DEVICE_ID_INTEL_82875_HB),
1016 ID(PCI_DEVICE_ID_INTEL_7505_0),
1017 ID(PCI_DEVICE_ID_INTEL_7205_0),
Carlos Martíne914a362008-01-24 10:34:09 +10001018 ID(PCI_DEVICE_ID_INTEL_E7221_HB),
Linus Torvalds1da177e2005-04-16 15:20:36 -07001019 ID(PCI_DEVICE_ID_INTEL_82915G_HB),
1020 ID(PCI_DEVICE_ID_INTEL_82915GM_HB),
Alan Hourihaned0de98f2005-05-31 19:50:49 +01001021 ID(PCI_DEVICE_ID_INTEL_82945G_HB),
Alan Hourihane3b0e8ea2006-01-19 14:08:40 +00001022 ID(PCI_DEVICE_ID_INTEL_82945GM_HB),
Zhenyu Wangdde47872007-07-26 09:18:09 +08001023 ID(PCI_DEVICE_ID_INTEL_82945GME_HB),
Adam Jackson107f5172009-12-03 17:14:41 -05001024 ID(PCI_DEVICE_ID_INTEL_PINEVIEW_M_HB),
1025 ID(PCI_DEVICE_ID_INTEL_PINEVIEW_HB),
Eric Anholt65c25aa2006-09-06 11:57:18 -04001026 ID(PCI_DEVICE_ID_INTEL_82946GZ_HB),
Zhenyu Wang9119f852008-01-23 15:49:26 +10001027 ID(PCI_DEVICE_ID_INTEL_82G35_HB),
Eric Anholt65c25aa2006-09-06 11:57:18 -04001028 ID(PCI_DEVICE_ID_INTEL_82965Q_HB),
1029 ID(PCI_DEVICE_ID_INTEL_82965G_HB),
Wang Zhenyu4598af32007-04-09 08:51:36 +08001030 ID(PCI_DEVICE_ID_INTEL_82965GM_HB),
Zhenyu Wangdde47872007-07-26 09:18:09 +08001031 ID(PCI_DEVICE_ID_INTEL_82965GME_HB),
Wang Zhenyu874808c62007-06-06 11:16:25 +08001032 ID(PCI_DEVICE_ID_INTEL_G33_HB),
1033 ID(PCI_DEVICE_ID_INTEL_Q35_HB),
1034 ID(PCI_DEVICE_ID_INTEL_Q33_HB),
Zhenyu Wang99d32bd2008-07-30 12:26:50 -07001035 ID(PCI_DEVICE_ID_INTEL_GM45_HB),
Adam Jackson107f5172009-12-03 17:14:41 -05001036 ID(PCI_DEVICE_ID_INTEL_EAGLELAKE_HB),
Zhenyu Wang25ce77a2008-06-19 14:17:58 +10001037 ID(PCI_DEVICE_ID_INTEL_Q45_HB),
1038 ID(PCI_DEVICE_ID_INTEL_G45_HB),
Zhenyu Wanga50ccc62008-11-17 14:39:00 +08001039 ID(PCI_DEVICE_ID_INTEL_G41_HB),
Fabian Henze38d8a952009-09-08 00:59:58 +08001040 ID(PCI_DEVICE_ID_INTEL_B43_HB),
Adam Jackson107f5172009-12-03 17:14:41 -05001041 ID(PCI_DEVICE_ID_INTEL_IRONLAKE_D_HB),
1042 ID(PCI_DEVICE_ID_INTEL_IRONLAKE_M_HB),
1043 ID(PCI_DEVICE_ID_INTEL_IRONLAKE_MA_HB),
Dave Airlie3ff99162009-12-08 14:03:47 +10001044 ID(PCI_DEVICE_ID_INTEL_IRONLAKE_MC2_HB),
Eric Anholt1089e302009-10-22 16:10:52 -07001045 ID(PCI_DEVICE_ID_INTEL_SANDYBRIDGE_HB),
Eric Anholt954bce52010-01-07 16:21:46 -08001046 ID(PCI_DEVICE_ID_INTEL_SANDYBRIDGE_M_HB),
Linus Torvalds1da177e2005-04-16 15:20:36 -07001047 { }
1048};
1049
1050MODULE_DEVICE_TABLE(pci, agp_intel_pci_table);
1051
1052static struct pci_driver agp_intel_pci_driver = {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001053 .name = "agpgart-intel",
1054 .id_table = agp_intel_pci_table,
1055 .probe = agp_intel_probe,
1056 .remove = __devexit_p(agp_intel_remove),
Alexey Dobriyan85be7d62006-08-12 02:02:02 +04001057#ifdef CONFIG_PM
Linus Torvalds1da177e2005-04-16 15:20:36 -07001058 .resume = agp_intel_resume,
Alexey Dobriyan85be7d62006-08-12 02:02:02 +04001059#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -07001060};
1061
1062static int __init agp_intel_init(void)
1063{
1064 if (agp_off)
1065 return -EINVAL;
1066 return pci_register_driver(&agp_intel_pci_driver);
1067}
1068
1069static void __exit agp_intel_cleanup(void)
1070{
1071 pci_unregister_driver(&agp_intel_pci_driver);
1072}
1073
1074module_init(agp_intel_init);
1075module_exit(agp_intel_cleanup);
1076
Dave Jonesf4432c52008-10-20 13:31:45 -04001077MODULE_AUTHOR("Dave Jones <davej@redhat.com>");
Linus Torvalds1da177e2005-04-16 15:20:36 -07001078MODULE_LICENSE("GPL and additional rights");