Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * forcedeth: Ethernet driver for NVIDIA nForce media access controllers. |
| 3 | * |
| 4 | * Note: This driver is a cleanroom reimplementation based on reverse |
| 5 | * engineered documentation written by Carl-Daniel Hailfinger |
Ayaz Abdulla | 87046e5 | 2006-12-19 23:33:32 -0500 | [diff] [blame] | 6 | * and Andrew de Quincey. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 7 | * |
| 8 | * NVIDIA, nForce and other NVIDIA marks are trademarks or registered |
| 9 | * trademarks of NVIDIA Corporation in the United States and other |
| 10 | * countries. |
| 11 | * |
Manfred Spraul | 1836098 | 2005-12-24 14:19:24 +0100 | [diff] [blame] | 12 | * Copyright (C) 2003,4,5 Manfred Spraul |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 13 | * Copyright (C) 2004 Andrew de Quincey (wol support) |
| 14 | * Copyright (C) 2004 Carl-Daniel Hailfinger (invalid MAC handling, insane |
| 15 | * IRQ rate fixes, bigendian fixes, cleanups, verification) |
Ayaz Abdulla | f1405d32 | 2009-01-09 11:03:54 +0000 | [diff] [blame] | 16 | * Copyright (c) 2004,2005,2006,2007,2008,2009 NVIDIA Corporation |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 17 | * |
| 18 | * This program is free software; you can redistribute it and/or modify |
| 19 | * it under the terms of the GNU General Public License as published by |
| 20 | * the Free Software Foundation; either version 2 of the License, or |
| 21 | * (at your option) any later version. |
| 22 | * |
| 23 | * This program is distributed in the hope that it will be useful, |
| 24 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 25 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 26 | * GNU General Public License for more details. |
| 27 | * |
| 28 | * You should have received a copy of the GNU General Public License |
| 29 | * along with this program; if not, write to the Free Software |
| 30 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 31 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 32 | * Known bugs: |
| 33 | * We suspect that on some hardware no TX done interrupts are generated. |
| 34 | * This means recovery from netif_stop_queue only happens if the hw timer |
| 35 | * interrupt fires (100 times/second, configurable with NVREG_POLL_DEFAULT) |
| 36 | * and the timer is active in the IRQMask, or if a rx packet arrives by chance. |
| 37 | * If your hardware reliably generates tx done interrupts, then you can remove |
| 38 | * DEV_NEED_TIMERIRQ from the driver_data flags. |
| 39 | * DEV_NEED_TIMERIRQ will not harm you on sane hardware, only generating a few |
| 40 | * superfluous timer interrupts from the nic. |
| 41 | */ |
Ayaz Abdulla | 3e1a3ce | 2009-03-05 08:02:38 +0000 | [diff] [blame] | 42 | #define FORCEDETH_VERSION "0.64" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 43 | #define DRV_NAME "forcedeth" |
| 44 | |
| 45 | #include <linux/module.h> |
| 46 | #include <linux/types.h> |
| 47 | #include <linux/pci.h> |
| 48 | #include <linux/interrupt.h> |
| 49 | #include <linux/netdevice.h> |
| 50 | #include <linux/etherdevice.h> |
| 51 | #include <linux/delay.h> |
| 52 | #include <linux/spinlock.h> |
| 53 | #include <linux/ethtool.h> |
| 54 | #include <linux/timer.h> |
| 55 | #include <linux/skbuff.h> |
| 56 | #include <linux/mii.h> |
| 57 | #include <linux/random.h> |
| 58 | #include <linux/init.h> |
Manfred Spraul | 22c6d14 | 2005-04-19 21:17:09 +0200 | [diff] [blame] | 59 | #include <linux/if_vlan.h> |
Matthias Gehre | 910638a | 2006-03-28 01:56:48 -0800 | [diff] [blame] | 60 | #include <linux/dma-mapping.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 61 | |
| 62 | #include <asm/irq.h> |
| 63 | #include <asm/io.h> |
| 64 | #include <asm/uaccess.h> |
| 65 | #include <asm/system.h> |
| 66 | |
| 67 | #if 0 |
| 68 | #define dprintk printk |
| 69 | #else |
| 70 | #define dprintk(x...) do { } while (0) |
| 71 | #endif |
| 72 | |
Stephen Hemminger | bea3348 | 2007-10-03 16:41:36 -0700 | [diff] [blame] | 73 | #define TX_WORK_PER_LOOP 64 |
| 74 | #define RX_WORK_PER_LOOP 64 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 75 | |
| 76 | /* |
| 77 | * Hardware access: |
| 78 | */ |
| 79 | |
Ayaz Abdulla | 9c66243 | 2008-08-06 12:11:42 -0400 | [diff] [blame] | 80 | #define DEV_NEED_TIMERIRQ 0x000001 /* set the timer irq flag in the irq mask */ |
| 81 | #define DEV_NEED_LINKTIMER 0x000002 /* poll link settings. Relies on the timer irq */ |
| 82 | #define DEV_HAS_LARGEDESC 0x000004 /* device supports jumbo frames and needs packet format 2 */ |
| 83 | #define DEV_HAS_HIGH_DMA 0x000008 /* device supports 64bit dma */ |
| 84 | #define DEV_HAS_CHECKSUM 0x000010 /* device supports tx and rx checksum offloads */ |
| 85 | #define DEV_HAS_VLAN 0x000020 /* device supports vlan tagging and striping */ |
| 86 | #define DEV_HAS_MSI 0x000040 /* device supports MSI */ |
| 87 | #define DEV_HAS_MSI_X 0x000080 /* device supports MSI-X */ |
| 88 | #define DEV_HAS_POWER_CNTRL 0x000100 /* device supports power savings */ |
| 89 | #define DEV_HAS_STATISTICS_V1 0x000200 /* device supports hw statistics version 1 */ |
Ayaz Abdulla | 8ed1454 | 2009-03-05 08:01:49 +0000 | [diff] [blame] | 90 | #define DEV_HAS_STATISTICS_V2 0x000600 /* device supports hw statistics version 2 */ |
| 91 | #define DEV_HAS_STATISTICS_V3 0x000e00 /* device supports hw statistics version 3 */ |
Ayaz Abdulla | 9c66243 | 2008-08-06 12:11:42 -0400 | [diff] [blame] | 92 | #define DEV_HAS_TEST_EXTENDED 0x001000 /* device supports extended diagnostic test */ |
| 93 | #define DEV_HAS_MGMT_UNIT 0x002000 /* device supports management unit */ |
| 94 | #define DEV_HAS_CORRECT_MACADDR 0x004000 /* device supports correct mac address order */ |
| 95 | #define DEV_HAS_COLLISION_FIX 0x008000 /* device supports tx collision fix */ |
| 96 | #define DEV_HAS_PAUSEFRAME_TX_V1 0x010000 /* device supports tx pause frames version 1 */ |
| 97 | #define DEV_HAS_PAUSEFRAME_TX_V2 0x020000 /* device supports tx pause frames version 2 */ |
| 98 | #define DEV_HAS_PAUSEFRAME_TX_V3 0x040000 /* device supports tx pause frames version 3 */ |
| 99 | #define DEV_NEED_TX_LIMIT 0x080000 /* device needs to limit tx */ |
| 100 | #define DEV_HAS_GEAR_MODE 0x100000 /* device supports gear mode */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 101 | |
| 102 | enum { |
| 103 | NvRegIrqStatus = 0x000, |
| 104 | #define NVREG_IRQSTAT_MIIEVENT 0x040 |
Ayaz Abdulla | daa91a9 | 2009-02-07 00:25:00 -0800 | [diff] [blame] | 105 | #define NVREG_IRQSTAT_MASK 0x83ff |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 106 | NvRegIrqMask = 0x004, |
| 107 | #define NVREG_IRQ_RX_ERROR 0x0001 |
| 108 | #define NVREG_IRQ_RX 0x0002 |
| 109 | #define NVREG_IRQ_RX_NOBUF 0x0004 |
| 110 | #define NVREG_IRQ_TX_ERR 0x0008 |
Manfred Spraul | c2dba06 | 2005-07-31 18:29:47 +0200 | [diff] [blame] | 111 | #define NVREG_IRQ_TX_OK 0x0010 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 112 | #define NVREG_IRQ_TIMER 0x0020 |
| 113 | #define NVREG_IRQ_LINK 0x0040 |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 114 | #define NVREG_IRQ_RX_FORCED 0x0080 |
| 115 | #define NVREG_IRQ_TX_FORCED 0x0100 |
Ayaz Abdulla | daa91a9 | 2009-02-07 00:25:00 -0800 | [diff] [blame] | 116 | #define NVREG_IRQ_RECOVER_ERROR 0x8200 |
Ayaz Abdulla | a971c32 | 2005-11-11 08:30:38 -0500 | [diff] [blame] | 117 | #define NVREG_IRQMASK_THROUGHPUT 0x00df |
Ayaz Abdulla | 096a458 | 2007-05-21 20:23:11 -0400 | [diff] [blame] | 118 | #define NVREG_IRQMASK_CPU 0x0060 |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 119 | #define NVREG_IRQ_TX_ALL (NVREG_IRQ_TX_ERR|NVREG_IRQ_TX_OK|NVREG_IRQ_TX_FORCED) |
| 120 | #define NVREG_IRQ_RX_ALL (NVREG_IRQ_RX_ERROR|NVREG_IRQ_RX|NVREG_IRQ_RX_NOBUF|NVREG_IRQ_RX_FORCED) |
Ayaz Abdulla | c5cf910 | 2006-10-30 17:32:01 -0500 | [diff] [blame] | 121 | #define NVREG_IRQ_OTHER (NVREG_IRQ_TIMER|NVREG_IRQ_LINK|NVREG_IRQ_RECOVER_ERROR) |
Manfred Spraul | c2dba06 | 2005-07-31 18:29:47 +0200 | [diff] [blame] | 122 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 123 | NvRegUnknownSetupReg6 = 0x008, |
| 124 | #define NVREG_UNKSETUP6_VAL 3 |
| 125 | |
| 126 | /* |
| 127 | * NVREG_POLL_DEFAULT is the interval length of the timer source on the nic |
| 128 | * NVREG_POLL_DEFAULT=97 would result in an interval length of 1 ms |
| 129 | */ |
| 130 | NvRegPollingInterval = 0x00c, |
Ayaz Abdulla | 6cef67a | 2009-03-05 08:02:30 +0000 | [diff] [blame] | 131 | #define NVREG_POLL_DEFAULT_THROUGHPUT 65535 /* backup tx cleanup if loop max reached */ |
Ayaz Abdulla | a971c32 | 2005-11-11 08:30:38 -0500 | [diff] [blame] | 132 | #define NVREG_POLL_DEFAULT_CPU 13 |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 133 | NvRegMSIMap0 = 0x020, |
| 134 | NvRegMSIMap1 = 0x024, |
| 135 | NvRegMSIIrqMask = 0x030, |
| 136 | #define NVREG_MSI_VECTOR_0_ENABLED 0x01 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 137 | NvRegMisc1 = 0x080, |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 138 | #define NVREG_MISC1_PAUSE_TX 0x01 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 139 | #define NVREG_MISC1_HD 0x02 |
| 140 | #define NVREG_MISC1_FORCE 0x3b0f3c |
| 141 | |
Ayaz Abdulla | 0a62677 | 2008-01-13 16:02:42 -0500 | [diff] [blame] | 142 | NvRegMacReset = 0x34, |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 143 | #define NVREG_MAC_RESET_ASSERT 0x0F3 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 144 | NvRegTransmitterControl = 0x084, |
| 145 | #define NVREG_XMITCTL_START 0x01 |
Ayaz Abdulla | 7e680c2 | 2006-10-30 17:31:51 -0500 | [diff] [blame] | 146 | #define NVREG_XMITCTL_MGMT_ST 0x40000000 |
| 147 | #define NVREG_XMITCTL_SYNC_MASK 0x000f0000 |
| 148 | #define NVREG_XMITCTL_SYNC_NOT_READY 0x0 |
| 149 | #define NVREG_XMITCTL_SYNC_PHY_INIT 0x00040000 |
| 150 | #define NVREG_XMITCTL_MGMT_SEMA_MASK 0x00000f00 |
| 151 | #define NVREG_XMITCTL_MGMT_SEMA_FREE 0x0 |
| 152 | #define NVREG_XMITCTL_HOST_SEMA_MASK 0x0000f000 |
| 153 | #define NVREG_XMITCTL_HOST_SEMA_ACQ 0x0000f000 |
| 154 | #define NVREG_XMITCTL_HOST_LOADED 0x00004000 |
Ayaz Abdulla | f35723e | 2003-02-20 03:03:54 -0500 | [diff] [blame] | 155 | #define NVREG_XMITCTL_TX_PATH_EN 0x01000000 |
Ayaz Abdulla | cac1c52 | 2009-02-07 00:23:57 -0800 | [diff] [blame] | 156 | #define NVREG_XMITCTL_DATA_START 0x00100000 |
| 157 | #define NVREG_XMITCTL_DATA_READY 0x00010000 |
| 158 | #define NVREG_XMITCTL_DATA_ERROR 0x00020000 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 159 | NvRegTransmitterStatus = 0x088, |
| 160 | #define NVREG_XMITSTAT_BUSY 0x01 |
| 161 | |
| 162 | NvRegPacketFilterFlags = 0x8c, |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 163 | #define NVREG_PFF_PAUSE_RX 0x08 |
| 164 | #define NVREG_PFF_ALWAYS 0x7F0000 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 165 | #define NVREG_PFF_PROMISC 0x80 |
| 166 | #define NVREG_PFF_MYADDR 0x20 |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 167 | #define NVREG_PFF_LOOPBACK 0x10 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 168 | |
| 169 | NvRegOffloadConfig = 0x90, |
| 170 | #define NVREG_OFFLOAD_HOMEPHY 0x601 |
| 171 | #define NVREG_OFFLOAD_NORMAL RX_NIC_BUFSIZE |
| 172 | NvRegReceiverControl = 0x094, |
| 173 | #define NVREG_RCVCTL_START 0x01 |
Ayaz Abdulla | f35723e | 2003-02-20 03:03:54 -0500 | [diff] [blame] | 174 | #define NVREG_RCVCTL_RX_PATH_EN 0x01000000 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 175 | NvRegReceiverStatus = 0x98, |
| 176 | #define NVREG_RCVSTAT_BUSY 0x01 |
| 177 | |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 178 | NvRegSlotTime = 0x9c, |
| 179 | #define NVREG_SLOTTIME_LEGBF_ENABLED 0x80000000 |
| 180 | #define NVREG_SLOTTIME_10_100_FULL 0x00007f00 |
| 181 | #define NVREG_SLOTTIME_1000_FULL 0x0003ff00 |
| 182 | #define NVREG_SLOTTIME_HALF 0x0000ff00 |
| 183 | #define NVREG_SLOTTIME_DEFAULT 0x00007f00 |
| 184 | #define NVREG_SLOTTIME_MASK 0x000000ff |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 185 | |
Ayaz Abdulla | 9744e21 | 2006-07-06 16:45:58 -0400 | [diff] [blame] | 186 | NvRegTxDeferral = 0xA0, |
Ayaz Abdulla | fd9b558 | 2008-02-05 12:29:49 -0500 | [diff] [blame] | 187 | #define NVREG_TX_DEFERRAL_DEFAULT 0x15050f |
| 188 | #define NVREG_TX_DEFERRAL_RGMII_10_100 0x16070f |
| 189 | #define NVREG_TX_DEFERRAL_RGMII_1000 0x14050f |
| 190 | #define NVREG_TX_DEFERRAL_RGMII_STRETCH_10 0x16190f |
| 191 | #define NVREG_TX_DEFERRAL_RGMII_STRETCH_100 0x16300f |
| 192 | #define NVREG_TX_DEFERRAL_MII_STRETCH 0x152000 |
Ayaz Abdulla | 9744e21 | 2006-07-06 16:45:58 -0400 | [diff] [blame] | 193 | NvRegRxDeferral = 0xA4, |
| 194 | #define NVREG_RX_DEFERRAL_DEFAULT 0x16 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 195 | NvRegMacAddrA = 0xA8, |
| 196 | NvRegMacAddrB = 0xAC, |
| 197 | NvRegMulticastAddrA = 0xB0, |
| 198 | #define NVREG_MCASTADDRA_FORCE 0x01 |
| 199 | NvRegMulticastAddrB = 0xB4, |
| 200 | NvRegMulticastMaskA = 0xB8, |
Ayaz Abdulla | bb9a4fd | 2008-01-13 16:03:04 -0500 | [diff] [blame] | 201 | #define NVREG_MCASTMASKA_NONE 0xffffffff |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 202 | NvRegMulticastMaskB = 0xBC, |
Ayaz Abdulla | bb9a4fd | 2008-01-13 16:03:04 -0500 | [diff] [blame] | 203 | #define NVREG_MCASTMASKB_NONE 0xffff |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 204 | |
| 205 | NvRegPhyInterface = 0xC0, |
| 206 | #define PHY_RGMII 0x10000000 |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 207 | NvRegBackOffControl = 0xC4, |
| 208 | #define NVREG_BKOFFCTRL_DEFAULT 0x70000000 |
| 209 | #define NVREG_BKOFFCTRL_SEED_MASK 0x000003ff |
| 210 | #define NVREG_BKOFFCTRL_SELECT 24 |
| 211 | #define NVREG_BKOFFCTRL_GEAR 12 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 212 | |
| 213 | NvRegTxRingPhysAddr = 0x100, |
| 214 | NvRegRxRingPhysAddr = 0x104, |
| 215 | NvRegRingSizes = 0x108, |
| 216 | #define NVREG_RINGSZ_TXSHIFT 0 |
| 217 | #define NVREG_RINGSZ_RXSHIFT 16 |
Ayaz Abdulla | 5070d34 | 2006-07-31 12:05:01 -0400 | [diff] [blame] | 218 | NvRegTransmitPoll = 0x10c, |
| 219 | #define NVREG_TRANSMITPOLL_MAC_ADDR_REV 0x00008000 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 220 | NvRegLinkSpeed = 0x110, |
| 221 | #define NVREG_LINKSPEED_FORCE 0x10000 |
| 222 | #define NVREG_LINKSPEED_10 1000 |
| 223 | #define NVREG_LINKSPEED_100 100 |
| 224 | #define NVREG_LINKSPEED_1000 50 |
| 225 | #define NVREG_LINKSPEED_MASK (0xFFF) |
| 226 | NvRegUnknownSetupReg5 = 0x130, |
| 227 | #define NVREG_UNKSETUP5_BIT31 (1<<31) |
Ayaz Abdulla | 95d161c | 2006-07-06 16:46:25 -0400 | [diff] [blame] | 228 | NvRegTxWatermark = 0x13c, |
| 229 | #define NVREG_TX_WM_DESC1_DEFAULT 0x0200010 |
| 230 | #define NVREG_TX_WM_DESC2_3_DEFAULT 0x1e08000 |
| 231 | #define NVREG_TX_WM_DESC2_3_1000 0xfe08000 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 232 | NvRegTxRxControl = 0x144, |
| 233 | #define NVREG_TXRXCTL_KICK 0x0001 |
| 234 | #define NVREG_TXRXCTL_BIT1 0x0002 |
| 235 | #define NVREG_TXRXCTL_BIT2 0x0004 |
| 236 | #define NVREG_TXRXCTL_IDLE 0x0008 |
| 237 | #define NVREG_TXRXCTL_RESET 0x0010 |
| 238 | #define NVREG_TXRXCTL_RXCHECK 0x0400 |
Manfred Spraul | 8a4ae7f | 2005-09-21 23:22:10 -0400 | [diff] [blame] | 239 | #define NVREG_TXRXCTL_DESC_1 0 |
Ayaz Abdulla | d2f7841 | 2007-01-09 13:30:02 -0500 | [diff] [blame] | 240 | #define NVREG_TXRXCTL_DESC_2 0x002100 |
| 241 | #define NVREG_TXRXCTL_DESC_3 0xc02200 |
Ayaz Abdulla | ee407b0 | 2006-02-04 13:13:17 -0500 | [diff] [blame] | 242 | #define NVREG_TXRXCTL_VLANSTRIP 0x00040 |
| 243 | #define NVREG_TXRXCTL_VLANINS 0x00080 |
Ayaz Abdulla | 0832b25 | 2006-02-04 13:13:26 -0500 | [diff] [blame] | 244 | NvRegTxRingPhysAddrHigh = 0x148, |
| 245 | NvRegRxRingPhysAddrHigh = 0x14C, |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 246 | NvRegTxPauseFrame = 0x170, |
Ayaz Abdulla | 5289b4c | 2008-02-05 12:30:01 -0500 | [diff] [blame] | 247 | #define NVREG_TX_PAUSEFRAME_DISABLE 0x0fff0080 |
| 248 | #define NVREG_TX_PAUSEFRAME_ENABLE_V1 0x01800010 |
| 249 | #define NVREG_TX_PAUSEFRAME_ENABLE_V2 0x056003f0 |
| 250 | #define NVREG_TX_PAUSEFRAME_ENABLE_V3 0x09f00880 |
Ayaz Abdulla | 9a33e88 | 2008-08-06 12:12:34 -0400 | [diff] [blame] | 251 | NvRegTxPauseFrameLimit = 0x174, |
| 252 | #define NVREG_TX_PAUSEFRAMELIMIT_ENABLE 0x00010000 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 253 | NvRegMIIStatus = 0x180, |
| 254 | #define NVREG_MIISTAT_ERROR 0x0001 |
| 255 | #define NVREG_MIISTAT_LINKCHANGE 0x0008 |
Ayaz Abdulla | eb79842 | 2008-02-04 15:14:04 -0500 | [diff] [blame] | 256 | #define NVREG_MIISTAT_MASK_RW 0x0007 |
| 257 | #define NVREG_MIISTAT_MASK_ALL 0x000f |
Ayaz Abdulla | 7e680c2 | 2006-10-30 17:31:51 -0500 | [diff] [blame] | 258 | NvRegMIIMask = 0x184, |
| 259 | #define NVREG_MII_LINKCHANGE 0x0008 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 260 | |
| 261 | NvRegAdapterControl = 0x188, |
| 262 | #define NVREG_ADAPTCTL_START 0x02 |
| 263 | #define NVREG_ADAPTCTL_LINKUP 0x04 |
| 264 | #define NVREG_ADAPTCTL_PHYVALID 0x40000 |
| 265 | #define NVREG_ADAPTCTL_RUNNING 0x100000 |
| 266 | #define NVREG_ADAPTCTL_PHYSHIFT 24 |
| 267 | NvRegMIISpeed = 0x18c, |
| 268 | #define NVREG_MIISPEED_BIT8 (1<<8) |
| 269 | #define NVREG_MIIDELAY 5 |
| 270 | NvRegMIIControl = 0x190, |
| 271 | #define NVREG_MIICTL_INUSE 0x08000 |
| 272 | #define NVREG_MIICTL_WRITE 0x00400 |
| 273 | #define NVREG_MIICTL_ADDRSHIFT 5 |
| 274 | NvRegMIIData = 0x194, |
Ayaz Abdulla | 9c66243 | 2008-08-06 12:11:42 -0400 | [diff] [blame] | 275 | NvRegTxUnicast = 0x1a0, |
| 276 | NvRegTxMulticast = 0x1a4, |
| 277 | NvRegTxBroadcast = 0x1a8, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 278 | NvRegWakeUpFlags = 0x200, |
| 279 | #define NVREG_WAKEUPFLAGS_VAL 0x7770 |
| 280 | #define NVREG_WAKEUPFLAGS_BUSYSHIFT 24 |
| 281 | #define NVREG_WAKEUPFLAGS_ENABLESHIFT 16 |
| 282 | #define NVREG_WAKEUPFLAGS_D3SHIFT 12 |
| 283 | #define NVREG_WAKEUPFLAGS_D2SHIFT 8 |
| 284 | #define NVREG_WAKEUPFLAGS_D1SHIFT 4 |
| 285 | #define NVREG_WAKEUPFLAGS_D0SHIFT 0 |
| 286 | #define NVREG_WAKEUPFLAGS_ACCEPT_MAGPAT 0x01 |
| 287 | #define NVREG_WAKEUPFLAGS_ACCEPT_WAKEUPPAT 0x02 |
| 288 | #define NVREG_WAKEUPFLAGS_ACCEPT_LINKCHANGE 0x04 |
| 289 | #define NVREG_WAKEUPFLAGS_ENABLE 0x1111 |
| 290 | |
Ayaz Abdulla | cac1c52 | 2009-02-07 00:23:57 -0800 | [diff] [blame] | 291 | NvRegMgmtUnitGetVersion = 0x204, |
| 292 | #define NVREG_MGMTUNITGETVERSION 0x01 |
| 293 | NvRegMgmtUnitVersion = 0x208, |
| 294 | #define NVREG_MGMTUNITVERSION 0x08 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 295 | NvRegPowerCap = 0x268, |
| 296 | #define NVREG_POWERCAP_D3SUPP (1<<30) |
| 297 | #define NVREG_POWERCAP_D2SUPP (1<<26) |
| 298 | #define NVREG_POWERCAP_D1SUPP (1<<25) |
| 299 | NvRegPowerState = 0x26c, |
| 300 | #define NVREG_POWERSTATE_POWEREDUP 0x8000 |
| 301 | #define NVREG_POWERSTATE_VALID 0x0100 |
| 302 | #define NVREG_POWERSTATE_MASK 0x0003 |
| 303 | #define NVREG_POWERSTATE_D0 0x0000 |
| 304 | #define NVREG_POWERSTATE_D1 0x0001 |
| 305 | #define NVREG_POWERSTATE_D2 0x0002 |
| 306 | #define NVREG_POWERSTATE_D3 0x0003 |
Ayaz Abdulla | cac1c52 | 2009-02-07 00:23:57 -0800 | [diff] [blame] | 307 | NvRegMgmtUnitControl = 0x278, |
| 308 | #define NVREG_MGMTUNITCONTROL_INUSE 0x20000 |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 309 | NvRegTxCnt = 0x280, |
| 310 | NvRegTxZeroReXmt = 0x284, |
| 311 | NvRegTxOneReXmt = 0x288, |
| 312 | NvRegTxManyReXmt = 0x28c, |
| 313 | NvRegTxLateCol = 0x290, |
| 314 | NvRegTxUnderflow = 0x294, |
| 315 | NvRegTxLossCarrier = 0x298, |
| 316 | NvRegTxExcessDef = 0x29c, |
| 317 | NvRegTxRetryErr = 0x2a0, |
| 318 | NvRegRxFrameErr = 0x2a4, |
| 319 | NvRegRxExtraByte = 0x2a8, |
| 320 | NvRegRxLateCol = 0x2ac, |
| 321 | NvRegRxRunt = 0x2b0, |
| 322 | NvRegRxFrameTooLong = 0x2b4, |
| 323 | NvRegRxOverflow = 0x2b8, |
| 324 | NvRegRxFCSErr = 0x2bc, |
| 325 | NvRegRxFrameAlignErr = 0x2c0, |
| 326 | NvRegRxLenErr = 0x2c4, |
| 327 | NvRegRxUnicast = 0x2c8, |
| 328 | NvRegRxMulticast = 0x2cc, |
| 329 | NvRegRxBroadcast = 0x2d0, |
| 330 | NvRegTxDef = 0x2d4, |
| 331 | NvRegTxFrame = 0x2d8, |
| 332 | NvRegRxCnt = 0x2dc, |
| 333 | NvRegTxPause = 0x2e0, |
| 334 | NvRegRxPause = 0x2e4, |
| 335 | NvRegRxDropFrame = 0x2e8, |
Ayaz Abdulla | ee407b0 | 2006-02-04 13:13:17 -0500 | [diff] [blame] | 336 | NvRegVlanControl = 0x300, |
| 337 | #define NVREG_VLANCONTROL_ENABLE 0x2000 |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 338 | NvRegMSIXMap0 = 0x3e0, |
| 339 | NvRegMSIXMap1 = 0x3e4, |
| 340 | NvRegMSIXIrqStatus = 0x3f0, |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 341 | |
| 342 | NvRegPowerState2 = 0x600, |
Ayaz Abdulla | 1545e20 | 2008-09-22 09:55:35 -0400 | [diff] [blame] | 343 | #define NVREG_POWERSTATE2_POWERUP_MASK 0x0F15 |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 344 | #define NVREG_POWERSTATE2_POWERUP_REV_A3 0x0001 |
Ayaz Abdulla | 22ae03a | 2008-07-25 15:31:29 -0400 | [diff] [blame] | 345 | #define NVREG_POWERSTATE2_PHY_RESET 0x0004 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 346 | }; |
| 347 | |
| 348 | /* Big endian: should work, but is untested */ |
| 349 | struct ring_desc { |
Stephen Hemminger | a8bed49 | 2006-07-27 18:50:09 -0700 | [diff] [blame] | 350 | __le32 buf; |
| 351 | __le32 flaglen; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 352 | }; |
| 353 | |
Manfred Spraul | ee73362 | 2005-07-31 18:32:26 +0200 | [diff] [blame] | 354 | struct ring_desc_ex { |
Stephen Hemminger | a8bed49 | 2006-07-27 18:50:09 -0700 | [diff] [blame] | 355 | __le32 bufhigh; |
| 356 | __le32 buflow; |
| 357 | __le32 txvlan; |
| 358 | __le32 flaglen; |
Manfred Spraul | ee73362 | 2005-07-31 18:32:26 +0200 | [diff] [blame] | 359 | }; |
| 360 | |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 361 | union ring_type { |
Manfred Spraul | ee73362 | 2005-07-31 18:32:26 +0200 | [diff] [blame] | 362 | struct ring_desc* orig; |
| 363 | struct ring_desc_ex* ex; |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 364 | }; |
Manfred Spraul | ee73362 | 2005-07-31 18:32:26 +0200 | [diff] [blame] | 365 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 366 | #define FLAG_MASK_V1 0xffff0000 |
| 367 | #define FLAG_MASK_V2 0xffffc000 |
| 368 | #define LEN_MASK_V1 (0xffffffff ^ FLAG_MASK_V1) |
| 369 | #define LEN_MASK_V2 (0xffffffff ^ FLAG_MASK_V2) |
| 370 | |
| 371 | #define NV_TX_LASTPACKET (1<<16) |
| 372 | #define NV_TX_RETRYERROR (1<<19) |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 373 | #define NV_TX_RETRYCOUNT_MASK (0xF<<20) |
Manfred Spraul | c2dba06 | 2005-07-31 18:29:47 +0200 | [diff] [blame] | 374 | #define NV_TX_FORCED_INTERRUPT (1<<24) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 375 | #define NV_TX_DEFERRED (1<<26) |
| 376 | #define NV_TX_CARRIERLOST (1<<27) |
| 377 | #define NV_TX_LATECOLLISION (1<<28) |
| 378 | #define NV_TX_UNDERFLOW (1<<29) |
| 379 | #define NV_TX_ERROR (1<<30) |
| 380 | #define NV_TX_VALID (1<<31) |
| 381 | |
| 382 | #define NV_TX2_LASTPACKET (1<<29) |
| 383 | #define NV_TX2_RETRYERROR (1<<18) |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 384 | #define NV_TX2_RETRYCOUNT_MASK (0xF<<19) |
Manfred Spraul | c2dba06 | 2005-07-31 18:29:47 +0200 | [diff] [blame] | 385 | #define NV_TX2_FORCED_INTERRUPT (1<<30) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 386 | #define NV_TX2_DEFERRED (1<<25) |
| 387 | #define NV_TX2_CARRIERLOST (1<<26) |
| 388 | #define NV_TX2_LATECOLLISION (1<<27) |
| 389 | #define NV_TX2_UNDERFLOW (1<<28) |
| 390 | /* error and valid are the same for both */ |
| 391 | #define NV_TX2_ERROR (1<<30) |
| 392 | #define NV_TX2_VALID (1<<31) |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 393 | #define NV_TX2_TSO (1<<28) |
| 394 | #define NV_TX2_TSO_SHIFT 14 |
Ayaz Abdulla | fa45459 | 2006-01-05 22:45:45 -0800 | [diff] [blame] | 395 | #define NV_TX2_TSO_MAX_SHIFT 14 |
| 396 | #define NV_TX2_TSO_MAX_SIZE (1<<NV_TX2_TSO_MAX_SHIFT) |
Manfred Spraul | 8a4ae7f | 2005-09-21 23:22:10 -0400 | [diff] [blame] | 397 | #define NV_TX2_CHECKSUM_L3 (1<<27) |
| 398 | #define NV_TX2_CHECKSUM_L4 (1<<26) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 399 | |
Ayaz Abdulla | ee407b0 | 2006-02-04 13:13:17 -0500 | [diff] [blame] | 400 | #define NV_TX3_VLAN_TAG_PRESENT (1<<18) |
| 401 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 402 | #define NV_RX_DESCRIPTORVALID (1<<16) |
| 403 | #define NV_RX_MISSEDFRAME (1<<17) |
| 404 | #define NV_RX_SUBSTRACT1 (1<<18) |
| 405 | #define NV_RX_ERROR1 (1<<23) |
| 406 | #define NV_RX_ERROR2 (1<<24) |
| 407 | #define NV_RX_ERROR3 (1<<25) |
| 408 | #define NV_RX_ERROR4 (1<<26) |
| 409 | #define NV_RX_CRCERR (1<<27) |
| 410 | #define NV_RX_OVERFLOW (1<<28) |
| 411 | #define NV_RX_FRAMINGERR (1<<29) |
| 412 | #define NV_RX_ERROR (1<<30) |
| 413 | #define NV_RX_AVAIL (1<<31) |
Ayaz Abdulla | 1ef6841 | 2008-08-06 12:11:03 -0400 | [diff] [blame] | 414 | #define NV_RX_ERROR_MASK (NV_RX_ERROR1|NV_RX_ERROR2|NV_RX_ERROR3|NV_RX_ERROR4|NV_RX_CRCERR|NV_RX_OVERFLOW|NV_RX_FRAMINGERR) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 415 | |
| 416 | #define NV_RX2_CHECKSUMMASK (0x1C000000) |
Ayaz Abdulla | bfaffe8 | 2008-01-13 16:02:55 -0500 | [diff] [blame] | 417 | #define NV_RX2_CHECKSUM_IP (0x10000000) |
| 418 | #define NV_RX2_CHECKSUM_IP_TCP (0x14000000) |
| 419 | #define NV_RX2_CHECKSUM_IP_UDP (0x18000000) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 420 | #define NV_RX2_DESCRIPTORVALID (1<<29) |
| 421 | #define NV_RX2_SUBSTRACT1 (1<<25) |
| 422 | #define NV_RX2_ERROR1 (1<<18) |
| 423 | #define NV_RX2_ERROR2 (1<<19) |
| 424 | #define NV_RX2_ERROR3 (1<<20) |
| 425 | #define NV_RX2_ERROR4 (1<<21) |
| 426 | #define NV_RX2_CRCERR (1<<22) |
| 427 | #define NV_RX2_OVERFLOW (1<<23) |
| 428 | #define NV_RX2_FRAMINGERR (1<<24) |
| 429 | /* error and avail are the same for both */ |
| 430 | #define NV_RX2_ERROR (1<<30) |
| 431 | #define NV_RX2_AVAIL (1<<31) |
Ayaz Abdulla | 1ef6841 | 2008-08-06 12:11:03 -0400 | [diff] [blame] | 432 | #define NV_RX2_ERROR_MASK (NV_RX2_ERROR1|NV_RX2_ERROR2|NV_RX2_ERROR3|NV_RX2_ERROR4|NV_RX2_CRCERR|NV_RX2_OVERFLOW|NV_RX2_FRAMINGERR) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 433 | |
Ayaz Abdulla | ee407b0 | 2006-02-04 13:13:17 -0500 | [diff] [blame] | 434 | #define NV_RX3_VLAN_TAG_PRESENT (1<<16) |
| 435 | #define NV_RX3_VLAN_TAG_MASK (0x0000FFFF) |
| 436 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 437 | /* Miscelaneous hardware related defines: */ |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 438 | #define NV_PCI_REGSZ_VER1 0x270 |
Ayaz Abdulla | 57fff69 | 2007-01-23 12:27:00 -0500 | [diff] [blame] | 439 | #define NV_PCI_REGSZ_VER2 0x2d4 |
| 440 | #define NV_PCI_REGSZ_VER3 0x604 |
Tobias Diedrich | 1a1ca86 | 2008-05-18 15:03:44 +0200 | [diff] [blame] | 441 | #define NV_PCI_REGSZ_MAX 0x604 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 442 | |
| 443 | /* various timeout delays: all in usec */ |
| 444 | #define NV_TXRX_RESET_DELAY 4 |
| 445 | #define NV_TXSTOP_DELAY1 10 |
| 446 | #define NV_TXSTOP_DELAY1MAX 500000 |
| 447 | #define NV_TXSTOP_DELAY2 100 |
| 448 | #define NV_RXSTOP_DELAY1 10 |
| 449 | #define NV_RXSTOP_DELAY1MAX 500000 |
| 450 | #define NV_RXSTOP_DELAY2 100 |
| 451 | #define NV_SETUP5_DELAY 5 |
| 452 | #define NV_SETUP5_DELAYMAX 50000 |
| 453 | #define NV_POWERUP_DELAY 5 |
| 454 | #define NV_POWERUP_DELAYMAX 5000 |
| 455 | #define NV_MIIBUSY_DELAY 50 |
| 456 | #define NV_MIIPHY_DELAY 10 |
| 457 | #define NV_MIIPHY_DELAYMAX 10000 |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 458 | #define NV_MAC_RESET_DELAY 64 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 459 | |
| 460 | #define NV_WAKEUPPATTERNS 5 |
| 461 | #define NV_WAKEUPMASKENTRIES 4 |
| 462 | |
| 463 | /* General driver defaults */ |
| 464 | #define NV_WATCHDOG_TIMEO (5*HZ) |
| 465 | |
Ayaz Abdulla | 6cef67a | 2009-03-05 08:02:30 +0000 | [diff] [blame] | 466 | #define RX_RING_DEFAULT 512 |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 467 | #define TX_RING_DEFAULT 256 |
| 468 | #define RX_RING_MIN 128 |
| 469 | #define TX_RING_MIN 64 |
| 470 | #define RING_MAX_DESC_VER_1 1024 |
| 471 | #define RING_MAX_DESC_VER_2_3 16384 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 472 | |
| 473 | /* rx/tx mac addr + type + vlan + align + slack*/ |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 474 | #define NV_RX_HEADERS (64) |
| 475 | /* even more slack. */ |
| 476 | #define NV_RX_ALLOC_PAD (64) |
| 477 | |
| 478 | /* maximum mtu size */ |
| 479 | #define NV_PKTLIMIT_1 ETH_DATA_LEN /* hard limit not known */ |
| 480 | #define NV_PKTLIMIT_2 9100 /* Actual limit according to NVidia: 9202 */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 481 | |
| 482 | #define OOM_REFILL (1+HZ/20) |
| 483 | #define POLL_WAIT (1+HZ/100) |
| 484 | #define LINK_TIMEOUT (3*HZ) |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 485 | #define STATS_INTERVAL (10*HZ) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 486 | |
Jeff Garzik | f3b197a | 2006-05-26 21:39:03 -0400 | [diff] [blame] | 487 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 488 | * desc_ver values: |
Manfred Spraul | 8a4ae7f | 2005-09-21 23:22:10 -0400 | [diff] [blame] | 489 | * The nic supports three different descriptor types: |
| 490 | * - DESC_VER_1: Original |
| 491 | * - DESC_VER_2: support for jumbo frames. |
| 492 | * - DESC_VER_3: 64-bit format. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 493 | */ |
Manfred Spraul | 8a4ae7f | 2005-09-21 23:22:10 -0400 | [diff] [blame] | 494 | #define DESC_VER_1 1 |
| 495 | #define DESC_VER_2 2 |
| 496 | #define DESC_VER_3 3 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 497 | |
| 498 | /* PHY defines */ |
Ayaz Abdulla | 9f3f791 | 2008-04-23 14:37:30 -0400 | [diff] [blame] | 499 | #define PHY_OUI_MARVELL 0x5043 |
| 500 | #define PHY_OUI_CICADA 0x03f1 |
| 501 | #define PHY_OUI_VITESSE 0x01c1 |
| 502 | #define PHY_OUI_REALTEK 0x0732 |
| 503 | #define PHY_OUI_REALTEK2 0x0020 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 504 | #define PHYID1_OUI_MASK 0x03ff |
| 505 | #define PHYID1_OUI_SHFT 6 |
| 506 | #define PHYID2_OUI_MASK 0xfc00 |
| 507 | #define PHYID2_OUI_SHFT 10 |
Ayaz Abdulla | edf7e5e | 2006-08-24 15:43:42 -0400 | [diff] [blame] | 508 | #define PHYID2_MODEL_MASK 0x03f0 |
Ayaz Abdulla | 9f3f791 | 2008-04-23 14:37:30 -0400 | [diff] [blame] | 509 | #define PHY_MODEL_REALTEK_8211 0x0110 |
| 510 | #define PHY_REV_MASK 0x0001 |
| 511 | #define PHY_REV_REALTEK_8211B 0x0000 |
| 512 | #define PHY_REV_REALTEK_8211C 0x0001 |
| 513 | #define PHY_MODEL_REALTEK_8201 0x0200 |
| 514 | #define PHY_MODEL_MARVELL_E3016 0x0220 |
Ayaz Abdulla | edf7e5e | 2006-08-24 15:43:42 -0400 | [diff] [blame] | 515 | #define PHY_MARVELL_E3016_INITMASK 0x0300 |
Ayaz Abdulla | 14a67f3 | 2007-07-15 06:50:28 -0400 | [diff] [blame] | 516 | #define PHY_CICADA_INIT1 0x0f000 |
| 517 | #define PHY_CICADA_INIT2 0x0e00 |
| 518 | #define PHY_CICADA_INIT3 0x01000 |
| 519 | #define PHY_CICADA_INIT4 0x0200 |
| 520 | #define PHY_CICADA_INIT5 0x0004 |
| 521 | #define PHY_CICADA_INIT6 0x02000 |
Ayaz Abdulla | d215d8a | 2007-07-15 06:50:53 -0400 | [diff] [blame] | 522 | #define PHY_VITESSE_INIT_REG1 0x1f |
| 523 | #define PHY_VITESSE_INIT_REG2 0x10 |
| 524 | #define PHY_VITESSE_INIT_REG3 0x11 |
| 525 | #define PHY_VITESSE_INIT_REG4 0x12 |
| 526 | #define PHY_VITESSE_INIT_MSK1 0xc |
| 527 | #define PHY_VITESSE_INIT_MSK2 0x0180 |
| 528 | #define PHY_VITESSE_INIT1 0x52b5 |
| 529 | #define PHY_VITESSE_INIT2 0xaf8a |
| 530 | #define PHY_VITESSE_INIT3 0x8 |
| 531 | #define PHY_VITESSE_INIT4 0x8f8a |
| 532 | #define PHY_VITESSE_INIT5 0xaf86 |
| 533 | #define PHY_VITESSE_INIT6 0x8f86 |
| 534 | #define PHY_VITESSE_INIT7 0xaf82 |
| 535 | #define PHY_VITESSE_INIT8 0x0100 |
| 536 | #define PHY_VITESSE_INIT9 0x8f82 |
| 537 | #define PHY_VITESSE_INIT10 0x0 |
Ayaz Abdulla | c5e3ae8 | 2007-07-15 06:51:03 -0400 | [diff] [blame] | 538 | #define PHY_REALTEK_INIT_REG1 0x1f |
| 539 | #define PHY_REALTEK_INIT_REG2 0x19 |
| 540 | #define PHY_REALTEK_INIT_REG3 0x13 |
Ayaz Abdulla | 9f3f791 | 2008-04-23 14:37:30 -0400 | [diff] [blame] | 541 | #define PHY_REALTEK_INIT_REG4 0x14 |
| 542 | #define PHY_REALTEK_INIT_REG5 0x18 |
| 543 | #define PHY_REALTEK_INIT_REG6 0x11 |
Ayaz Abdulla | 22ae03a | 2008-07-25 15:31:29 -0400 | [diff] [blame] | 544 | #define PHY_REALTEK_INIT_REG7 0x01 |
Ayaz Abdulla | c5e3ae8 | 2007-07-15 06:51:03 -0400 | [diff] [blame] | 545 | #define PHY_REALTEK_INIT1 0x0000 |
| 546 | #define PHY_REALTEK_INIT2 0x8e00 |
| 547 | #define PHY_REALTEK_INIT3 0x0001 |
| 548 | #define PHY_REALTEK_INIT4 0xad17 |
Ayaz Abdulla | 9f3f791 | 2008-04-23 14:37:30 -0400 | [diff] [blame] | 549 | #define PHY_REALTEK_INIT5 0xfb54 |
| 550 | #define PHY_REALTEK_INIT6 0xf5c7 |
| 551 | #define PHY_REALTEK_INIT7 0x1000 |
| 552 | #define PHY_REALTEK_INIT8 0x0003 |
Ayaz Abdulla | 22ae03a | 2008-07-25 15:31:29 -0400 | [diff] [blame] | 553 | #define PHY_REALTEK_INIT9 0x0008 |
| 554 | #define PHY_REALTEK_INIT10 0x0005 |
| 555 | #define PHY_REALTEK_INIT11 0x0200 |
Ayaz Abdulla | 9f3f791 | 2008-04-23 14:37:30 -0400 | [diff] [blame] | 556 | #define PHY_REALTEK_INIT_MSK1 0x0003 |
Ayaz Abdulla | d215d8a | 2007-07-15 06:50:53 -0400 | [diff] [blame] | 557 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 558 | #define PHY_GIGABIT 0x0100 |
| 559 | |
| 560 | #define PHY_TIMEOUT 0x1 |
| 561 | #define PHY_ERROR 0x2 |
| 562 | |
| 563 | #define PHY_100 0x1 |
| 564 | #define PHY_1000 0x2 |
| 565 | #define PHY_HALF 0x100 |
| 566 | |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 567 | #define NV_PAUSEFRAME_RX_CAPABLE 0x0001 |
| 568 | #define NV_PAUSEFRAME_TX_CAPABLE 0x0002 |
| 569 | #define NV_PAUSEFRAME_RX_ENABLE 0x0004 |
| 570 | #define NV_PAUSEFRAME_TX_ENABLE 0x0008 |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 571 | #define NV_PAUSEFRAME_RX_REQ 0x0010 |
| 572 | #define NV_PAUSEFRAME_TX_REQ 0x0020 |
| 573 | #define NV_PAUSEFRAME_AUTONEG 0x0040 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 574 | |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 575 | /* MSI/MSI-X defines */ |
| 576 | #define NV_MSI_X_MAX_VECTORS 8 |
| 577 | #define NV_MSI_X_VECTORS_MASK 0x000f |
| 578 | #define NV_MSI_CAPABLE 0x0010 |
| 579 | #define NV_MSI_X_CAPABLE 0x0020 |
| 580 | #define NV_MSI_ENABLED 0x0040 |
| 581 | #define NV_MSI_X_ENABLED 0x0080 |
| 582 | |
| 583 | #define NV_MSI_X_VECTOR_ALL 0x0 |
| 584 | #define NV_MSI_X_VECTOR_RX 0x0 |
| 585 | #define NV_MSI_X_VECTOR_TX 0x1 |
| 586 | #define NV_MSI_X_VECTOR_OTHER 0x2 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 587 | |
Ayaz Abdulla | b6e4405 | 2009-02-07 00:24:15 -0800 | [diff] [blame] | 588 | #define NV_MSI_PRIV_OFFSET 0x68 |
| 589 | #define NV_MSI_PRIV_VALUE 0xffffffff |
| 590 | |
Ayaz Abdulla | b2976d2 | 2008-02-04 15:13:59 -0500 | [diff] [blame] | 591 | #define NV_RESTART_TX 0x1 |
| 592 | #define NV_RESTART_RX 0x2 |
| 593 | |
Ayaz Abdulla | 3b446c3 | 2008-03-10 14:58:21 -0500 | [diff] [blame] | 594 | #define NV_TX_LIMIT_COUNT 16 |
| 595 | |
Ayaz Abdulla | 4145ade | 2009-03-05 08:02:26 +0000 | [diff] [blame] | 596 | #define NV_DYNAMIC_THRESHOLD 4 |
| 597 | #define NV_DYNAMIC_MAX_QUIET_COUNT 2048 |
| 598 | |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 599 | /* statistics */ |
| 600 | struct nv_ethtool_str { |
| 601 | char name[ETH_GSTRING_LEN]; |
| 602 | }; |
| 603 | |
| 604 | static const struct nv_ethtool_str nv_estats_str[] = { |
| 605 | { "tx_bytes" }, |
| 606 | { "tx_zero_rexmt" }, |
| 607 | { "tx_one_rexmt" }, |
| 608 | { "tx_many_rexmt" }, |
| 609 | { "tx_late_collision" }, |
| 610 | { "tx_fifo_errors" }, |
| 611 | { "tx_carrier_errors" }, |
| 612 | { "tx_excess_deferral" }, |
| 613 | { "tx_retry_error" }, |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 614 | { "rx_frame_error" }, |
| 615 | { "rx_extra_byte" }, |
| 616 | { "rx_late_collision" }, |
| 617 | { "rx_runt" }, |
| 618 | { "rx_frame_too_long" }, |
| 619 | { "rx_over_errors" }, |
| 620 | { "rx_crc_errors" }, |
| 621 | { "rx_frame_align_error" }, |
| 622 | { "rx_length_error" }, |
| 623 | { "rx_unicast" }, |
| 624 | { "rx_multicast" }, |
| 625 | { "rx_broadcast" }, |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 626 | { "rx_packets" }, |
Ayaz Abdulla | 57fff69 | 2007-01-23 12:27:00 -0500 | [diff] [blame] | 627 | { "rx_errors_total" }, |
| 628 | { "tx_errors_total" }, |
| 629 | |
| 630 | /* version 2 stats */ |
| 631 | { "tx_deferral" }, |
| 632 | { "tx_packets" }, |
| 633 | { "rx_bytes" }, |
| 634 | { "tx_pause" }, |
| 635 | { "rx_pause" }, |
Ayaz Abdulla | 9c66243 | 2008-08-06 12:11:42 -0400 | [diff] [blame] | 636 | { "rx_drop_frame" }, |
| 637 | |
| 638 | /* version 3 stats */ |
| 639 | { "tx_unicast" }, |
| 640 | { "tx_multicast" }, |
| 641 | { "tx_broadcast" } |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 642 | }; |
| 643 | |
| 644 | struct nv_ethtool_stats { |
| 645 | u64 tx_bytes; |
| 646 | u64 tx_zero_rexmt; |
| 647 | u64 tx_one_rexmt; |
| 648 | u64 tx_many_rexmt; |
| 649 | u64 tx_late_collision; |
| 650 | u64 tx_fifo_errors; |
| 651 | u64 tx_carrier_errors; |
| 652 | u64 tx_excess_deferral; |
| 653 | u64 tx_retry_error; |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 654 | u64 rx_frame_error; |
| 655 | u64 rx_extra_byte; |
| 656 | u64 rx_late_collision; |
| 657 | u64 rx_runt; |
| 658 | u64 rx_frame_too_long; |
| 659 | u64 rx_over_errors; |
| 660 | u64 rx_crc_errors; |
| 661 | u64 rx_frame_align_error; |
| 662 | u64 rx_length_error; |
| 663 | u64 rx_unicast; |
| 664 | u64 rx_multicast; |
| 665 | u64 rx_broadcast; |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 666 | u64 rx_packets; |
| 667 | u64 rx_errors_total; |
Ayaz Abdulla | 57fff69 | 2007-01-23 12:27:00 -0500 | [diff] [blame] | 668 | u64 tx_errors_total; |
| 669 | |
| 670 | /* version 2 stats */ |
| 671 | u64 tx_deferral; |
| 672 | u64 tx_packets; |
| 673 | u64 rx_bytes; |
| 674 | u64 tx_pause; |
| 675 | u64 rx_pause; |
| 676 | u64 rx_drop_frame; |
Ayaz Abdulla | 9c66243 | 2008-08-06 12:11:42 -0400 | [diff] [blame] | 677 | |
| 678 | /* version 3 stats */ |
| 679 | u64 tx_unicast; |
| 680 | u64 tx_multicast; |
| 681 | u64 tx_broadcast; |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 682 | }; |
| 683 | |
Ayaz Abdulla | 9c66243 | 2008-08-06 12:11:42 -0400 | [diff] [blame] | 684 | #define NV_DEV_STATISTICS_V3_COUNT (sizeof(struct nv_ethtool_stats)/sizeof(u64)) |
| 685 | #define NV_DEV_STATISTICS_V2_COUNT (NV_DEV_STATISTICS_V3_COUNT - 3) |
Ayaz Abdulla | 57fff69 | 2007-01-23 12:27:00 -0500 | [diff] [blame] | 686 | #define NV_DEV_STATISTICS_V1_COUNT (NV_DEV_STATISTICS_V2_COUNT - 6) |
| 687 | |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 688 | /* diagnostics */ |
| 689 | #define NV_TEST_COUNT_BASE 3 |
| 690 | #define NV_TEST_COUNT_EXTENDED 4 |
| 691 | |
| 692 | static const struct nv_ethtool_str nv_etests_str[] = { |
| 693 | { "link (online/offline)" }, |
| 694 | { "register (offline) " }, |
| 695 | { "interrupt (offline) " }, |
| 696 | { "loopback (offline) " } |
| 697 | }; |
| 698 | |
| 699 | struct register_test { |
Al Viro | 5bb7ea2 | 2007-12-09 16:06:41 +0000 | [diff] [blame] | 700 | __u32 reg; |
| 701 | __u32 mask; |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 702 | }; |
| 703 | |
| 704 | static const struct register_test nv_registers_test[] = { |
| 705 | { NvRegUnknownSetupReg6, 0x01 }, |
| 706 | { NvRegMisc1, 0x03c }, |
| 707 | { NvRegOffloadConfig, 0x03ff }, |
| 708 | { NvRegMulticastAddrA, 0xffffffff }, |
Ayaz Abdulla | 95d161c | 2006-07-06 16:46:25 -0400 | [diff] [blame] | 709 | { NvRegTxWatermark, 0x0ff }, |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 710 | { NvRegWakeUpFlags, 0x07777 }, |
| 711 | { 0,0 } |
| 712 | }; |
| 713 | |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 714 | struct nv_skb_map { |
| 715 | struct sk_buff *skb; |
| 716 | dma_addr_t dma; |
| 717 | unsigned int dma_len; |
Ayaz Abdulla | 3b446c3 | 2008-03-10 14:58:21 -0500 | [diff] [blame] | 718 | struct ring_desc_ex *first_tx_desc; |
| 719 | struct nv_skb_map *next_tx_ctx; |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 720 | }; |
| 721 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 722 | /* |
| 723 | * SMP locking: |
Wang Chen | b74ca3a | 2008-12-08 01:14:16 -0800 | [diff] [blame] | 724 | * All hardware access under netdev_priv(dev)->lock, except the performance |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 725 | * critical parts: |
| 726 | * - rx is (pseudo-) lockless: it relies on the single-threading provided |
| 727 | * by the arch code for interrupts. |
Herbert Xu | 932ff27 | 2006-06-09 12:20:56 -0700 | [diff] [blame] | 728 | * - tx setup is lockless: it relies on netif_tx_lock. Actual submission |
Wang Chen | b74ca3a | 2008-12-08 01:14:16 -0800 | [diff] [blame] | 729 | * needs netdev_priv(dev)->lock :-( |
Herbert Xu | 932ff27 | 2006-06-09 12:20:56 -0700 | [diff] [blame] | 730 | * - set_multicast_list: preparation lockless, relies on netif_tx_lock. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 731 | */ |
| 732 | |
| 733 | /* in dev: base, irq */ |
| 734 | struct fe_priv { |
| 735 | spinlock_t lock; |
| 736 | |
Stephen Hemminger | bea3348 | 2007-10-03 16:41:36 -0700 | [diff] [blame] | 737 | struct net_device *dev; |
| 738 | struct napi_struct napi; |
| 739 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 740 | /* General data: |
| 741 | * Locking: spin_lock(&np->lock); */ |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 742 | struct nv_ethtool_stats estats; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 743 | int in_shutdown; |
| 744 | u32 linkspeed; |
| 745 | int duplex; |
| 746 | int autoneg; |
| 747 | int fixed_mode; |
| 748 | int phyaddr; |
| 749 | int wolenabled; |
| 750 | unsigned int phy_oui; |
Ayaz Abdulla | edf7e5e | 2006-08-24 15:43:42 -0400 | [diff] [blame] | 751 | unsigned int phy_model; |
Ayaz Abdulla | 9f3f791 | 2008-04-23 14:37:30 -0400 | [diff] [blame] | 752 | unsigned int phy_rev; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 753 | u16 gigabit; |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 754 | int intr_test; |
Ayaz Abdulla | c5cf910 | 2006-10-30 17:32:01 -0500 | [diff] [blame] | 755 | int recover_error; |
Ayaz Abdulla | 4145ade | 2009-03-05 08:02:26 +0000 | [diff] [blame] | 756 | int quiet_count; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 757 | |
| 758 | /* General data: RO fields */ |
| 759 | dma_addr_t ring_addr; |
| 760 | struct pci_dev *pci_dev; |
| 761 | u32 orig_mac[2]; |
Ayaz Abdulla | 582806b | 2009-03-05 08:02:03 +0000 | [diff] [blame] | 762 | u32 events; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 763 | u32 irqmask; |
| 764 | u32 desc_ver; |
Manfred Spraul | 8a4ae7f | 2005-09-21 23:22:10 -0400 | [diff] [blame] | 765 | u32 txrxctl_bits; |
Ayaz Abdulla | ee407b0 | 2006-02-04 13:13:17 -0500 | [diff] [blame] | 766 | u32 vlanctl_bits; |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 767 | u32 driver_data; |
Ayaz Abdulla | 9f3f791 | 2008-04-23 14:37:30 -0400 | [diff] [blame] | 768 | u32 device_id; |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 769 | u32 register_size; |
Ayaz Abdulla | f2ad2d9 | 2006-08-24 17:35:41 -0400 | [diff] [blame] | 770 | int rx_csum; |
Ayaz Abdulla | 7e680c2 | 2006-10-30 17:31:51 -0500 | [diff] [blame] | 771 | u32 mac_in_use; |
Ayaz Abdulla | cac1c52 | 2009-02-07 00:23:57 -0800 | [diff] [blame] | 772 | int mgmt_version; |
| 773 | int mgmt_sema; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 774 | |
| 775 | void __iomem *base; |
| 776 | |
| 777 | /* rx specific fields. |
| 778 | * Locking: Within irq hander or disable_irq+spin_lock(&np->lock); |
| 779 | */ |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 780 | union ring_type get_rx, put_rx, first_rx, last_rx; |
| 781 | struct nv_skb_map *get_rx_ctx, *put_rx_ctx; |
| 782 | struct nv_skb_map *first_rx_ctx, *last_rx_ctx; |
| 783 | struct nv_skb_map *rx_skb; |
| 784 | |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 785 | union ring_type rx_ring; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 786 | unsigned int rx_buf_sz; |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 787 | unsigned int pkt_limit; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 788 | struct timer_list oom_kick; |
| 789 | struct timer_list nic_poll; |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 790 | struct timer_list stats_poll; |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 791 | u32 nic_poll_irq; |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 792 | int rx_ring_size; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 793 | |
| 794 | /* media detection workaround. |
| 795 | * Locking: Within irq hander or disable_irq+spin_lock(&np->lock); |
| 796 | */ |
| 797 | int need_linktimer; |
| 798 | unsigned long link_timeout; |
| 799 | /* |
| 800 | * tx specific fields. |
| 801 | */ |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 802 | union ring_type get_tx, put_tx, first_tx, last_tx; |
| 803 | struct nv_skb_map *get_tx_ctx, *put_tx_ctx; |
| 804 | struct nv_skb_map *first_tx_ctx, *last_tx_ctx; |
| 805 | struct nv_skb_map *tx_skb; |
| 806 | |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 807 | union ring_type tx_ring; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 808 | u32 tx_flags; |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 809 | int tx_ring_size; |
Ayaz Abdulla | 3b446c3 | 2008-03-10 14:58:21 -0500 | [diff] [blame] | 810 | int tx_limit; |
| 811 | u32 tx_pkts_in_progress; |
| 812 | struct nv_skb_map *tx_change_owner; |
| 813 | struct nv_skb_map *tx_end_flip; |
Ayaz Abdulla | aaa37d2 | 2007-01-21 18:10:42 -0500 | [diff] [blame] | 814 | int tx_stop; |
Ayaz Abdulla | ee407b0 | 2006-02-04 13:13:17 -0500 | [diff] [blame] | 815 | |
| 816 | /* vlan fields */ |
| 817 | struct vlan_group *vlangrp; |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 818 | |
| 819 | /* msi/msi-x fields */ |
| 820 | u32 msi_flags; |
| 821 | struct msix_entry msi_x_entry[NV_MSI_X_MAX_VECTORS]; |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 822 | |
| 823 | /* flow control */ |
| 824 | u32 pause_flags; |
Tobias Diedrich | 1a1ca86 | 2008-05-18 15:03:44 +0200 | [diff] [blame] | 825 | |
| 826 | /* power saved state */ |
| 827 | u32 saved_config_space[NV_PCI_REGSZ_MAX/4]; |
Yinghai Lu | ddb213f | 2009-02-06 01:29:23 -0800 | [diff] [blame] | 828 | |
| 829 | /* for different msi-x irq type */ |
| 830 | char name_rx[IFNAMSIZ + 3]; /* -rx */ |
| 831 | char name_tx[IFNAMSIZ + 3]; /* -tx */ |
| 832 | char name_other[IFNAMSIZ + 6]; /* -other */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 833 | }; |
| 834 | |
| 835 | /* |
| 836 | * Maximum number of loops until we assume that a bit in the irq mask |
| 837 | * is stuck. Overridable with module param. |
| 838 | */ |
Ayaz Abdulla | 4145ade | 2009-03-05 08:02:26 +0000 | [diff] [blame] | 839 | static int max_interrupt_work = 4; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 840 | |
Ayaz Abdulla | a971c32 | 2005-11-11 08:30:38 -0500 | [diff] [blame] | 841 | /* |
| 842 | * Optimization can be either throuput mode or cpu mode |
Jeff Garzik | f3b197a | 2006-05-26 21:39:03 -0400 | [diff] [blame] | 843 | * |
Ayaz Abdulla | a971c32 | 2005-11-11 08:30:38 -0500 | [diff] [blame] | 844 | * Throughput Mode: Every tx and rx packet will generate an interrupt. |
| 845 | * CPU Mode: Interrupts are controlled by a timer. |
| 846 | */ |
Ayaz Abdulla | 69fe3fd | 2006-06-10 22:48:18 -0400 | [diff] [blame] | 847 | enum { |
| 848 | NV_OPTIMIZATION_MODE_THROUGHPUT, |
Ayaz Abdulla | 9e18476 | 2009-03-05 08:02:18 +0000 | [diff] [blame] | 849 | NV_OPTIMIZATION_MODE_CPU, |
| 850 | NV_OPTIMIZATION_MODE_DYNAMIC |
Ayaz Abdulla | 69fe3fd | 2006-06-10 22:48:18 -0400 | [diff] [blame] | 851 | }; |
Ayaz Abdulla | 9e18476 | 2009-03-05 08:02:18 +0000 | [diff] [blame] | 852 | static int optimization_mode = NV_OPTIMIZATION_MODE_DYNAMIC; |
Ayaz Abdulla | a971c32 | 2005-11-11 08:30:38 -0500 | [diff] [blame] | 853 | |
| 854 | /* |
| 855 | * Poll interval for timer irq |
| 856 | * |
| 857 | * This interval determines how frequent an interrupt is generated. |
| 858 | * The is value is determined by [(time_in_micro_secs * 100) / (2^10)] |
| 859 | * Min = 0, and Max = 65535 |
| 860 | */ |
| 861 | static int poll_interval = -1; |
| 862 | |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 863 | /* |
Ayaz Abdulla | 69fe3fd | 2006-06-10 22:48:18 -0400 | [diff] [blame] | 864 | * MSI interrupts |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 865 | */ |
Ayaz Abdulla | 69fe3fd | 2006-06-10 22:48:18 -0400 | [diff] [blame] | 866 | enum { |
| 867 | NV_MSI_INT_DISABLED, |
| 868 | NV_MSI_INT_ENABLED |
| 869 | }; |
| 870 | static int msi = NV_MSI_INT_ENABLED; |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 871 | |
| 872 | /* |
Ayaz Abdulla | 69fe3fd | 2006-06-10 22:48:18 -0400 | [diff] [blame] | 873 | * MSIX interrupts |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 874 | */ |
Ayaz Abdulla | 69fe3fd | 2006-06-10 22:48:18 -0400 | [diff] [blame] | 875 | enum { |
| 876 | NV_MSIX_INT_DISABLED, |
| 877 | NV_MSIX_INT_ENABLED |
| 878 | }; |
Yinghai Lu | 3948279 | 2009-02-06 01:31:12 -0800 | [diff] [blame] | 879 | static int msix = NV_MSIX_INT_ENABLED; |
Ayaz Abdulla | 69fe3fd | 2006-06-10 22:48:18 -0400 | [diff] [blame] | 880 | |
| 881 | /* |
| 882 | * DMA 64bit |
| 883 | */ |
| 884 | enum { |
| 885 | NV_DMA_64BIT_DISABLED, |
| 886 | NV_DMA_64BIT_ENABLED |
| 887 | }; |
| 888 | static int dma_64bit = NV_DMA_64BIT_ENABLED; |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 889 | |
Ayaz Abdulla | 9f3f791 | 2008-04-23 14:37:30 -0400 | [diff] [blame] | 890 | /* |
| 891 | * Crossover Detection |
| 892 | * Realtek 8201 phy + some OEM boards do not work properly. |
| 893 | */ |
| 894 | enum { |
| 895 | NV_CROSSOVER_DETECTION_DISABLED, |
| 896 | NV_CROSSOVER_DETECTION_ENABLED |
| 897 | }; |
| 898 | static int phy_cross = NV_CROSSOVER_DETECTION_DISABLED; |
| 899 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 900 | static inline struct fe_priv *get_nvpriv(struct net_device *dev) |
| 901 | { |
| 902 | return netdev_priv(dev); |
| 903 | } |
| 904 | |
| 905 | static inline u8 __iomem *get_hwbase(struct net_device *dev) |
| 906 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 907 | return ((struct fe_priv *)netdev_priv(dev))->base; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 908 | } |
| 909 | |
| 910 | static inline void pci_push(u8 __iomem *base) |
| 911 | { |
| 912 | /* force out pending posted writes */ |
| 913 | readl(base); |
| 914 | } |
| 915 | |
| 916 | static inline u32 nv_descr_getlength(struct ring_desc *prd, u32 v) |
| 917 | { |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 918 | return le32_to_cpu(prd->flaglen) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 919 | & ((v == DESC_VER_1) ? LEN_MASK_V1 : LEN_MASK_V2); |
| 920 | } |
| 921 | |
Manfred Spraul | ee73362 | 2005-07-31 18:32:26 +0200 | [diff] [blame] | 922 | static inline u32 nv_descr_getlength_ex(struct ring_desc_ex *prd, u32 v) |
| 923 | { |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 924 | return le32_to_cpu(prd->flaglen) & LEN_MASK_V2; |
Manfred Spraul | ee73362 | 2005-07-31 18:32:26 +0200 | [diff] [blame] | 925 | } |
| 926 | |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 927 | static bool nv_optimized(struct fe_priv *np) |
| 928 | { |
| 929 | if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) |
| 930 | return false; |
| 931 | return true; |
| 932 | } |
| 933 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 934 | static int reg_delay(struct net_device *dev, int offset, u32 mask, u32 target, |
| 935 | int delay, int delaymax, const char *msg) |
| 936 | { |
| 937 | u8 __iomem *base = get_hwbase(dev); |
| 938 | |
| 939 | pci_push(base); |
| 940 | do { |
| 941 | udelay(delay); |
| 942 | delaymax -= delay; |
| 943 | if (delaymax < 0) { |
| 944 | if (msg) |
Stephen Hemminger | 6a64cd6 | 2009-02-26 10:19:35 +0000 | [diff] [blame] | 945 | printk("%s", msg); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 946 | return 1; |
| 947 | } |
| 948 | } while ((readl(base + offset) & mask) != target); |
| 949 | return 0; |
| 950 | } |
| 951 | |
Ayaz Abdulla | 0832b25 | 2006-02-04 13:13:26 -0500 | [diff] [blame] | 952 | #define NV_SETUP_RX_RING 0x01 |
| 953 | #define NV_SETUP_TX_RING 0x02 |
| 954 | |
Al Viro | 5bb7ea2 | 2007-12-09 16:06:41 +0000 | [diff] [blame] | 955 | static inline u32 dma_low(dma_addr_t addr) |
| 956 | { |
| 957 | return addr; |
| 958 | } |
| 959 | |
| 960 | static inline u32 dma_high(dma_addr_t addr) |
| 961 | { |
| 962 | return addr>>31>>1; /* 0 if 32bit, shift down by 32 if 64bit */ |
| 963 | } |
| 964 | |
Ayaz Abdulla | 0832b25 | 2006-02-04 13:13:26 -0500 | [diff] [blame] | 965 | static void setup_hw_rings(struct net_device *dev, int rxtx_flags) |
| 966 | { |
| 967 | struct fe_priv *np = get_nvpriv(dev); |
| 968 | u8 __iomem *base = get_hwbase(dev); |
| 969 | |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 970 | if (!nv_optimized(np)) { |
Ayaz Abdulla | 0832b25 | 2006-02-04 13:13:26 -0500 | [diff] [blame] | 971 | if (rxtx_flags & NV_SETUP_RX_RING) { |
Al Viro | 5bb7ea2 | 2007-12-09 16:06:41 +0000 | [diff] [blame] | 972 | writel(dma_low(np->ring_addr), base + NvRegRxRingPhysAddr); |
Ayaz Abdulla | 0832b25 | 2006-02-04 13:13:26 -0500 | [diff] [blame] | 973 | } |
| 974 | if (rxtx_flags & NV_SETUP_TX_RING) { |
Al Viro | 5bb7ea2 | 2007-12-09 16:06:41 +0000 | [diff] [blame] | 975 | writel(dma_low(np->ring_addr + np->rx_ring_size*sizeof(struct ring_desc)), base + NvRegTxRingPhysAddr); |
Ayaz Abdulla | 0832b25 | 2006-02-04 13:13:26 -0500 | [diff] [blame] | 976 | } |
| 977 | } else { |
| 978 | if (rxtx_flags & NV_SETUP_RX_RING) { |
Al Viro | 5bb7ea2 | 2007-12-09 16:06:41 +0000 | [diff] [blame] | 979 | writel(dma_low(np->ring_addr), base + NvRegRxRingPhysAddr); |
| 980 | writel(dma_high(np->ring_addr), base + NvRegRxRingPhysAddrHigh); |
Ayaz Abdulla | 0832b25 | 2006-02-04 13:13:26 -0500 | [diff] [blame] | 981 | } |
| 982 | if (rxtx_flags & NV_SETUP_TX_RING) { |
Al Viro | 5bb7ea2 | 2007-12-09 16:06:41 +0000 | [diff] [blame] | 983 | writel(dma_low(np->ring_addr + np->rx_ring_size*sizeof(struct ring_desc_ex)), base + NvRegTxRingPhysAddr); |
| 984 | writel(dma_high(np->ring_addr + np->rx_ring_size*sizeof(struct ring_desc_ex)), base + NvRegTxRingPhysAddrHigh); |
Ayaz Abdulla | 0832b25 | 2006-02-04 13:13:26 -0500 | [diff] [blame] | 985 | } |
| 986 | } |
| 987 | } |
| 988 | |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 989 | static void free_rings(struct net_device *dev) |
| 990 | { |
| 991 | struct fe_priv *np = get_nvpriv(dev); |
| 992 | |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 993 | if (!nv_optimized(np)) { |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 994 | if (np->rx_ring.orig) |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 995 | pci_free_consistent(np->pci_dev, sizeof(struct ring_desc) * (np->rx_ring_size + np->tx_ring_size), |
| 996 | np->rx_ring.orig, np->ring_addr); |
| 997 | } else { |
| 998 | if (np->rx_ring.ex) |
| 999 | pci_free_consistent(np->pci_dev, sizeof(struct ring_desc_ex) * (np->rx_ring_size + np->tx_ring_size), |
| 1000 | np->rx_ring.ex, np->ring_addr); |
| 1001 | } |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1002 | if (np->rx_skb) |
| 1003 | kfree(np->rx_skb); |
| 1004 | if (np->tx_skb) |
| 1005 | kfree(np->tx_skb); |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 1006 | } |
| 1007 | |
Ayaz Abdulla | 84b3932 | 2006-05-20 14:59:48 -0700 | [diff] [blame] | 1008 | static int using_multi_irqs(struct net_device *dev) |
| 1009 | { |
| 1010 | struct fe_priv *np = get_nvpriv(dev); |
| 1011 | |
| 1012 | if (!(np->msi_flags & NV_MSI_X_ENABLED) || |
| 1013 | ((np->msi_flags & NV_MSI_X_ENABLED) && |
| 1014 | ((np->msi_flags & NV_MSI_X_VECTORS_MASK) == 0x1))) |
| 1015 | return 0; |
| 1016 | else |
| 1017 | return 1; |
| 1018 | } |
| 1019 | |
| 1020 | static void nv_enable_irq(struct net_device *dev) |
| 1021 | { |
| 1022 | struct fe_priv *np = get_nvpriv(dev); |
| 1023 | |
| 1024 | if (!using_multi_irqs(dev)) { |
| 1025 | if (np->msi_flags & NV_MSI_X_ENABLED) |
| 1026 | enable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_ALL].vector); |
| 1027 | else |
Manfred Spraul | a747590 | 2007-10-17 21:52:33 +0200 | [diff] [blame] | 1028 | enable_irq(np->pci_dev->irq); |
Ayaz Abdulla | 84b3932 | 2006-05-20 14:59:48 -0700 | [diff] [blame] | 1029 | } else { |
| 1030 | enable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector); |
| 1031 | enable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_TX].vector); |
| 1032 | enable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_OTHER].vector); |
| 1033 | } |
| 1034 | } |
| 1035 | |
| 1036 | static void nv_disable_irq(struct net_device *dev) |
| 1037 | { |
| 1038 | struct fe_priv *np = get_nvpriv(dev); |
| 1039 | |
| 1040 | if (!using_multi_irqs(dev)) { |
| 1041 | if (np->msi_flags & NV_MSI_X_ENABLED) |
| 1042 | disable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_ALL].vector); |
| 1043 | else |
Manfred Spraul | a747590 | 2007-10-17 21:52:33 +0200 | [diff] [blame] | 1044 | disable_irq(np->pci_dev->irq); |
Ayaz Abdulla | 84b3932 | 2006-05-20 14:59:48 -0700 | [diff] [blame] | 1045 | } else { |
| 1046 | disable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector); |
| 1047 | disable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_TX].vector); |
| 1048 | disable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_OTHER].vector); |
| 1049 | } |
| 1050 | } |
| 1051 | |
| 1052 | /* In MSIX mode, a write to irqmask behaves as XOR */ |
| 1053 | static void nv_enable_hw_interrupts(struct net_device *dev, u32 mask) |
| 1054 | { |
| 1055 | u8 __iomem *base = get_hwbase(dev); |
| 1056 | |
| 1057 | writel(mask, base + NvRegIrqMask); |
| 1058 | } |
| 1059 | |
| 1060 | static void nv_disable_hw_interrupts(struct net_device *dev, u32 mask) |
| 1061 | { |
| 1062 | struct fe_priv *np = get_nvpriv(dev); |
| 1063 | u8 __iomem *base = get_hwbase(dev); |
| 1064 | |
| 1065 | if (np->msi_flags & NV_MSI_X_ENABLED) { |
| 1066 | writel(mask, base + NvRegIrqMask); |
| 1067 | } else { |
| 1068 | if (np->msi_flags & NV_MSI_ENABLED) |
| 1069 | writel(0, base + NvRegMSIIrqMask); |
| 1070 | writel(0, base + NvRegIrqMask); |
| 1071 | } |
| 1072 | } |
| 1073 | |
Ayaz Abdulla | 08d9357 | 2009-03-05 08:01:55 +0000 | [diff] [blame] | 1074 | static void nv_napi_enable(struct net_device *dev) |
| 1075 | { |
| 1076 | #ifdef CONFIG_FORCEDETH_NAPI |
| 1077 | struct fe_priv *np = get_nvpriv(dev); |
| 1078 | |
| 1079 | napi_enable(&np->napi); |
| 1080 | #endif |
| 1081 | } |
| 1082 | |
| 1083 | static void nv_napi_disable(struct net_device *dev) |
| 1084 | { |
| 1085 | #ifdef CONFIG_FORCEDETH_NAPI |
| 1086 | struct fe_priv *np = get_nvpriv(dev); |
| 1087 | |
| 1088 | napi_disable(&np->napi); |
| 1089 | #endif |
| 1090 | } |
| 1091 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1092 | #define MII_READ (-1) |
| 1093 | /* mii_rw: read/write a register on the PHY. |
| 1094 | * |
| 1095 | * Caller must guarantee serialization |
| 1096 | */ |
| 1097 | static int mii_rw(struct net_device *dev, int addr, int miireg, int value) |
| 1098 | { |
| 1099 | u8 __iomem *base = get_hwbase(dev); |
| 1100 | u32 reg; |
| 1101 | int retval; |
| 1102 | |
Ayaz Abdulla | eb79842 | 2008-02-04 15:14:04 -0500 | [diff] [blame] | 1103 | writel(NVREG_MIISTAT_MASK_RW, base + NvRegMIIStatus); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1104 | |
| 1105 | reg = readl(base + NvRegMIIControl); |
| 1106 | if (reg & NVREG_MIICTL_INUSE) { |
| 1107 | writel(NVREG_MIICTL_INUSE, base + NvRegMIIControl); |
| 1108 | udelay(NV_MIIBUSY_DELAY); |
| 1109 | } |
| 1110 | |
| 1111 | reg = (addr << NVREG_MIICTL_ADDRSHIFT) | miireg; |
| 1112 | if (value != MII_READ) { |
| 1113 | writel(value, base + NvRegMIIData); |
| 1114 | reg |= NVREG_MIICTL_WRITE; |
| 1115 | } |
| 1116 | writel(reg, base + NvRegMIIControl); |
| 1117 | |
| 1118 | if (reg_delay(dev, NvRegMIIControl, NVREG_MIICTL_INUSE, 0, |
| 1119 | NV_MIIPHY_DELAY, NV_MIIPHY_DELAYMAX, NULL)) { |
| 1120 | dprintk(KERN_DEBUG "%s: mii_rw of reg %d at PHY %d timed out.\n", |
| 1121 | dev->name, miireg, addr); |
| 1122 | retval = -1; |
| 1123 | } else if (value != MII_READ) { |
| 1124 | /* it was a write operation - fewer failures are detectable */ |
| 1125 | dprintk(KERN_DEBUG "%s: mii_rw wrote 0x%x to reg %d at PHY %d\n", |
| 1126 | dev->name, value, miireg, addr); |
| 1127 | retval = 0; |
| 1128 | } else if (readl(base + NvRegMIIStatus) & NVREG_MIISTAT_ERROR) { |
| 1129 | dprintk(KERN_DEBUG "%s: mii_rw of reg %d at PHY %d failed.\n", |
| 1130 | dev->name, miireg, addr); |
| 1131 | retval = -1; |
| 1132 | } else { |
| 1133 | retval = readl(base + NvRegMIIData); |
| 1134 | dprintk(KERN_DEBUG "%s: mii_rw read from reg %d at PHY %d: 0x%x.\n", |
| 1135 | dev->name, miireg, addr, retval); |
| 1136 | } |
| 1137 | |
| 1138 | return retval; |
| 1139 | } |
| 1140 | |
Ayaz Abdulla | edf7e5e | 2006-08-24 15:43:42 -0400 | [diff] [blame] | 1141 | static int phy_reset(struct net_device *dev, u32 bmcr_setup) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1142 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 1143 | struct fe_priv *np = netdev_priv(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1144 | u32 miicontrol; |
| 1145 | unsigned int tries = 0; |
| 1146 | |
Ayaz Abdulla | edf7e5e | 2006-08-24 15:43:42 -0400 | [diff] [blame] | 1147 | miicontrol = BMCR_RESET | bmcr_setup; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1148 | if (mii_rw(dev, np->phyaddr, MII_BMCR, miicontrol)) { |
| 1149 | return -1; |
| 1150 | } |
| 1151 | |
| 1152 | /* wait for 500ms */ |
| 1153 | msleep(500); |
| 1154 | |
| 1155 | /* must wait till reset is deasserted */ |
| 1156 | while (miicontrol & BMCR_RESET) { |
| 1157 | msleep(10); |
| 1158 | miicontrol = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ); |
| 1159 | /* FIXME: 100 tries seem excessive */ |
| 1160 | if (tries++ > 100) |
| 1161 | return -1; |
| 1162 | } |
| 1163 | return 0; |
| 1164 | } |
| 1165 | |
| 1166 | static int phy_init(struct net_device *dev) |
| 1167 | { |
| 1168 | struct fe_priv *np = get_nvpriv(dev); |
| 1169 | u8 __iomem *base = get_hwbase(dev); |
| 1170 | u32 phyinterface, phy_reserved, mii_status, mii_control, mii_control_1000,reg; |
| 1171 | |
Ayaz Abdulla | edf7e5e | 2006-08-24 15:43:42 -0400 | [diff] [blame] | 1172 | /* phy errata for E3016 phy */ |
| 1173 | if (np->phy_model == PHY_MODEL_MARVELL_E3016) { |
| 1174 | reg = mii_rw(dev, np->phyaddr, MII_NCONFIG, MII_READ); |
| 1175 | reg &= ~PHY_MARVELL_E3016_INITMASK; |
| 1176 | if (mii_rw(dev, np->phyaddr, MII_NCONFIG, reg)) { |
| 1177 | printk(KERN_INFO "%s: phy write to errata reg failed.\n", pci_name(np->pci_dev)); |
| 1178 | return PHY_ERROR; |
| 1179 | } |
| 1180 | } |
Ayaz Abdulla | c5e3ae8 | 2007-07-15 06:51:03 -0400 | [diff] [blame] | 1181 | if (np->phy_oui == PHY_OUI_REALTEK) { |
Ayaz Abdulla | 9f3f791 | 2008-04-23 14:37:30 -0400 | [diff] [blame] | 1182 | if (np->phy_model == PHY_MODEL_REALTEK_8211 && |
| 1183 | np->phy_rev == PHY_REV_REALTEK_8211B) { |
| 1184 | if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT1)) { |
| 1185 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1186 | return PHY_ERROR; |
| 1187 | } |
| 1188 | if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG2, PHY_REALTEK_INIT2)) { |
| 1189 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1190 | return PHY_ERROR; |
| 1191 | } |
| 1192 | if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT3)) { |
| 1193 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1194 | return PHY_ERROR; |
| 1195 | } |
| 1196 | if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG3, PHY_REALTEK_INIT4)) { |
| 1197 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1198 | return PHY_ERROR; |
| 1199 | } |
| 1200 | if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG4, PHY_REALTEK_INIT5)) { |
| 1201 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1202 | return PHY_ERROR; |
| 1203 | } |
| 1204 | if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG5, PHY_REALTEK_INIT6)) { |
| 1205 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1206 | return PHY_ERROR; |
| 1207 | } |
| 1208 | if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT1)) { |
| 1209 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1210 | return PHY_ERROR; |
| 1211 | } |
Ayaz Abdulla | c5e3ae8 | 2007-07-15 06:51:03 -0400 | [diff] [blame] | 1212 | } |
Ayaz Abdulla | 22ae03a | 2008-07-25 15:31:29 -0400 | [diff] [blame] | 1213 | if (np->phy_model == PHY_MODEL_REALTEK_8211 && |
| 1214 | np->phy_rev == PHY_REV_REALTEK_8211C) { |
| 1215 | u32 powerstate = readl(base + NvRegPowerState2); |
| 1216 | |
| 1217 | /* need to perform hw phy reset */ |
| 1218 | powerstate |= NVREG_POWERSTATE2_PHY_RESET; |
| 1219 | writel(powerstate, base + NvRegPowerState2); |
| 1220 | msleep(25); |
| 1221 | |
| 1222 | powerstate &= ~NVREG_POWERSTATE2_PHY_RESET; |
| 1223 | writel(powerstate, base + NvRegPowerState2); |
| 1224 | msleep(25); |
| 1225 | |
| 1226 | reg = mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG6, MII_READ); |
| 1227 | reg |= PHY_REALTEK_INIT9; |
| 1228 | if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG6, reg)) { |
| 1229 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1230 | return PHY_ERROR; |
| 1231 | } |
| 1232 | if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT10)) { |
| 1233 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1234 | return PHY_ERROR; |
| 1235 | } |
| 1236 | reg = mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG7, MII_READ); |
| 1237 | if (!(reg & PHY_REALTEK_INIT11)) { |
| 1238 | reg |= PHY_REALTEK_INIT11; |
| 1239 | if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG7, reg)) { |
| 1240 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1241 | return PHY_ERROR; |
| 1242 | } |
| 1243 | } |
| 1244 | if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT1)) { |
| 1245 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1246 | return PHY_ERROR; |
| 1247 | } |
| 1248 | } |
Ayaz Abdulla | 9f3f791 | 2008-04-23 14:37:30 -0400 | [diff] [blame] | 1249 | if (np->phy_model == PHY_MODEL_REALTEK_8201) { |
| 1250 | if (np->device_id == PCI_DEVICE_ID_NVIDIA_NVENET_32 || |
| 1251 | np->device_id == PCI_DEVICE_ID_NVIDIA_NVENET_33 || |
| 1252 | np->device_id == PCI_DEVICE_ID_NVIDIA_NVENET_34 || |
| 1253 | np->device_id == PCI_DEVICE_ID_NVIDIA_NVENET_35 || |
| 1254 | np->device_id == PCI_DEVICE_ID_NVIDIA_NVENET_36 || |
| 1255 | np->device_id == PCI_DEVICE_ID_NVIDIA_NVENET_37 || |
| 1256 | np->device_id == PCI_DEVICE_ID_NVIDIA_NVENET_38 || |
| 1257 | np->device_id == PCI_DEVICE_ID_NVIDIA_NVENET_39) { |
| 1258 | phy_reserved = mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG6, MII_READ); |
| 1259 | phy_reserved |= PHY_REALTEK_INIT7; |
| 1260 | if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG6, phy_reserved)) { |
| 1261 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1262 | return PHY_ERROR; |
| 1263 | } |
| 1264 | } |
Ayaz Abdulla | c5e3ae8 | 2007-07-15 06:51:03 -0400 | [diff] [blame] | 1265 | } |
| 1266 | } |
Ayaz Abdulla | edf7e5e | 2006-08-24 15:43:42 -0400 | [diff] [blame] | 1267 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1268 | /* set advertise register */ |
| 1269 | reg = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ); |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 1270 | reg |= (ADVERTISE_10HALF|ADVERTISE_10FULL|ADVERTISE_100HALF|ADVERTISE_100FULL|ADVERTISE_PAUSE_ASYM|ADVERTISE_PAUSE_CAP); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1271 | if (mii_rw(dev, np->phyaddr, MII_ADVERTISE, reg)) { |
| 1272 | printk(KERN_INFO "%s: phy write to advertise failed.\n", pci_name(np->pci_dev)); |
| 1273 | return PHY_ERROR; |
| 1274 | } |
| 1275 | |
| 1276 | /* get phy interface type */ |
| 1277 | phyinterface = readl(base + NvRegPhyInterface); |
| 1278 | |
| 1279 | /* see if gigabit phy */ |
| 1280 | mii_status = mii_rw(dev, np->phyaddr, MII_BMSR, MII_READ); |
| 1281 | if (mii_status & PHY_GIGABIT) { |
| 1282 | np->gigabit = PHY_GIGABIT; |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 1283 | mii_control_1000 = mii_rw(dev, np->phyaddr, MII_CTRL1000, MII_READ); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1284 | mii_control_1000 &= ~ADVERTISE_1000HALF; |
| 1285 | if (phyinterface & PHY_RGMII) |
| 1286 | mii_control_1000 |= ADVERTISE_1000FULL; |
| 1287 | else |
| 1288 | mii_control_1000 &= ~ADVERTISE_1000FULL; |
| 1289 | |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 1290 | if (mii_rw(dev, np->phyaddr, MII_CTRL1000, mii_control_1000)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1291 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1292 | return PHY_ERROR; |
| 1293 | } |
| 1294 | } |
| 1295 | else |
| 1296 | np->gigabit = 0; |
| 1297 | |
Ayaz Abdulla | edf7e5e | 2006-08-24 15:43:42 -0400 | [diff] [blame] | 1298 | mii_control = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ); |
| 1299 | mii_control |= BMCR_ANENABLE; |
| 1300 | |
Ayaz Abdulla | 22ae03a | 2008-07-25 15:31:29 -0400 | [diff] [blame] | 1301 | if (np->phy_oui == PHY_OUI_REALTEK && |
| 1302 | np->phy_model == PHY_MODEL_REALTEK_8211 && |
| 1303 | np->phy_rev == PHY_REV_REALTEK_8211C) { |
| 1304 | /* start autoneg since we already performed hw reset above */ |
| 1305 | mii_control |= BMCR_ANRESTART; |
| 1306 | if (mii_rw(dev, np->phyaddr, MII_BMCR, mii_control)) { |
| 1307 | printk(KERN_INFO "%s: phy init failed\n", pci_name(np->pci_dev)); |
| 1308 | return PHY_ERROR; |
| 1309 | } |
| 1310 | } else { |
| 1311 | /* reset the phy |
| 1312 | * (certain phys need bmcr to be setup with reset) |
| 1313 | */ |
| 1314 | if (phy_reset(dev, mii_control)) { |
| 1315 | printk(KERN_INFO "%s: phy reset failed\n", pci_name(np->pci_dev)); |
| 1316 | return PHY_ERROR; |
| 1317 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1318 | } |
| 1319 | |
| 1320 | /* phy vendor specific configuration */ |
| 1321 | if ((np->phy_oui == PHY_OUI_CICADA) && (phyinterface & PHY_RGMII) ) { |
| 1322 | phy_reserved = mii_rw(dev, np->phyaddr, MII_RESV1, MII_READ); |
Ayaz Abdulla | 14a67f3 | 2007-07-15 06:50:28 -0400 | [diff] [blame] | 1323 | phy_reserved &= ~(PHY_CICADA_INIT1 | PHY_CICADA_INIT2); |
| 1324 | phy_reserved |= (PHY_CICADA_INIT3 | PHY_CICADA_INIT4); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1325 | if (mii_rw(dev, np->phyaddr, MII_RESV1, phy_reserved)) { |
| 1326 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1327 | return PHY_ERROR; |
| 1328 | } |
| 1329 | phy_reserved = mii_rw(dev, np->phyaddr, MII_NCONFIG, MII_READ); |
Ayaz Abdulla | 14a67f3 | 2007-07-15 06:50:28 -0400 | [diff] [blame] | 1330 | phy_reserved |= PHY_CICADA_INIT5; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1331 | if (mii_rw(dev, np->phyaddr, MII_NCONFIG, phy_reserved)) { |
| 1332 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1333 | return PHY_ERROR; |
| 1334 | } |
| 1335 | } |
| 1336 | if (np->phy_oui == PHY_OUI_CICADA) { |
| 1337 | phy_reserved = mii_rw(dev, np->phyaddr, MII_SREVISION, MII_READ); |
Ayaz Abdulla | 14a67f3 | 2007-07-15 06:50:28 -0400 | [diff] [blame] | 1338 | phy_reserved |= PHY_CICADA_INIT6; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1339 | if (mii_rw(dev, np->phyaddr, MII_SREVISION, phy_reserved)) { |
| 1340 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1341 | return PHY_ERROR; |
| 1342 | } |
| 1343 | } |
Ayaz Abdulla | d215d8a | 2007-07-15 06:50:53 -0400 | [diff] [blame] | 1344 | if (np->phy_oui == PHY_OUI_VITESSE) { |
| 1345 | if (mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG1, PHY_VITESSE_INIT1)) { |
| 1346 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1347 | return PHY_ERROR; |
| 1348 | } |
| 1349 | if (mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG2, PHY_VITESSE_INIT2)) { |
| 1350 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1351 | return PHY_ERROR; |
| 1352 | } |
| 1353 | phy_reserved = mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG4, MII_READ); |
| 1354 | if (mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG4, phy_reserved)) { |
| 1355 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1356 | return PHY_ERROR; |
| 1357 | } |
| 1358 | phy_reserved = mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG3, MII_READ); |
| 1359 | phy_reserved &= ~PHY_VITESSE_INIT_MSK1; |
| 1360 | phy_reserved |= PHY_VITESSE_INIT3; |
| 1361 | if (mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG3, phy_reserved)) { |
| 1362 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1363 | return PHY_ERROR; |
| 1364 | } |
| 1365 | if (mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG2, PHY_VITESSE_INIT4)) { |
| 1366 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1367 | return PHY_ERROR; |
| 1368 | } |
| 1369 | if (mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG2, PHY_VITESSE_INIT5)) { |
| 1370 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1371 | return PHY_ERROR; |
| 1372 | } |
| 1373 | phy_reserved = mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG4, MII_READ); |
| 1374 | phy_reserved &= ~PHY_VITESSE_INIT_MSK1; |
| 1375 | phy_reserved |= PHY_VITESSE_INIT3; |
| 1376 | if (mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG4, phy_reserved)) { |
| 1377 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1378 | return PHY_ERROR; |
| 1379 | } |
| 1380 | phy_reserved = mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG3, MII_READ); |
| 1381 | if (mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG3, phy_reserved)) { |
| 1382 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1383 | return PHY_ERROR; |
| 1384 | } |
| 1385 | if (mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG2, PHY_VITESSE_INIT6)) { |
| 1386 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1387 | return PHY_ERROR; |
| 1388 | } |
| 1389 | if (mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG2, PHY_VITESSE_INIT7)) { |
| 1390 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1391 | return PHY_ERROR; |
| 1392 | } |
| 1393 | phy_reserved = mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG4, MII_READ); |
| 1394 | if (mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG4, phy_reserved)) { |
| 1395 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1396 | return PHY_ERROR; |
| 1397 | } |
| 1398 | phy_reserved = mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG3, MII_READ); |
| 1399 | phy_reserved &= ~PHY_VITESSE_INIT_MSK2; |
| 1400 | phy_reserved |= PHY_VITESSE_INIT8; |
| 1401 | if (mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG3, phy_reserved)) { |
| 1402 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1403 | return PHY_ERROR; |
| 1404 | } |
| 1405 | if (mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG2, PHY_VITESSE_INIT9)) { |
| 1406 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1407 | return PHY_ERROR; |
| 1408 | } |
| 1409 | if (mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG1, PHY_VITESSE_INIT10)) { |
| 1410 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1411 | return PHY_ERROR; |
| 1412 | } |
| 1413 | } |
Ayaz Abdulla | c5e3ae8 | 2007-07-15 06:51:03 -0400 | [diff] [blame] | 1414 | if (np->phy_oui == PHY_OUI_REALTEK) { |
Ayaz Abdulla | 9f3f791 | 2008-04-23 14:37:30 -0400 | [diff] [blame] | 1415 | if (np->phy_model == PHY_MODEL_REALTEK_8211 && |
| 1416 | np->phy_rev == PHY_REV_REALTEK_8211B) { |
| 1417 | /* reset could have cleared these out, set them back */ |
| 1418 | if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT1)) { |
| 1419 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1420 | return PHY_ERROR; |
| 1421 | } |
| 1422 | if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG2, PHY_REALTEK_INIT2)) { |
| 1423 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1424 | return PHY_ERROR; |
| 1425 | } |
| 1426 | if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT3)) { |
| 1427 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1428 | return PHY_ERROR; |
| 1429 | } |
| 1430 | if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG3, PHY_REALTEK_INIT4)) { |
| 1431 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1432 | return PHY_ERROR; |
| 1433 | } |
| 1434 | if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG4, PHY_REALTEK_INIT5)) { |
| 1435 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1436 | return PHY_ERROR; |
| 1437 | } |
| 1438 | if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG5, PHY_REALTEK_INIT6)) { |
| 1439 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1440 | return PHY_ERROR; |
| 1441 | } |
| 1442 | if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT1)) { |
| 1443 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1444 | return PHY_ERROR; |
| 1445 | } |
Ayaz Abdulla | c5e3ae8 | 2007-07-15 06:51:03 -0400 | [diff] [blame] | 1446 | } |
Ayaz Abdulla | 9f3f791 | 2008-04-23 14:37:30 -0400 | [diff] [blame] | 1447 | if (np->phy_model == PHY_MODEL_REALTEK_8201) { |
| 1448 | if (np->device_id == PCI_DEVICE_ID_NVIDIA_NVENET_32 || |
| 1449 | np->device_id == PCI_DEVICE_ID_NVIDIA_NVENET_33 || |
| 1450 | np->device_id == PCI_DEVICE_ID_NVIDIA_NVENET_34 || |
| 1451 | np->device_id == PCI_DEVICE_ID_NVIDIA_NVENET_35 || |
| 1452 | np->device_id == PCI_DEVICE_ID_NVIDIA_NVENET_36 || |
| 1453 | np->device_id == PCI_DEVICE_ID_NVIDIA_NVENET_37 || |
| 1454 | np->device_id == PCI_DEVICE_ID_NVIDIA_NVENET_38 || |
| 1455 | np->device_id == PCI_DEVICE_ID_NVIDIA_NVENET_39) { |
| 1456 | phy_reserved = mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG6, MII_READ); |
| 1457 | phy_reserved |= PHY_REALTEK_INIT7; |
| 1458 | if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG6, phy_reserved)) { |
| 1459 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1460 | return PHY_ERROR; |
| 1461 | } |
| 1462 | } |
| 1463 | if (phy_cross == NV_CROSSOVER_DETECTION_DISABLED) { |
| 1464 | if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT3)) { |
| 1465 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1466 | return PHY_ERROR; |
| 1467 | } |
| 1468 | phy_reserved = mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG2, MII_READ); |
| 1469 | phy_reserved &= ~PHY_REALTEK_INIT_MSK1; |
| 1470 | phy_reserved |= PHY_REALTEK_INIT3; |
| 1471 | if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG2, phy_reserved)) { |
| 1472 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1473 | return PHY_ERROR; |
| 1474 | } |
| 1475 | if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT1)) { |
| 1476 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1477 | return PHY_ERROR; |
| 1478 | } |
| 1479 | } |
Ayaz Abdulla | c5e3ae8 | 2007-07-15 06:51:03 -0400 | [diff] [blame] | 1480 | } |
| 1481 | } |
| 1482 | |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 1483 | /* some phys clear out pause advertisment on reset, set it back */ |
| 1484 | mii_rw(dev, np->phyaddr, MII_ADVERTISE, reg); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1485 | |
Ed Swierk | cb52deb | 2008-12-01 12:24:43 +0000 | [diff] [blame] | 1486 | /* restart auto negotiation, power down phy */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1487 | mii_control = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ); |
Ed Swierk | cb52deb | 2008-12-01 12:24:43 +0000 | [diff] [blame] | 1488 | mii_control |= (BMCR_ANRESTART | BMCR_ANENABLE | BMCR_PDOWN); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1489 | if (mii_rw(dev, np->phyaddr, MII_BMCR, mii_control)) { |
| 1490 | return PHY_ERROR; |
| 1491 | } |
| 1492 | |
| 1493 | return 0; |
| 1494 | } |
| 1495 | |
| 1496 | static void nv_start_rx(struct net_device *dev) |
| 1497 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 1498 | struct fe_priv *np = netdev_priv(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1499 | u8 __iomem *base = get_hwbase(dev); |
Ayaz Abdulla | f35723e | 2003-02-20 03:03:54 -0500 | [diff] [blame] | 1500 | u32 rx_ctrl = readl(base + NvRegReceiverControl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1501 | |
| 1502 | dprintk(KERN_DEBUG "%s: nv_start_rx\n", dev->name); |
| 1503 | /* Already running? Stop it. */ |
Ayaz Abdulla | f35723e | 2003-02-20 03:03:54 -0500 | [diff] [blame] | 1504 | if ((readl(base + NvRegReceiverControl) & NVREG_RCVCTL_START) && !np->mac_in_use) { |
| 1505 | rx_ctrl &= ~NVREG_RCVCTL_START; |
| 1506 | writel(rx_ctrl, base + NvRegReceiverControl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1507 | pci_push(base); |
| 1508 | } |
| 1509 | writel(np->linkspeed, base + NvRegLinkSpeed); |
| 1510 | pci_push(base); |
Ayaz Abdulla | f35723e | 2003-02-20 03:03:54 -0500 | [diff] [blame] | 1511 | rx_ctrl |= NVREG_RCVCTL_START; |
| 1512 | if (np->mac_in_use) |
| 1513 | rx_ctrl &= ~NVREG_RCVCTL_RX_PATH_EN; |
| 1514 | writel(rx_ctrl, base + NvRegReceiverControl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1515 | dprintk(KERN_DEBUG "%s: nv_start_rx to duplex %d, speed 0x%08x.\n", |
| 1516 | dev->name, np->duplex, np->linkspeed); |
| 1517 | pci_push(base); |
| 1518 | } |
| 1519 | |
| 1520 | static void nv_stop_rx(struct net_device *dev) |
| 1521 | { |
Ayaz Abdulla | f35723e | 2003-02-20 03:03:54 -0500 | [diff] [blame] | 1522 | struct fe_priv *np = netdev_priv(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1523 | u8 __iomem *base = get_hwbase(dev); |
Ayaz Abdulla | f35723e | 2003-02-20 03:03:54 -0500 | [diff] [blame] | 1524 | u32 rx_ctrl = readl(base + NvRegReceiverControl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1525 | |
| 1526 | dprintk(KERN_DEBUG "%s: nv_stop_rx\n", dev->name); |
Ayaz Abdulla | f35723e | 2003-02-20 03:03:54 -0500 | [diff] [blame] | 1527 | if (!np->mac_in_use) |
| 1528 | rx_ctrl &= ~NVREG_RCVCTL_START; |
| 1529 | else |
| 1530 | rx_ctrl |= NVREG_RCVCTL_RX_PATH_EN; |
| 1531 | writel(rx_ctrl, base + NvRegReceiverControl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1532 | reg_delay(dev, NvRegReceiverStatus, NVREG_RCVSTAT_BUSY, 0, |
| 1533 | NV_RXSTOP_DELAY1, NV_RXSTOP_DELAY1MAX, |
| 1534 | KERN_INFO "nv_stop_rx: ReceiverStatus remained busy"); |
| 1535 | |
| 1536 | udelay(NV_RXSTOP_DELAY2); |
Ayaz Abdulla | f35723e | 2003-02-20 03:03:54 -0500 | [diff] [blame] | 1537 | if (!np->mac_in_use) |
| 1538 | writel(0, base + NvRegLinkSpeed); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1539 | } |
| 1540 | |
| 1541 | static void nv_start_tx(struct net_device *dev) |
| 1542 | { |
Ayaz Abdulla | f35723e | 2003-02-20 03:03:54 -0500 | [diff] [blame] | 1543 | struct fe_priv *np = netdev_priv(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1544 | u8 __iomem *base = get_hwbase(dev); |
Ayaz Abdulla | f35723e | 2003-02-20 03:03:54 -0500 | [diff] [blame] | 1545 | u32 tx_ctrl = readl(base + NvRegTransmitterControl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1546 | |
| 1547 | dprintk(KERN_DEBUG "%s: nv_start_tx\n", dev->name); |
Ayaz Abdulla | f35723e | 2003-02-20 03:03:54 -0500 | [diff] [blame] | 1548 | tx_ctrl |= NVREG_XMITCTL_START; |
| 1549 | if (np->mac_in_use) |
| 1550 | tx_ctrl &= ~NVREG_XMITCTL_TX_PATH_EN; |
| 1551 | writel(tx_ctrl, base + NvRegTransmitterControl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1552 | pci_push(base); |
| 1553 | } |
| 1554 | |
| 1555 | static void nv_stop_tx(struct net_device *dev) |
| 1556 | { |
Ayaz Abdulla | f35723e | 2003-02-20 03:03:54 -0500 | [diff] [blame] | 1557 | struct fe_priv *np = netdev_priv(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1558 | u8 __iomem *base = get_hwbase(dev); |
Ayaz Abdulla | f35723e | 2003-02-20 03:03:54 -0500 | [diff] [blame] | 1559 | u32 tx_ctrl = readl(base + NvRegTransmitterControl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1560 | |
| 1561 | dprintk(KERN_DEBUG "%s: nv_stop_tx\n", dev->name); |
Ayaz Abdulla | f35723e | 2003-02-20 03:03:54 -0500 | [diff] [blame] | 1562 | if (!np->mac_in_use) |
| 1563 | tx_ctrl &= ~NVREG_XMITCTL_START; |
| 1564 | else |
| 1565 | tx_ctrl |= NVREG_XMITCTL_TX_PATH_EN; |
| 1566 | writel(tx_ctrl, base + NvRegTransmitterControl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1567 | reg_delay(dev, NvRegTransmitterStatus, NVREG_XMITSTAT_BUSY, 0, |
| 1568 | NV_TXSTOP_DELAY1, NV_TXSTOP_DELAY1MAX, |
| 1569 | KERN_INFO "nv_stop_tx: TransmitterStatus remained busy"); |
| 1570 | |
| 1571 | udelay(NV_TXSTOP_DELAY2); |
Ayaz Abdulla | f35723e | 2003-02-20 03:03:54 -0500 | [diff] [blame] | 1572 | if (!np->mac_in_use) |
| 1573 | writel(readl(base + NvRegTransmitPoll) & NVREG_TRANSMITPOLL_MAC_ADDR_REV, |
| 1574 | base + NvRegTransmitPoll); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1575 | } |
| 1576 | |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 1577 | static void nv_start_rxtx(struct net_device *dev) |
| 1578 | { |
| 1579 | nv_start_rx(dev); |
| 1580 | nv_start_tx(dev); |
| 1581 | } |
| 1582 | |
| 1583 | static void nv_stop_rxtx(struct net_device *dev) |
| 1584 | { |
| 1585 | nv_stop_rx(dev); |
| 1586 | nv_stop_tx(dev); |
| 1587 | } |
| 1588 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1589 | static void nv_txrx_reset(struct net_device *dev) |
| 1590 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 1591 | struct fe_priv *np = netdev_priv(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1592 | u8 __iomem *base = get_hwbase(dev); |
| 1593 | |
| 1594 | dprintk(KERN_DEBUG "%s: nv_txrx_reset\n", dev->name); |
Manfred Spraul | 8a4ae7f | 2005-09-21 23:22:10 -0400 | [diff] [blame] | 1595 | writel(NVREG_TXRXCTL_BIT2 | NVREG_TXRXCTL_RESET | np->txrxctl_bits, base + NvRegTxRxControl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1596 | pci_push(base); |
| 1597 | udelay(NV_TXRX_RESET_DELAY); |
Manfred Spraul | 8a4ae7f | 2005-09-21 23:22:10 -0400 | [diff] [blame] | 1598 | writel(NVREG_TXRXCTL_BIT2 | np->txrxctl_bits, base + NvRegTxRxControl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1599 | pci_push(base); |
| 1600 | } |
| 1601 | |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 1602 | static void nv_mac_reset(struct net_device *dev) |
| 1603 | { |
| 1604 | struct fe_priv *np = netdev_priv(dev); |
| 1605 | u8 __iomem *base = get_hwbase(dev); |
Ayaz Abdulla | 4e84f9b | 2008-02-04 15:14:09 -0500 | [diff] [blame] | 1606 | u32 temp1, temp2, temp3; |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 1607 | |
| 1608 | dprintk(KERN_DEBUG "%s: nv_mac_reset\n", dev->name); |
Ayaz Abdulla | 4e84f9b | 2008-02-04 15:14:09 -0500 | [diff] [blame] | 1609 | |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 1610 | writel(NVREG_TXRXCTL_BIT2 | NVREG_TXRXCTL_RESET | np->txrxctl_bits, base + NvRegTxRxControl); |
| 1611 | pci_push(base); |
Ayaz Abdulla | 4e84f9b | 2008-02-04 15:14:09 -0500 | [diff] [blame] | 1612 | |
| 1613 | /* save registers since they will be cleared on reset */ |
| 1614 | temp1 = readl(base + NvRegMacAddrA); |
| 1615 | temp2 = readl(base + NvRegMacAddrB); |
| 1616 | temp3 = readl(base + NvRegTransmitPoll); |
| 1617 | |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 1618 | writel(NVREG_MAC_RESET_ASSERT, base + NvRegMacReset); |
| 1619 | pci_push(base); |
| 1620 | udelay(NV_MAC_RESET_DELAY); |
| 1621 | writel(0, base + NvRegMacReset); |
| 1622 | pci_push(base); |
| 1623 | udelay(NV_MAC_RESET_DELAY); |
Ayaz Abdulla | 4e84f9b | 2008-02-04 15:14:09 -0500 | [diff] [blame] | 1624 | |
| 1625 | /* restore saved registers */ |
| 1626 | writel(temp1, base + NvRegMacAddrA); |
| 1627 | writel(temp2, base + NvRegMacAddrB); |
| 1628 | writel(temp3, base + NvRegTransmitPoll); |
| 1629 | |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 1630 | writel(NVREG_TXRXCTL_BIT2 | np->txrxctl_bits, base + NvRegTxRxControl); |
| 1631 | pci_push(base); |
| 1632 | } |
| 1633 | |
Ayaz Abdulla | 57fff69 | 2007-01-23 12:27:00 -0500 | [diff] [blame] | 1634 | static void nv_get_hw_stats(struct net_device *dev) |
| 1635 | { |
| 1636 | struct fe_priv *np = netdev_priv(dev); |
| 1637 | u8 __iomem *base = get_hwbase(dev); |
| 1638 | |
| 1639 | np->estats.tx_bytes += readl(base + NvRegTxCnt); |
| 1640 | np->estats.tx_zero_rexmt += readl(base + NvRegTxZeroReXmt); |
| 1641 | np->estats.tx_one_rexmt += readl(base + NvRegTxOneReXmt); |
| 1642 | np->estats.tx_many_rexmt += readl(base + NvRegTxManyReXmt); |
| 1643 | np->estats.tx_late_collision += readl(base + NvRegTxLateCol); |
| 1644 | np->estats.tx_fifo_errors += readl(base + NvRegTxUnderflow); |
| 1645 | np->estats.tx_carrier_errors += readl(base + NvRegTxLossCarrier); |
| 1646 | np->estats.tx_excess_deferral += readl(base + NvRegTxExcessDef); |
| 1647 | np->estats.tx_retry_error += readl(base + NvRegTxRetryErr); |
| 1648 | np->estats.rx_frame_error += readl(base + NvRegRxFrameErr); |
| 1649 | np->estats.rx_extra_byte += readl(base + NvRegRxExtraByte); |
| 1650 | np->estats.rx_late_collision += readl(base + NvRegRxLateCol); |
| 1651 | np->estats.rx_runt += readl(base + NvRegRxRunt); |
| 1652 | np->estats.rx_frame_too_long += readl(base + NvRegRxFrameTooLong); |
| 1653 | np->estats.rx_over_errors += readl(base + NvRegRxOverflow); |
| 1654 | np->estats.rx_crc_errors += readl(base + NvRegRxFCSErr); |
| 1655 | np->estats.rx_frame_align_error += readl(base + NvRegRxFrameAlignErr); |
| 1656 | np->estats.rx_length_error += readl(base + NvRegRxLenErr); |
| 1657 | np->estats.rx_unicast += readl(base + NvRegRxUnicast); |
| 1658 | np->estats.rx_multicast += readl(base + NvRegRxMulticast); |
| 1659 | np->estats.rx_broadcast += readl(base + NvRegRxBroadcast); |
| 1660 | np->estats.rx_packets = |
| 1661 | np->estats.rx_unicast + |
| 1662 | np->estats.rx_multicast + |
| 1663 | np->estats.rx_broadcast; |
| 1664 | np->estats.rx_errors_total = |
| 1665 | np->estats.rx_crc_errors + |
| 1666 | np->estats.rx_over_errors + |
| 1667 | np->estats.rx_frame_error + |
| 1668 | (np->estats.rx_frame_align_error - np->estats.rx_extra_byte) + |
| 1669 | np->estats.rx_late_collision + |
| 1670 | np->estats.rx_runt + |
| 1671 | np->estats.rx_frame_too_long; |
| 1672 | np->estats.tx_errors_total = |
| 1673 | np->estats.tx_late_collision + |
| 1674 | np->estats.tx_fifo_errors + |
| 1675 | np->estats.tx_carrier_errors + |
| 1676 | np->estats.tx_excess_deferral + |
| 1677 | np->estats.tx_retry_error; |
| 1678 | |
| 1679 | if (np->driver_data & DEV_HAS_STATISTICS_V2) { |
| 1680 | np->estats.tx_deferral += readl(base + NvRegTxDef); |
| 1681 | np->estats.tx_packets += readl(base + NvRegTxFrame); |
| 1682 | np->estats.rx_bytes += readl(base + NvRegRxCnt); |
| 1683 | np->estats.tx_pause += readl(base + NvRegTxPause); |
| 1684 | np->estats.rx_pause += readl(base + NvRegRxPause); |
| 1685 | np->estats.rx_drop_frame += readl(base + NvRegRxDropFrame); |
| 1686 | } |
Ayaz Abdulla | 9c66243 | 2008-08-06 12:11:42 -0400 | [diff] [blame] | 1687 | |
| 1688 | if (np->driver_data & DEV_HAS_STATISTICS_V3) { |
| 1689 | np->estats.tx_unicast += readl(base + NvRegTxUnicast); |
| 1690 | np->estats.tx_multicast += readl(base + NvRegTxMulticast); |
| 1691 | np->estats.tx_broadcast += readl(base + NvRegTxBroadcast); |
| 1692 | } |
Ayaz Abdulla | 57fff69 | 2007-01-23 12:27:00 -0500 | [diff] [blame] | 1693 | } |
| 1694 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1695 | /* |
| 1696 | * nv_get_stats: dev->get_stats function |
| 1697 | * Get latest stats value from the nic. |
| 1698 | * Called with read_lock(&dev_base_lock) held for read - |
| 1699 | * only synchronized against unregister_netdevice. |
| 1700 | */ |
| 1701 | static struct net_device_stats *nv_get_stats(struct net_device *dev) |
| 1702 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 1703 | struct fe_priv *np = netdev_priv(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1704 | |
Ayaz Abdulla | 2182816 | 2007-01-23 12:27:21 -0500 | [diff] [blame] | 1705 | /* If the nic supports hw counters then retrieve latest values */ |
Ayaz Abdulla | 9c66243 | 2008-08-06 12:11:42 -0400 | [diff] [blame] | 1706 | if (np->driver_data & (DEV_HAS_STATISTICS_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_STATISTICS_V3)) { |
Ayaz Abdulla | 2182816 | 2007-01-23 12:27:21 -0500 | [diff] [blame] | 1707 | nv_get_hw_stats(dev); |
| 1708 | |
| 1709 | /* copy to net_device stats */ |
Jeff Garzik | 8148ff4 | 2007-10-16 20:56:09 -0400 | [diff] [blame] | 1710 | dev->stats.tx_bytes = np->estats.tx_bytes; |
| 1711 | dev->stats.tx_fifo_errors = np->estats.tx_fifo_errors; |
| 1712 | dev->stats.tx_carrier_errors = np->estats.tx_carrier_errors; |
| 1713 | dev->stats.rx_crc_errors = np->estats.rx_crc_errors; |
| 1714 | dev->stats.rx_over_errors = np->estats.rx_over_errors; |
| 1715 | dev->stats.rx_errors = np->estats.rx_errors_total; |
| 1716 | dev->stats.tx_errors = np->estats.tx_errors_total; |
Ayaz Abdulla | 2182816 | 2007-01-23 12:27:21 -0500 | [diff] [blame] | 1717 | } |
Jeff Garzik | 8148ff4 | 2007-10-16 20:56:09 -0400 | [diff] [blame] | 1718 | |
| 1719 | return &dev->stats; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1720 | } |
| 1721 | |
| 1722 | /* |
| 1723 | * nv_alloc_rx: fill rx ring entries. |
| 1724 | * Return 1 if the allocations for the skbs failed and the |
| 1725 | * rx engine is without Available descriptors |
| 1726 | */ |
| 1727 | static int nv_alloc_rx(struct net_device *dev) |
| 1728 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 1729 | struct fe_priv *np = netdev_priv(dev); |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 1730 | struct ring_desc* less_rx; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1731 | |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 1732 | less_rx = np->get_rx.orig; |
| 1733 | if (less_rx-- == np->first_rx.orig) |
| 1734 | less_rx = np->last_rx.orig; |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1735 | |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 1736 | while (np->put_rx.orig != less_rx) { |
| 1737 | struct sk_buff *skb = dev_alloc_skb(np->rx_buf_sz + NV_RX_ALLOC_PAD); |
Ayaz Abdulla | 0d63fb3 | 2007-01-09 13:30:13 -0500 | [diff] [blame] | 1738 | if (skb) { |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1739 | np->put_rx_ctx->skb = skb; |
Arnaldo Carvalho de Melo | 4305b54 | 2007-04-19 20:43:29 -0700 | [diff] [blame] | 1740 | np->put_rx_ctx->dma = pci_map_single(np->pci_dev, |
| 1741 | skb->data, |
Arnaldo Carvalho de Melo | 8b5be26 | 2007-03-20 12:08:20 -0300 | [diff] [blame] | 1742 | skb_tailroom(skb), |
Arnaldo Carvalho de Melo | 4305b54 | 2007-04-19 20:43:29 -0700 | [diff] [blame] | 1743 | PCI_DMA_FROMDEVICE); |
Arnaldo Carvalho de Melo | 8b5be26 | 2007-03-20 12:08:20 -0300 | [diff] [blame] | 1744 | np->put_rx_ctx->dma_len = skb_tailroom(skb); |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 1745 | np->put_rx.orig->buf = cpu_to_le32(np->put_rx_ctx->dma); |
| 1746 | wmb(); |
| 1747 | np->put_rx.orig->flaglen = cpu_to_le32(np->rx_buf_sz | NV_RX_AVAIL); |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 1748 | if (unlikely(np->put_rx.orig++ == np->last_rx.orig)) |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 1749 | np->put_rx.orig = np->first_rx.orig; |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 1750 | if (unlikely(np->put_rx_ctx++ == np->last_rx_ctx)) |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 1751 | np->put_rx_ctx = np->first_rx_ctx; |
| 1752 | } else { |
| 1753 | return 1; |
| 1754 | } |
| 1755 | } |
| 1756 | return 0; |
| 1757 | } |
| 1758 | |
| 1759 | static int nv_alloc_rx_optimized(struct net_device *dev) |
| 1760 | { |
| 1761 | struct fe_priv *np = netdev_priv(dev); |
| 1762 | struct ring_desc_ex* less_rx; |
| 1763 | |
| 1764 | less_rx = np->get_rx.ex; |
| 1765 | if (less_rx-- == np->first_rx.ex) |
| 1766 | less_rx = np->last_rx.ex; |
| 1767 | |
| 1768 | while (np->put_rx.ex != less_rx) { |
| 1769 | struct sk_buff *skb = dev_alloc_skb(np->rx_buf_sz + NV_RX_ALLOC_PAD); |
| 1770 | if (skb) { |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 1771 | np->put_rx_ctx->skb = skb; |
Arnaldo Carvalho de Melo | 4305b54 | 2007-04-19 20:43:29 -0700 | [diff] [blame] | 1772 | np->put_rx_ctx->dma = pci_map_single(np->pci_dev, |
| 1773 | skb->data, |
Arnaldo Carvalho de Melo | 8b5be26 | 2007-03-20 12:08:20 -0300 | [diff] [blame] | 1774 | skb_tailroom(skb), |
Arnaldo Carvalho de Melo | 4305b54 | 2007-04-19 20:43:29 -0700 | [diff] [blame] | 1775 | PCI_DMA_FROMDEVICE); |
Arnaldo Carvalho de Melo | 8b5be26 | 2007-03-20 12:08:20 -0300 | [diff] [blame] | 1776 | np->put_rx_ctx->dma_len = skb_tailroom(skb); |
Al Viro | 5bb7ea2 | 2007-12-09 16:06:41 +0000 | [diff] [blame] | 1777 | np->put_rx.ex->bufhigh = cpu_to_le32(dma_high(np->put_rx_ctx->dma)); |
| 1778 | np->put_rx.ex->buflow = cpu_to_le32(dma_low(np->put_rx_ctx->dma)); |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 1779 | wmb(); |
| 1780 | np->put_rx.ex->flaglen = cpu_to_le32(np->rx_buf_sz | NV_RX2_AVAIL); |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 1781 | if (unlikely(np->put_rx.ex++ == np->last_rx.ex)) |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 1782 | np->put_rx.ex = np->first_rx.ex; |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 1783 | if (unlikely(np->put_rx_ctx++ == np->last_rx_ctx)) |
Ayaz Abdulla | 0d63fb3 | 2007-01-09 13:30:13 -0500 | [diff] [blame] | 1784 | np->put_rx_ctx = np->first_rx_ctx; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1785 | } else { |
Ayaz Abdulla | 0d63fb3 | 2007-01-09 13:30:13 -0500 | [diff] [blame] | 1786 | return 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1787 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1788 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1789 | return 0; |
| 1790 | } |
| 1791 | |
Stephen Hemminger | e27cdba | 2006-07-31 20:37:19 -0700 | [diff] [blame] | 1792 | /* If rx bufs are exhausted called after 50ms to attempt to refresh */ |
| 1793 | #ifdef CONFIG_FORCEDETH_NAPI |
| 1794 | static void nv_do_rx_refill(unsigned long data) |
| 1795 | { |
| 1796 | struct net_device *dev = (struct net_device *) data; |
Stephen Hemminger | bea3348 | 2007-10-03 16:41:36 -0700 | [diff] [blame] | 1797 | struct fe_priv *np = netdev_priv(dev); |
Stephen Hemminger | e27cdba | 2006-07-31 20:37:19 -0700 | [diff] [blame] | 1798 | |
| 1799 | /* Just reschedule NAPI rx processing */ |
Ben Hutchings | 288379f | 2009-01-19 16:43:59 -0800 | [diff] [blame] | 1800 | napi_schedule(&np->napi); |
Stephen Hemminger | e27cdba | 2006-07-31 20:37:19 -0700 | [diff] [blame] | 1801 | } |
| 1802 | #else |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1803 | static void nv_do_rx_refill(unsigned long data) |
| 1804 | { |
| 1805 | struct net_device *dev = (struct net_device *) data; |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 1806 | struct fe_priv *np = netdev_priv(dev); |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 1807 | int retcode; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1808 | |
Ayaz Abdulla | 84b3932 | 2006-05-20 14:59:48 -0700 | [diff] [blame] | 1809 | if (!using_multi_irqs(dev)) { |
| 1810 | if (np->msi_flags & NV_MSI_X_ENABLED) |
| 1811 | disable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_ALL].vector); |
| 1812 | else |
Manfred Spraul | a747590 | 2007-10-17 21:52:33 +0200 | [diff] [blame] | 1813 | disable_irq(np->pci_dev->irq); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 1814 | } else { |
| 1815 | disable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector); |
| 1816 | } |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 1817 | if (!nv_optimized(np)) |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 1818 | retcode = nv_alloc_rx(dev); |
| 1819 | else |
| 1820 | retcode = nv_alloc_rx_optimized(dev); |
| 1821 | if (retcode) { |
Ayaz Abdulla | 84b3932 | 2006-05-20 14:59:48 -0700 | [diff] [blame] | 1822 | spin_lock_irq(&np->lock); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1823 | if (!np->in_shutdown) |
| 1824 | mod_timer(&np->oom_kick, jiffies + OOM_REFILL); |
Ayaz Abdulla | 84b3932 | 2006-05-20 14:59:48 -0700 | [diff] [blame] | 1825 | spin_unlock_irq(&np->lock); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1826 | } |
Ayaz Abdulla | 84b3932 | 2006-05-20 14:59:48 -0700 | [diff] [blame] | 1827 | if (!using_multi_irqs(dev)) { |
| 1828 | if (np->msi_flags & NV_MSI_X_ENABLED) |
| 1829 | enable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_ALL].vector); |
| 1830 | else |
Manfred Spraul | a747590 | 2007-10-17 21:52:33 +0200 | [diff] [blame] | 1831 | enable_irq(np->pci_dev->irq); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 1832 | } else { |
| 1833 | enable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector); |
| 1834 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1835 | } |
Stephen Hemminger | e27cdba | 2006-07-31 20:37:19 -0700 | [diff] [blame] | 1836 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1837 | |
Jeff Garzik | f3b197a | 2006-05-26 21:39:03 -0400 | [diff] [blame] | 1838 | static void nv_init_rx(struct net_device *dev) |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 1839 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 1840 | struct fe_priv *np = netdev_priv(dev); |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 1841 | int i; |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 1842 | |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1843 | np->get_rx = np->put_rx = np->first_rx = np->rx_ring; |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 1844 | |
| 1845 | if (!nv_optimized(np)) |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1846 | np->last_rx.orig = &np->rx_ring.orig[np->rx_ring_size-1]; |
| 1847 | else |
| 1848 | np->last_rx.ex = &np->rx_ring.ex[np->rx_ring_size-1]; |
| 1849 | np->get_rx_ctx = np->put_rx_ctx = np->first_rx_ctx = np->rx_skb; |
| 1850 | np->last_rx_ctx = &np->rx_skb[np->rx_ring_size-1]; |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 1851 | |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1852 | for (i = 0; i < np->rx_ring_size; i++) { |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 1853 | if (!nv_optimized(np)) { |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 1854 | np->rx_ring.orig[i].flaglen = 0; |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1855 | np->rx_ring.orig[i].buf = 0; |
| 1856 | } else { |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 1857 | np->rx_ring.ex[i].flaglen = 0; |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1858 | np->rx_ring.ex[i].txvlan = 0; |
| 1859 | np->rx_ring.ex[i].bufhigh = 0; |
| 1860 | np->rx_ring.ex[i].buflow = 0; |
| 1861 | } |
| 1862 | np->rx_skb[i].skb = NULL; |
| 1863 | np->rx_skb[i].dma = 0; |
| 1864 | } |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 1865 | } |
| 1866 | |
| 1867 | static void nv_init_tx(struct net_device *dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1868 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 1869 | struct fe_priv *np = netdev_priv(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1870 | int i; |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 1871 | |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1872 | np->get_tx = np->put_tx = np->first_tx = np->tx_ring; |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 1873 | |
| 1874 | if (!nv_optimized(np)) |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1875 | np->last_tx.orig = &np->tx_ring.orig[np->tx_ring_size-1]; |
| 1876 | else |
| 1877 | np->last_tx.ex = &np->tx_ring.ex[np->tx_ring_size-1]; |
| 1878 | np->get_tx_ctx = np->put_tx_ctx = np->first_tx_ctx = np->tx_skb; |
| 1879 | np->last_tx_ctx = &np->tx_skb[np->tx_ring_size-1]; |
Ayaz Abdulla | 3b446c3 | 2008-03-10 14:58:21 -0500 | [diff] [blame] | 1880 | np->tx_pkts_in_progress = 0; |
| 1881 | np->tx_change_owner = NULL; |
| 1882 | np->tx_end_flip = NULL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1883 | |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 1884 | for (i = 0; i < np->tx_ring_size; i++) { |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 1885 | if (!nv_optimized(np)) { |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 1886 | np->tx_ring.orig[i].flaglen = 0; |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1887 | np->tx_ring.orig[i].buf = 0; |
| 1888 | } else { |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 1889 | np->tx_ring.ex[i].flaglen = 0; |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1890 | np->tx_ring.ex[i].txvlan = 0; |
| 1891 | np->tx_ring.ex[i].bufhigh = 0; |
| 1892 | np->tx_ring.ex[i].buflow = 0; |
| 1893 | } |
| 1894 | np->tx_skb[i].skb = NULL; |
| 1895 | np->tx_skb[i].dma = 0; |
Ayaz Abdulla | 3b446c3 | 2008-03-10 14:58:21 -0500 | [diff] [blame] | 1896 | np->tx_skb[i].dma_len = 0; |
| 1897 | np->tx_skb[i].first_tx_desc = NULL; |
| 1898 | np->tx_skb[i].next_tx_ctx = NULL; |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 1899 | } |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 1900 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1901 | |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 1902 | static int nv_init_ring(struct net_device *dev) |
| 1903 | { |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 1904 | struct fe_priv *np = netdev_priv(dev); |
| 1905 | |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 1906 | nv_init_tx(dev); |
| 1907 | nv_init_rx(dev); |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 1908 | |
| 1909 | if (!nv_optimized(np)) |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 1910 | return nv_alloc_rx(dev); |
| 1911 | else |
| 1912 | return nv_alloc_rx_optimized(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1913 | } |
| 1914 | |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1915 | static int nv_release_txskb(struct net_device *dev, struct nv_skb_map* tx_skb) |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 1916 | { |
| 1917 | struct fe_priv *np = netdev_priv(dev); |
Ayaz Abdulla | fa45459 | 2006-01-05 22:45:45 -0800 | [diff] [blame] | 1918 | |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1919 | if (tx_skb->dma) { |
| 1920 | pci_unmap_page(np->pci_dev, tx_skb->dma, |
| 1921 | tx_skb->dma_len, |
Ayaz Abdulla | fa45459 | 2006-01-05 22:45:45 -0800 | [diff] [blame] | 1922 | PCI_DMA_TODEVICE); |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1923 | tx_skb->dma = 0; |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 1924 | } |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1925 | if (tx_skb->skb) { |
| 1926 | dev_kfree_skb_any(tx_skb->skb); |
| 1927 | tx_skb->skb = NULL; |
Ayaz Abdulla | fa45459 | 2006-01-05 22:45:45 -0800 | [diff] [blame] | 1928 | return 1; |
| 1929 | } else { |
| 1930 | return 0; |
| 1931 | } |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 1932 | } |
| 1933 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1934 | static void nv_drain_tx(struct net_device *dev) |
| 1935 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 1936 | struct fe_priv *np = netdev_priv(dev); |
| 1937 | unsigned int i; |
Jeff Garzik | f3b197a | 2006-05-26 21:39:03 -0400 | [diff] [blame] | 1938 | |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 1939 | for (i = 0; i < np->tx_ring_size; i++) { |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 1940 | if (!nv_optimized(np)) { |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 1941 | np->tx_ring.orig[i].flaglen = 0; |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1942 | np->tx_ring.orig[i].buf = 0; |
| 1943 | } else { |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 1944 | np->tx_ring.ex[i].flaglen = 0; |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1945 | np->tx_ring.ex[i].txvlan = 0; |
| 1946 | np->tx_ring.ex[i].bufhigh = 0; |
| 1947 | np->tx_ring.ex[i].buflow = 0; |
| 1948 | } |
| 1949 | if (nv_release_txskb(dev, &np->tx_skb[i])) |
Jeff Garzik | 8148ff4 | 2007-10-16 20:56:09 -0400 | [diff] [blame] | 1950 | dev->stats.tx_dropped++; |
Ayaz Abdulla | 3b446c3 | 2008-03-10 14:58:21 -0500 | [diff] [blame] | 1951 | np->tx_skb[i].dma = 0; |
| 1952 | np->tx_skb[i].dma_len = 0; |
| 1953 | np->tx_skb[i].first_tx_desc = NULL; |
| 1954 | np->tx_skb[i].next_tx_ctx = NULL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1955 | } |
Ayaz Abdulla | 3b446c3 | 2008-03-10 14:58:21 -0500 | [diff] [blame] | 1956 | np->tx_pkts_in_progress = 0; |
| 1957 | np->tx_change_owner = NULL; |
| 1958 | np->tx_end_flip = NULL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1959 | } |
| 1960 | |
| 1961 | static void nv_drain_rx(struct net_device *dev) |
| 1962 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 1963 | struct fe_priv *np = netdev_priv(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1964 | int i; |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1965 | |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 1966 | for (i = 0; i < np->rx_ring_size; i++) { |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 1967 | if (!nv_optimized(np)) { |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 1968 | np->rx_ring.orig[i].flaglen = 0; |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1969 | np->rx_ring.orig[i].buf = 0; |
| 1970 | } else { |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 1971 | np->rx_ring.ex[i].flaglen = 0; |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1972 | np->rx_ring.ex[i].txvlan = 0; |
| 1973 | np->rx_ring.ex[i].bufhigh = 0; |
| 1974 | np->rx_ring.ex[i].buflow = 0; |
| 1975 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1976 | wmb(); |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1977 | if (np->rx_skb[i].skb) { |
| 1978 | pci_unmap_single(np->pci_dev, np->rx_skb[i].dma, |
Arnaldo Carvalho de Melo | 4305b54 | 2007-04-19 20:43:29 -0700 | [diff] [blame] | 1979 | (skb_end_pointer(np->rx_skb[i].skb) - |
| 1980 | np->rx_skb[i].skb->data), |
| 1981 | PCI_DMA_FROMDEVICE); |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1982 | dev_kfree_skb(np->rx_skb[i].skb); |
| 1983 | np->rx_skb[i].skb = NULL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1984 | } |
| 1985 | } |
| 1986 | } |
| 1987 | |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 1988 | static void nv_drain_rxtx(struct net_device *dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1989 | { |
| 1990 | nv_drain_tx(dev); |
| 1991 | nv_drain_rx(dev); |
| 1992 | } |
| 1993 | |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1994 | static inline u32 nv_get_empty_tx_slots(struct fe_priv *np) |
| 1995 | { |
| 1996 | return (u32)(np->tx_ring_size - ((np->tx_ring_size + (np->put_tx_ctx - np->get_tx_ctx)) % np->tx_ring_size)); |
| 1997 | } |
| 1998 | |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 1999 | static void nv_legacybackoff_reseed(struct net_device *dev) |
| 2000 | { |
| 2001 | u8 __iomem *base = get_hwbase(dev); |
| 2002 | u32 reg; |
| 2003 | u32 low; |
| 2004 | int tx_status = 0; |
| 2005 | |
| 2006 | reg = readl(base + NvRegSlotTime) & ~NVREG_SLOTTIME_MASK; |
| 2007 | get_random_bytes(&low, sizeof(low)); |
| 2008 | reg |= low & NVREG_SLOTTIME_MASK; |
| 2009 | |
| 2010 | /* Need to stop tx before change takes effect. |
| 2011 | * Caller has already gained np->lock. |
| 2012 | */ |
| 2013 | tx_status = readl(base + NvRegTransmitterControl) & NVREG_XMITCTL_START; |
| 2014 | if (tx_status) |
| 2015 | nv_stop_tx(dev); |
| 2016 | nv_stop_rx(dev); |
| 2017 | writel(reg, base + NvRegSlotTime); |
| 2018 | if (tx_status) |
| 2019 | nv_start_tx(dev); |
| 2020 | nv_start_rx(dev); |
| 2021 | } |
| 2022 | |
| 2023 | /* Gear Backoff Seeds */ |
| 2024 | #define BACKOFF_SEEDSET_ROWS 8 |
| 2025 | #define BACKOFF_SEEDSET_LFSRS 15 |
| 2026 | |
| 2027 | /* Known Good seed sets */ |
| 2028 | static const u32 main_seedset[BACKOFF_SEEDSET_ROWS][BACKOFF_SEEDSET_LFSRS] = { |
| 2029 | {145, 155, 165, 175, 185, 196, 235, 245, 255, 265, 275, 285, 660, 690, 874}, |
| 2030 | {245, 255, 265, 575, 385, 298, 335, 345, 355, 366, 375, 385, 761, 790, 974}, |
| 2031 | {145, 155, 165, 175, 185, 196, 235, 245, 255, 265, 275, 285, 660, 690, 874}, |
| 2032 | {245, 255, 265, 575, 385, 298, 335, 345, 355, 366, 375, 386, 761, 790, 974}, |
| 2033 | {266, 265, 276, 585, 397, 208, 345, 355, 365, 376, 385, 396, 771, 700, 984}, |
| 2034 | {266, 265, 276, 586, 397, 208, 346, 355, 365, 376, 285, 396, 771, 700, 984}, |
| 2035 | {366, 365, 376, 686, 497, 308, 447, 455, 466, 476, 485, 496, 871, 800, 84}, |
| 2036 | {466, 465, 476, 786, 597, 408, 547, 555, 566, 576, 585, 597, 971, 900, 184}}; |
| 2037 | |
| 2038 | static const u32 gear_seedset[BACKOFF_SEEDSET_ROWS][BACKOFF_SEEDSET_LFSRS] = { |
| 2039 | {251, 262, 273, 324, 319, 508, 375, 364, 341, 371, 398, 193, 375, 30, 295}, |
| 2040 | {351, 375, 373, 469, 551, 639, 477, 464, 441, 472, 498, 293, 476, 130, 395}, |
| 2041 | {351, 375, 373, 469, 551, 639, 477, 464, 441, 472, 498, 293, 476, 130, 397}, |
| 2042 | {251, 262, 273, 324, 319, 508, 375, 364, 341, 371, 398, 193, 375, 30, 295}, |
| 2043 | {251, 262, 273, 324, 319, 508, 375, 364, 341, 371, 398, 193, 375, 30, 295}, |
| 2044 | {351, 375, 373, 469, 551, 639, 477, 464, 441, 472, 498, 293, 476, 130, 395}, |
| 2045 | {351, 375, 373, 469, 551, 639, 477, 464, 441, 472, 498, 293, 476, 130, 395}, |
| 2046 | {351, 375, 373, 469, 551, 639, 477, 464, 441, 472, 498, 293, 476, 130, 395}}; |
| 2047 | |
| 2048 | static void nv_gear_backoff_reseed(struct net_device *dev) |
| 2049 | { |
| 2050 | u8 __iomem *base = get_hwbase(dev); |
| 2051 | u32 miniseed1, miniseed2, miniseed2_reversed, miniseed3, miniseed3_reversed; |
| 2052 | u32 temp, seedset, combinedSeed; |
| 2053 | int i; |
| 2054 | |
| 2055 | /* Setup seed for free running LFSR */ |
| 2056 | /* We are going to read the time stamp counter 3 times |
| 2057 | and swizzle bits around to increase randomness */ |
| 2058 | get_random_bytes(&miniseed1, sizeof(miniseed1)); |
| 2059 | miniseed1 &= 0x0fff; |
| 2060 | if (miniseed1 == 0) |
| 2061 | miniseed1 = 0xabc; |
| 2062 | |
| 2063 | get_random_bytes(&miniseed2, sizeof(miniseed2)); |
| 2064 | miniseed2 &= 0x0fff; |
| 2065 | if (miniseed2 == 0) |
| 2066 | miniseed2 = 0xabc; |
| 2067 | miniseed2_reversed = |
| 2068 | ((miniseed2 & 0xF00) >> 8) | |
| 2069 | (miniseed2 & 0x0F0) | |
| 2070 | ((miniseed2 & 0x00F) << 8); |
| 2071 | |
| 2072 | get_random_bytes(&miniseed3, sizeof(miniseed3)); |
| 2073 | miniseed3 &= 0x0fff; |
| 2074 | if (miniseed3 == 0) |
| 2075 | miniseed3 = 0xabc; |
| 2076 | miniseed3_reversed = |
| 2077 | ((miniseed3 & 0xF00) >> 8) | |
| 2078 | (miniseed3 & 0x0F0) | |
| 2079 | ((miniseed3 & 0x00F) << 8); |
| 2080 | |
| 2081 | combinedSeed = ((miniseed1 ^ miniseed2_reversed) << 12) | |
| 2082 | (miniseed2 ^ miniseed3_reversed); |
| 2083 | |
| 2084 | /* Seeds can not be zero */ |
| 2085 | if ((combinedSeed & NVREG_BKOFFCTRL_SEED_MASK) == 0) |
| 2086 | combinedSeed |= 0x08; |
| 2087 | if ((combinedSeed & (NVREG_BKOFFCTRL_SEED_MASK << NVREG_BKOFFCTRL_GEAR)) == 0) |
| 2088 | combinedSeed |= 0x8000; |
| 2089 | |
| 2090 | /* No need to disable tx here */ |
| 2091 | temp = NVREG_BKOFFCTRL_DEFAULT | (0 << NVREG_BKOFFCTRL_SELECT); |
| 2092 | temp |= combinedSeed & NVREG_BKOFFCTRL_SEED_MASK; |
| 2093 | temp |= combinedSeed >> NVREG_BKOFFCTRL_GEAR; |
| 2094 | writel(temp,base + NvRegBackOffControl); |
| 2095 | |
| 2096 | /* Setup seeds for all gear LFSRs. */ |
| 2097 | get_random_bytes(&seedset, sizeof(seedset)); |
| 2098 | seedset = seedset % BACKOFF_SEEDSET_ROWS; |
| 2099 | for (i = 1; i <= BACKOFF_SEEDSET_LFSRS; i++) |
| 2100 | { |
| 2101 | temp = NVREG_BKOFFCTRL_DEFAULT | (i << NVREG_BKOFFCTRL_SELECT); |
| 2102 | temp |= main_seedset[seedset][i-1] & 0x3ff; |
| 2103 | temp |= ((gear_seedset[seedset][i-1] & 0x3ff) << NVREG_BKOFFCTRL_GEAR); |
| 2104 | writel(temp, base + NvRegBackOffControl); |
| 2105 | } |
| 2106 | } |
| 2107 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2108 | /* |
| 2109 | * nv_start_xmit: dev->hard_start_xmit function |
Herbert Xu | 932ff27 | 2006-06-09 12:20:56 -0700 | [diff] [blame] | 2110 | * Called with netif_tx_lock held. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2111 | */ |
| 2112 | static int nv_start_xmit(struct sk_buff *skb, struct net_device *dev) |
| 2113 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 2114 | struct fe_priv *np = netdev_priv(dev); |
Ayaz Abdulla | fa45459 | 2006-01-05 22:45:45 -0800 | [diff] [blame] | 2115 | u32 tx_flags = 0; |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 2116 | u32 tx_flags_extra = (np->desc_ver == DESC_VER_1 ? NV_TX_LASTPACKET : NV_TX2_LASTPACKET); |
| 2117 | unsigned int fragments = skb_shinfo(skb)->nr_frags; |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 2118 | unsigned int i; |
Ayaz Abdulla | fa45459 | 2006-01-05 22:45:45 -0800 | [diff] [blame] | 2119 | u32 offset = 0; |
| 2120 | u32 bcnt; |
| 2121 | u32 size = skb->len-skb->data_len; |
| 2122 | u32 entries = (size >> NV_TX2_TSO_MAX_SHIFT) + ((size & (NV_TX2_TSO_MAX_SIZE-1)) ? 1 : 0); |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 2123 | u32 empty_slots; |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2124 | struct ring_desc* put_tx; |
| 2125 | struct ring_desc* start_tx; |
| 2126 | struct ring_desc* prev_tx; |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 2127 | struct nv_skb_map* prev_tx_ctx; |
Ingo Molnar | bd6ca63 | 2008-03-28 14:41:30 -0700 | [diff] [blame] | 2128 | unsigned long flags; |
Ayaz Abdulla | fa45459 | 2006-01-05 22:45:45 -0800 | [diff] [blame] | 2129 | |
| 2130 | /* add fragments to entries count */ |
| 2131 | for (i = 0; i < fragments; i++) { |
| 2132 | entries += (skb_shinfo(skb)->frags[i].size >> NV_TX2_TSO_MAX_SHIFT) + |
| 2133 | ((skb_shinfo(skb)->frags[i].size & (NV_TX2_TSO_MAX_SIZE-1)) ? 1 : 0); |
| 2134 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2135 | |
Ayaz Abdulla | 001eb84 | 2009-01-09 11:03:44 +0000 | [diff] [blame] | 2136 | spin_lock_irqsave(&np->lock, flags); |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 2137 | empty_slots = nv_get_empty_tx_slots(np); |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2138 | if (unlikely(empty_slots <= entries)) { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 2139 | netif_stop_queue(dev); |
Ayaz Abdulla | aaa37d2 | 2007-01-21 18:10:42 -0500 | [diff] [blame] | 2140 | np->tx_stop = 1; |
Ingo Molnar | bd6ca63 | 2008-03-28 14:41:30 -0700 | [diff] [blame] | 2141 | spin_unlock_irqrestore(&np->lock, flags); |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 2142 | return NETDEV_TX_BUSY; |
| 2143 | } |
Ayaz Abdulla | 001eb84 | 2009-01-09 11:03:44 +0000 | [diff] [blame] | 2144 | spin_unlock_irqrestore(&np->lock, flags); |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 2145 | |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2146 | start_tx = put_tx = np->put_tx.orig; |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 2147 | |
Ayaz Abdulla | fa45459 | 2006-01-05 22:45:45 -0800 | [diff] [blame] | 2148 | /* setup the header buffer */ |
| 2149 | do { |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 2150 | prev_tx = put_tx; |
| 2151 | prev_tx_ctx = np->put_tx_ctx; |
Ayaz Abdulla | fa45459 | 2006-01-05 22:45:45 -0800 | [diff] [blame] | 2152 | bcnt = (size > NV_TX2_TSO_MAX_SIZE) ? NV_TX2_TSO_MAX_SIZE : size; |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 2153 | np->put_tx_ctx->dma = pci_map_single(np->pci_dev, skb->data + offset, bcnt, |
Ayaz Abdulla | fa45459 | 2006-01-05 22:45:45 -0800 | [diff] [blame] | 2154 | PCI_DMA_TODEVICE); |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 2155 | np->put_tx_ctx->dma_len = bcnt; |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2156 | put_tx->buf = cpu_to_le32(np->put_tx_ctx->dma); |
| 2157 | put_tx->flaglen = cpu_to_le32((bcnt-1) | tx_flags); |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2158 | |
Ayaz Abdulla | fa45459 | 2006-01-05 22:45:45 -0800 | [diff] [blame] | 2159 | tx_flags = np->tx_flags; |
| 2160 | offset += bcnt; |
| 2161 | size -= bcnt; |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2162 | if (unlikely(put_tx++ == np->last_tx.orig)) |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2163 | put_tx = np->first_tx.orig; |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2164 | if (unlikely(np->put_tx_ctx++ == np->last_tx_ctx)) |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 2165 | np->put_tx_ctx = np->first_tx_ctx; |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 2166 | } while (size); |
Ayaz Abdulla | fa45459 | 2006-01-05 22:45:45 -0800 | [diff] [blame] | 2167 | |
| 2168 | /* setup the fragments */ |
| 2169 | for (i = 0; i < fragments; i++) { |
| 2170 | skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; |
| 2171 | u32 size = frag->size; |
| 2172 | offset = 0; |
| 2173 | |
| 2174 | do { |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 2175 | prev_tx = put_tx; |
| 2176 | prev_tx_ctx = np->put_tx_ctx; |
Ayaz Abdulla | fa45459 | 2006-01-05 22:45:45 -0800 | [diff] [blame] | 2177 | bcnt = (size > NV_TX2_TSO_MAX_SIZE) ? NV_TX2_TSO_MAX_SIZE : size; |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 2178 | np->put_tx_ctx->dma = pci_map_page(np->pci_dev, frag->page, frag->page_offset+offset, bcnt, |
| 2179 | PCI_DMA_TODEVICE); |
| 2180 | np->put_tx_ctx->dma_len = bcnt; |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2181 | put_tx->buf = cpu_to_le32(np->put_tx_ctx->dma); |
| 2182 | put_tx->flaglen = cpu_to_le32((bcnt-1) | tx_flags); |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2183 | |
Ayaz Abdulla | fa45459 | 2006-01-05 22:45:45 -0800 | [diff] [blame] | 2184 | offset += bcnt; |
| 2185 | size -= bcnt; |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2186 | if (unlikely(put_tx++ == np->last_tx.orig)) |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2187 | put_tx = np->first_tx.orig; |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2188 | if (unlikely(np->put_tx_ctx++ == np->last_tx_ctx)) |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 2189 | np->put_tx_ctx = np->first_tx_ctx; |
Ayaz Abdulla | fa45459 | 2006-01-05 22:45:45 -0800 | [diff] [blame] | 2190 | } while (size); |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 2191 | } |
| 2192 | |
Ayaz Abdulla | fa45459 | 2006-01-05 22:45:45 -0800 | [diff] [blame] | 2193 | /* set last fragment flag */ |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2194 | prev_tx->flaglen |= cpu_to_le32(tx_flags_extra); |
Ayaz Abdulla | fa45459 | 2006-01-05 22:45:45 -0800 | [diff] [blame] | 2195 | |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 2196 | /* save skb in this slot's context area */ |
| 2197 | prev_tx_ctx->skb = skb; |
Ayaz Abdulla | fa45459 | 2006-01-05 22:45:45 -0800 | [diff] [blame] | 2198 | |
Herbert Xu | 89114af | 2006-07-08 13:34:32 -0700 | [diff] [blame] | 2199 | if (skb_is_gso(skb)) |
Herbert Xu | 7967168 | 2006-06-22 02:40:14 -0700 | [diff] [blame] | 2200 | tx_flags_extra = NV_TX2_TSO | (skb_shinfo(skb)->gso_size << NV_TX2_TSO_SHIFT); |
Manfred Spraul | ee73362 | 2005-07-31 18:32:26 +0200 | [diff] [blame] | 2201 | else |
Arjan van de Ven | 1d39ed5 | 2006-12-12 14:06:23 +0100 | [diff] [blame] | 2202 | tx_flags_extra = skb->ip_summed == CHECKSUM_PARTIAL ? |
Patrick McHardy | 84fa793 | 2006-08-29 16:44:56 -0700 | [diff] [blame] | 2203 | NV_TX2_CHECKSUM_L3 | NV_TX2_CHECKSUM_L4 : 0; |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 2204 | |
Ingo Molnar | bd6ca63 | 2008-03-28 14:41:30 -0700 | [diff] [blame] | 2205 | spin_lock_irqsave(&np->lock, flags); |
Ayaz Abdulla | 164a86e | 2007-01-09 13:30:10 -0500 | [diff] [blame] | 2206 | |
Ayaz Abdulla | fa45459 | 2006-01-05 22:45:45 -0800 | [diff] [blame] | 2207 | /* set tx flags */ |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2208 | start_tx->flaglen |= cpu_to_le32(tx_flags | tx_flags_extra); |
| 2209 | np->put_tx.orig = put_tx; |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 2210 | |
Ingo Molnar | bd6ca63 | 2008-03-28 14:41:30 -0700 | [diff] [blame] | 2211 | spin_unlock_irqrestore(&np->lock, flags); |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 2212 | |
| 2213 | dprintk(KERN_DEBUG "%s: nv_start_xmit: entries %d queued for transmission. tx_flags_extra: %x\n", |
| 2214 | dev->name, entries, tx_flags_extra); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2215 | { |
| 2216 | int j; |
| 2217 | for (j=0; j<64; j++) { |
| 2218 | if ((j%16) == 0) |
| 2219 | dprintk("\n%03x:", j); |
| 2220 | dprintk(" %02x", ((unsigned char*)skb->data)[j]); |
| 2221 | } |
| 2222 | dprintk("\n"); |
| 2223 | } |
| 2224 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2225 | dev->trans_start = jiffies; |
Manfred Spraul | 8a4ae7f | 2005-09-21 23:22:10 -0400 | [diff] [blame] | 2226 | writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl); |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 2227 | return NETDEV_TX_OK; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2228 | } |
| 2229 | |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2230 | static int nv_start_xmit_optimized(struct sk_buff *skb, struct net_device *dev) |
| 2231 | { |
| 2232 | struct fe_priv *np = netdev_priv(dev); |
| 2233 | u32 tx_flags = 0; |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2234 | u32 tx_flags_extra; |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2235 | unsigned int fragments = skb_shinfo(skb)->nr_frags; |
| 2236 | unsigned int i; |
| 2237 | u32 offset = 0; |
| 2238 | u32 bcnt; |
| 2239 | u32 size = skb->len-skb->data_len; |
| 2240 | u32 entries = (size >> NV_TX2_TSO_MAX_SHIFT) + ((size & (NV_TX2_TSO_MAX_SIZE-1)) ? 1 : 0); |
| 2241 | u32 empty_slots; |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2242 | struct ring_desc_ex* put_tx; |
| 2243 | struct ring_desc_ex* start_tx; |
| 2244 | struct ring_desc_ex* prev_tx; |
| 2245 | struct nv_skb_map* prev_tx_ctx; |
Ayaz Abdulla | 3b446c3 | 2008-03-10 14:58:21 -0500 | [diff] [blame] | 2246 | struct nv_skb_map* start_tx_ctx; |
Ingo Molnar | bd6ca63 | 2008-03-28 14:41:30 -0700 | [diff] [blame] | 2247 | unsigned long flags; |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2248 | |
| 2249 | /* add fragments to entries count */ |
| 2250 | for (i = 0; i < fragments; i++) { |
| 2251 | entries += (skb_shinfo(skb)->frags[i].size >> NV_TX2_TSO_MAX_SHIFT) + |
| 2252 | ((skb_shinfo(skb)->frags[i].size & (NV_TX2_TSO_MAX_SIZE-1)) ? 1 : 0); |
| 2253 | } |
| 2254 | |
Ayaz Abdulla | 001eb84 | 2009-01-09 11:03:44 +0000 | [diff] [blame] | 2255 | spin_lock_irqsave(&np->lock, flags); |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2256 | empty_slots = nv_get_empty_tx_slots(np); |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2257 | if (unlikely(empty_slots <= entries)) { |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2258 | netif_stop_queue(dev); |
Ayaz Abdulla | aaa37d2 | 2007-01-21 18:10:42 -0500 | [diff] [blame] | 2259 | np->tx_stop = 1; |
Ingo Molnar | bd6ca63 | 2008-03-28 14:41:30 -0700 | [diff] [blame] | 2260 | spin_unlock_irqrestore(&np->lock, flags); |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2261 | return NETDEV_TX_BUSY; |
| 2262 | } |
Ayaz Abdulla | 001eb84 | 2009-01-09 11:03:44 +0000 | [diff] [blame] | 2263 | spin_unlock_irqrestore(&np->lock, flags); |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2264 | |
| 2265 | start_tx = put_tx = np->put_tx.ex; |
Ayaz Abdulla | 3b446c3 | 2008-03-10 14:58:21 -0500 | [diff] [blame] | 2266 | start_tx_ctx = np->put_tx_ctx; |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2267 | |
| 2268 | /* setup the header buffer */ |
| 2269 | do { |
| 2270 | prev_tx = put_tx; |
| 2271 | prev_tx_ctx = np->put_tx_ctx; |
| 2272 | bcnt = (size > NV_TX2_TSO_MAX_SIZE) ? NV_TX2_TSO_MAX_SIZE : size; |
| 2273 | np->put_tx_ctx->dma = pci_map_single(np->pci_dev, skb->data + offset, bcnt, |
| 2274 | PCI_DMA_TODEVICE); |
| 2275 | np->put_tx_ctx->dma_len = bcnt; |
Al Viro | 5bb7ea2 | 2007-12-09 16:06:41 +0000 | [diff] [blame] | 2276 | put_tx->bufhigh = cpu_to_le32(dma_high(np->put_tx_ctx->dma)); |
| 2277 | put_tx->buflow = cpu_to_le32(dma_low(np->put_tx_ctx->dma)); |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2278 | put_tx->flaglen = cpu_to_le32((bcnt-1) | tx_flags); |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2279 | |
| 2280 | tx_flags = NV_TX2_VALID; |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2281 | offset += bcnt; |
| 2282 | size -= bcnt; |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2283 | if (unlikely(put_tx++ == np->last_tx.ex)) |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2284 | put_tx = np->first_tx.ex; |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2285 | if (unlikely(np->put_tx_ctx++ == np->last_tx_ctx)) |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2286 | np->put_tx_ctx = np->first_tx_ctx; |
| 2287 | } while (size); |
| 2288 | |
| 2289 | /* setup the fragments */ |
| 2290 | for (i = 0; i < fragments; i++) { |
| 2291 | skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; |
| 2292 | u32 size = frag->size; |
| 2293 | offset = 0; |
| 2294 | |
| 2295 | do { |
| 2296 | prev_tx = put_tx; |
| 2297 | prev_tx_ctx = np->put_tx_ctx; |
| 2298 | bcnt = (size > NV_TX2_TSO_MAX_SIZE) ? NV_TX2_TSO_MAX_SIZE : size; |
| 2299 | np->put_tx_ctx->dma = pci_map_page(np->pci_dev, frag->page, frag->page_offset+offset, bcnt, |
| 2300 | PCI_DMA_TODEVICE); |
| 2301 | np->put_tx_ctx->dma_len = bcnt; |
Al Viro | 5bb7ea2 | 2007-12-09 16:06:41 +0000 | [diff] [blame] | 2302 | put_tx->bufhigh = cpu_to_le32(dma_high(np->put_tx_ctx->dma)); |
| 2303 | put_tx->buflow = cpu_to_le32(dma_low(np->put_tx_ctx->dma)); |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2304 | put_tx->flaglen = cpu_to_le32((bcnt-1) | tx_flags); |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2305 | |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2306 | offset += bcnt; |
| 2307 | size -= bcnt; |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2308 | if (unlikely(put_tx++ == np->last_tx.ex)) |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2309 | put_tx = np->first_tx.ex; |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2310 | if (unlikely(np->put_tx_ctx++ == np->last_tx_ctx)) |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2311 | np->put_tx_ctx = np->first_tx_ctx; |
| 2312 | } while (size); |
| 2313 | } |
| 2314 | |
| 2315 | /* set last fragment flag */ |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2316 | prev_tx->flaglen |= cpu_to_le32(NV_TX2_LASTPACKET); |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2317 | |
| 2318 | /* save skb in this slot's context area */ |
| 2319 | prev_tx_ctx->skb = skb; |
| 2320 | |
| 2321 | if (skb_is_gso(skb)) |
| 2322 | tx_flags_extra = NV_TX2_TSO | (skb_shinfo(skb)->gso_size << NV_TX2_TSO_SHIFT); |
| 2323 | else |
| 2324 | tx_flags_extra = skb->ip_summed == CHECKSUM_PARTIAL ? |
| 2325 | NV_TX2_CHECKSUM_L3 | NV_TX2_CHECKSUM_L4 : 0; |
| 2326 | |
| 2327 | /* vlan tag */ |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2328 | if (likely(!np->vlangrp)) { |
| 2329 | start_tx->txvlan = 0; |
| 2330 | } else { |
| 2331 | if (vlan_tx_tag_present(skb)) |
| 2332 | start_tx->txvlan = cpu_to_le32(NV_TX3_VLAN_TAG_PRESENT | vlan_tx_tag_get(skb)); |
| 2333 | else |
| 2334 | start_tx->txvlan = 0; |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2335 | } |
| 2336 | |
Ingo Molnar | bd6ca63 | 2008-03-28 14:41:30 -0700 | [diff] [blame] | 2337 | spin_lock_irqsave(&np->lock, flags); |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2338 | |
Ayaz Abdulla | 3b446c3 | 2008-03-10 14:58:21 -0500 | [diff] [blame] | 2339 | if (np->tx_limit) { |
| 2340 | /* Limit the number of outstanding tx. Setup all fragments, but |
| 2341 | * do not set the VALID bit on the first descriptor. Save a pointer |
| 2342 | * to that descriptor and also for next skb_map element. |
| 2343 | */ |
| 2344 | |
| 2345 | if (np->tx_pkts_in_progress == NV_TX_LIMIT_COUNT) { |
| 2346 | if (!np->tx_change_owner) |
| 2347 | np->tx_change_owner = start_tx_ctx; |
| 2348 | |
| 2349 | /* remove VALID bit */ |
| 2350 | tx_flags &= ~NV_TX2_VALID; |
| 2351 | start_tx_ctx->first_tx_desc = start_tx; |
| 2352 | start_tx_ctx->next_tx_ctx = np->put_tx_ctx; |
| 2353 | np->tx_end_flip = np->put_tx_ctx; |
| 2354 | } else { |
| 2355 | np->tx_pkts_in_progress++; |
| 2356 | } |
| 2357 | } |
| 2358 | |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2359 | /* set tx flags */ |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2360 | start_tx->flaglen |= cpu_to_le32(tx_flags | tx_flags_extra); |
| 2361 | np->put_tx.ex = put_tx; |
| 2362 | |
Ingo Molnar | bd6ca63 | 2008-03-28 14:41:30 -0700 | [diff] [blame] | 2363 | spin_unlock_irqrestore(&np->lock, flags); |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2364 | |
| 2365 | dprintk(KERN_DEBUG "%s: nv_start_xmit_optimized: entries %d queued for transmission. tx_flags_extra: %x\n", |
| 2366 | dev->name, entries, tx_flags_extra); |
| 2367 | { |
| 2368 | int j; |
| 2369 | for (j=0; j<64; j++) { |
| 2370 | if ((j%16) == 0) |
| 2371 | dprintk("\n%03x:", j); |
| 2372 | dprintk(" %02x", ((unsigned char*)skb->data)[j]); |
| 2373 | } |
| 2374 | dprintk("\n"); |
| 2375 | } |
| 2376 | |
| 2377 | dev->trans_start = jiffies; |
| 2378 | writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl); |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2379 | return NETDEV_TX_OK; |
| 2380 | } |
| 2381 | |
Ayaz Abdulla | 3b446c3 | 2008-03-10 14:58:21 -0500 | [diff] [blame] | 2382 | static inline void nv_tx_flip_ownership(struct net_device *dev) |
| 2383 | { |
| 2384 | struct fe_priv *np = netdev_priv(dev); |
| 2385 | |
| 2386 | np->tx_pkts_in_progress--; |
| 2387 | if (np->tx_change_owner) { |
Al Viro | 30ecce9 | 2008-03-26 05:57:12 +0000 | [diff] [blame] | 2388 | np->tx_change_owner->first_tx_desc->flaglen |= |
| 2389 | cpu_to_le32(NV_TX2_VALID); |
Ayaz Abdulla | 3b446c3 | 2008-03-10 14:58:21 -0500 | [diff] [blame] | 2390 | np->tx_pkts_in_progress++; |
| 2391 | |
| 2392 | np->tx_change_owner = np->tx_change_owner->next_tx_ctx; |
| 2393 | if (np->tx_change_owner == np->tx_end_flip) |
| 2394 | np->tx_change_owner = NULL; |
| 2395 | |
| 2396 | writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl); |
| 2397 | } |
| 2398 | } |
| 2399 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2400 | /* |
| 2401 | * nv_tx_done: check for completed packets, release the skbs. |
| 2402 | * |
| 2403 | * Caller must own np->lock. |
| 2404 | */ |
Ayaz Abdulla | 33912e7 | 2009-03-05 08:02:10 +0000 | [diff] [blame] | 2405 | static int nv_tx_done(struct net_device *dev, int limit) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2406 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 2407 | struct fe_priv *np = netdev_priv(dev); |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 2408 | u32 flags; |
Ayaz Abdulla | 33912e7 | 2009-03-05 08:02:10 +0000 | [diff] [blame] | 2409 | int tx_work = 0; |
Ayaz Abdulla | aaa37d2 | 2007-01-21 18:10:42 -0500 | [diff] [blame] | 2410 | struct ring_desc* orig_get_tx = np->get_tx.orig; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2411 | |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2412 | while ((np->get_tx.orig != np->put_tx.orig) && |
Ayaz Abdulla | 33912e7 | 2009-03-05 08:02:10 +0000 | [diff] [blame] | 2413 | !((flags = le32_to_cpu(np->get_tx.orig->flaglen)) & NV_TX_VALID) && |
| 2414 | (tx_work < limit)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2415 | |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 2416 | dprintk(KERN_DEBUG "%s: nv_tx_done: flags 0x%x.\n", |
| 2417 | dev->name, flags); |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2418 | |
| 2419 | pci_unmap_page(np->pci_dev, np->get_tx_ctx->dma, |
| 2420 | np->get_tx_ctx->dma_len, |
| 2421 | PCI_DMA_TODEVICE); |
| 2422 | np->get_tx_ctx->dma = 0; |
| 2423 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2424 | if (np->desc_ver == DESC_VER_1) { |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 2425 | if (flags & NV_TX_LASTPACKET) { |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2426 | if (flags & NV_TX_ERROR) { |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 2427 | if (flags & NV_TX_UNDERFLOW) |
Jeff Garzik | 8148ff4 | 2007-10-16 20:56:09 -0400 | [diff] [blame] | 2428 | dev->stats.tx_fifo_errors++; |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 2429 | if (flags & NV_TX_CARRIERLOST) |
Jeff Garzik | 8148ff4 | 2007-10-16 20:56:09 -0400 | [diff] [blame] | 2430 | dev->stats.tx_carrier_errors++; |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 2431 | if ((flags & NV_TX_RETRYERROR) && !(flags & NV_TX_RETRYCOUNT_MASK)) |
| 2432 | nv_legacybackoff_reseed(dev); |
Jeff Garzik | 8148ff4 | 2007-10-16 20:56:09 -0400 | [diff] [blame] | 2433 | dev->stats.tx_errors++; |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 2434 | } else { |
Jeff Garzik | 8148ff4 | 2007-10-16 20:56:09 -0400 | [diff] [blame] | 2435 | dev->stats.tx_packets++; |
| 2436 | dev->stats.tx_bytes += np->get_tx_ctx->skb->len; |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 2437 | } |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2438 | dev_kfree_skb_any(np->get_tx_ctx->skb); |
| 2439 | np->get_tx_ctx->skb = NULL; |
Ayaz Abdulla | 33912e7 | 2009-03-05 08:02:10 +0000 | [diff] [blame] | 2440 | tx_work++; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2441 | } |
| 2442 | } else { |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 2443 | if (flags & NV_TX2_LASTPACKET) { |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2444 | if (flags & NV_TX2_ERROR) { |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 2445 | if (flags & NV_TX2_UNDERFLOW) |
Jeff Garzik | 8148ff4 | 2007-10-16 20:56:09 -0400 | [diff] [blame] | 2446 | dev->stats.tx_fifo_errors++; |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 2447 | if (flags & NV_TX2_CARRIERLOST) |
Jeff Garzik | 8148ff4 | 2007-10-16 20:56:09 -0400 | [diff] [blame] | 2448 | dev->stats.tx_carrier_errors++; |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 2449 | if ((flags & NV_TX2_RETRYERROR) && !(flags & NV_TX2_RETRYCOUNT_MASK)) |
| 2450 | nv_legacybackoff_reseed(dev); |
Jeff Garzik | 8148ff4 | 2007-10-16 20:56:09 -0400 | [diff] [blame] | 2451 | dev->stats.tx_errors++; |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 2452 | } else { |
Jeff Garzik | 8148ff4 | 2007-10-16 20:56:09 -0400 | [diff] [blame] | 2453 | dev->stats.tx_packets++; |
| 2454 | dev->stats.tx_bytes += np->get_tx_ctx->skb->len; |
Jeff Garzik | f3b197a | 2006-05-26 21:39:03 -0400 | [diff] [blame] | 2455 | } |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2456 | dev_kfree_skb_any(np->get_tx_ctx->skb); |
| 2457 | np->get_tx_ctx->skb = NULL; |
Ayaz Abdulla | 33912e7 | 2009-03-05 08:02:10 +0000 | [diff] [blame] | 2458 | tx_work++; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2459 | } |
| 2460 | } |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2461 | if (unlikely(np->get_tx.orig++ == np->last_tx.orig)) |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2462 | np->get_tx.orig = np->first_tx.orig; |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2463 | if (unlikely(np->get_tx_ctx++ == np->last_tx_ctx)) |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2464 | np->get_tx_ctx = np->first_tx_ctx; |
| 2465 | } |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2466 | if (unlikely((np->tx_stop == 1) && (np->get_tx.orig != orig_get_tx))) { |
Ayaz Abdulla | aaa37d2 | 2007-01-21 18:10:42 -0500 | [diff] [blame] | 2467 | np->tx_stop = 0; |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2468 | netif_wake_queue(dev); |
Ayaz Abdulla | aaa37d2 | 2007-01-21 18:10:42 -0500 | [diff] [blame] | 2469 | } |
Ayaz Abdulla | 33912e7 | 2009-03-05 08:02:10 +0000 | [diff] [blame] | 2470 | return tx_work; |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2471 | } |
| 2472 | |
Ayaz Abdulla | 33912e7 | 2009-03-05 08:02:10 +0000 | [diff] [blame] | 2473 | static int nv_tx_done_optimized(struct net_device *dev, int limit) |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2474 | { |
| 2475 | struct fe_priv *np = netdev_priv(dev); |
| 2476 | u32 flags; |
Ayaz Abdulla | 33912e7 | 2009-03-05 08:02:10 +0000 | [diff] [blame] | 2477 | int tx_work = 0; |
Ayaz Abdulla | aaa37d2 | 2007-01-21 18:10:42 -0500 | [diff] [blame] | 2478 | struct ring_desc_ex* orig_get_tx = np->get_tx.ex; |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2479 | |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2480 | while ((np->get_tx.ex != np->put_tx.ex) && |
Ayaz Abdulla | 4e16ed1 | 2007-01-23 12:00:56 -0500 | [diff] [blame] | 2481 | !((flags = le32_to_cpu(np->get_tx.ex->flaglen)) & NV_TX_VALID) && |
Ayaz Abdulla | 33912e7 | 2009-03-05 08:02:10 +0000 | [diff] [blame] | 2482 | (tx_work < limit)) { |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2483 | |
| 2484 | dprintk(KERN_DEBUG "%s: nv_tx_done_optimized: flags 0x%x.\n", |
| 2485 | dev->name, flags); |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2486 | |
| 2487 | pci_unmap_page(np->pci_dev, np->get_tx_ctx->dma, |
| 2488 | np->get_tx_ctx->dma_len, |
| 2489 | PCI_DMA_TODEVICE); |
| 2490 | np->get_tx_ctx->dma = 0; |
| 2491 | |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2492 | if (flags & NV_TX2_LASTPACKET) { |
Ayaz Abdulla | 2182816 | 2007-01-23 12:27:21 -0500 | [diff] [blame] | 2493 | if (!(flags & NV_TX2_ERROR)) |
Jeff Garzik | 8148ff4 | 2007-10-16 20:56:09 -0400 | [diff] [blame] | 2494 | dev->stats.tx_packets++; |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 2495 | else { |
| 2496 | if ((flags & NV_TX2_RETRYERROR) && !(flags & NV_TX2_RETRYCOUNT_MASK)) { |
| 2497 | if (np->driver_data & DEV_HAS_GEAR_MODE) |
| 2498 | nv_gear_backoff_reseed(dev); |
| 2499 | else |
| 2500 | nv_legacybackoff_reseed(dev); |
| 2501 | } |
| 2502 | } |
| 2503 | |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2504 | dev_kfree_skb_any(np->get_tx_ctx->skb); |
| 2505 | np->get_tx_ctx->skb = NULL; |
Ayaz Abdulla | 33912e7 | 2009-03-05 08:02:10 +0000 | [diff] [blame] | 2506 | tx_work++; |
Ayaz Abdulla | 3b446c3 | 2008-03-10 14:58:21 -0500 | [diff] [blame] | 2507 | |
| 2508 | if (np->tx_limit) { |
| 2509 | nv_tx_flip_ownership(dev); |
| 2510 | } |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 2511 | } |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2512 | if (unlikely(np->get_tx.ex++ == np->last_tx.ex)) |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2513 | np->get_tx.ex = np->first_tx.ex; |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2514 | if (unlikely(np->get_tx_ctx++ == np->last_tx_ctx)) |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 2515 | np->get_tx_ctx = np->first_tx_ctx; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2516 | } |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2517 | if (unlikely((np->tx_stop == 1) && (np->get_tx.ex != orig_get_tx))) { |
Ayaz Abdulla | aaa37d2 | 2007-01-21 18:10:42 -0500 | [diff] [blame] | 2518 | np->tx_stop = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2519 | netif_wake_queue(dev); |
Ayaz Abdulla | aaa37d2 | 2007-01-21 18:10:42 -0500 | [diff] [blame] | 2520 | } |
Ayaz Abdulla | 33912e7 | 2009-03-05 08:02:10 +0000 | [diff] [blame] | 2521 | return tx_work; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2522 | } |
| 2523 | |
| 2524 | /* |
| 2525 | * nv_tx_timeout: dev->tx_timeout function |
Herbert Xu | 932ff27 | 2006-06-09 12:20:56 -0700 | [diff] [blame] | 2526 | * Called with netif_tx_lock held. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2527 | */ |
| 2528 | static void nv_tx_timeout(struct net_device *dev) |
| 2529 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 2530 | struct fe_priv *np = netdev_priv(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2531 | u8 __iomem *base = get_hwbase(dev); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 2532 | u32 status; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2533 | |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 2534 | if (np->msi_flags & NV_MSI_X_ENABLED) |
| 2535 | status = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQSTAT_MASK; |
| 2536 | else |
| 2537 | status = readl(base + NvRegIrqStatus) & NVREG_IRQSTAT_MASK; |
| 2538 | |
| 2539 | printk(KERN_INFO "%s: Got tx_timeout. irq: %08x\n", dev->name, status); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2540 | |
Manfred Spraul | c2dba06 | 2005-07-31 18:29:47 +0200 | [diff] [blame] | 2541 | { |
| 2542 | int i; |
| 2543 | |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 2544 | printk(KERN_INFO "%s: Ring at %lx\n", |
| 2545 | dev->name, (unsigned long)np->ring_addr); |
Manfred Spraul | c2dba06 | 2005-07-31 18:29:47 +0200 | [diff] [blame] | 2546 | printk(KERN_INFO "%s: Dumping tx registers\n", dev->name); |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 2547 | for (i=0;i<=np->register_size;i+= 32) { |
Manfred Spraul | c2dba06 | 2005-07-31 18:29:47 +0200 | [diff] [blame] | 2548 | printk(KERN_INFO "%3x: %08x %08x %08x %08x %08x %08x %08x %08x\n", |
| 2549 | i, |
| 2550 | readl(base + i + 0), readl(base + i + 4), |
| 2551 | readl(base + i + 8), readl(base + i + 12), |
| 2552 | readl(base + i + 16), readl(base + i + 20), |
| 2553 | readl(base + i + 24), readl(base + i + 28)); |
| 2554 | } |
| 2555 | printk(KERN_INFO "%s: Dumping tx ring\n", dev->name); |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 2556 | for (i=0;i<np->tx_ring_size;i+= 4) { |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 2557 | if (!nv_optimized(np)) { |
Manfred Spraul | ee73362 | 2005-07-31 18:32:26 +0200 | [diff] [blame] | 2558 | printk(KERN_INFO "%03x: %08x %08x // %08x %08x // %08x %08x // %08x %08x\n", |
Jeff Garzik | f3b197a | 2006-05-26 21:39:03 -0400 | [diff] [blame] | 2559 | i, |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 2560 | le32_to_cpu(np->tx_ring.orig[i].buf), |
| 2561 | le32_to_cpu(np->tx_ring.orig[i].flaglen), |
| 2562 | le32_to_cpu(np->tx_ring.orig[i+1].buf), |
| 2563 | le32_to_cpu(np->tx_ring.orig[i+1].flaglen), |
| 2564 | le32_to_cpu(np->tx_ring.orig[i+2].buf), |
| 2565 | le32_to_cpu(np->tx_ring.orig[i+2].flaglen), |
| 2566 | le32_to_cpu(np->tx_ring.orig[i+3].buf), |
| 2567 | le32_to_cpu(np->tx_ring.orig[i+3].flaglen)); |
Manfred Spraul | ee73362 | 2005-07-31 18:32:26 +0200 | [diff] [blame] | 2568 | } else { |
| 2569 | printk(KERN_INFO "%03x: %08x %08x %08x // %08x %08x %08x // %08x %08x %08x // %08x %08x %08x\n", |
Jeff Garzik | f3b197a | 2006-05-26 21:39:03 -0400 | [diff] [blame] | 2570 | i, |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 2571 | le32_to_cpu(np->tx_ring.ex[i].bufhigh), |
| 2572 | le32_to_cpu(np->tx_ring.ex[i].buflow), |
| 2573 | le32_to_cpu(np->tx_ring.ex[i].flaglen), |
| 2574 | le32_to_cpu(np->tx_ring.ex[i+1].bufhigh), |
| 2575 | le32_to_cpu(np->tx_ring.ex[i+1].buflow), |
| 2576 | le32_to_cpu(np->tx_ring.ex[i+1].flaglen), |
| 2577 | le32_to_cpu(np->tx_ring.ex[i+2].bufhigh), |
| 2578 | le32_to_cpu(np->tx_ring.ex[i+2].buflow), |
| 2579 | le32_to_cpu(np->tx_ring.ex[i+2].flaglen), |
| 2580 | le32_to_cpu(np->tx_ring.ex[i+3].bufhigh), |
| 2581 | le32_to_cpu(np->tx_ring.ex[i+3].buflow), |
| 2582 | le32_to_cpu(np->tx_ring.ex[i+3].flaglen)); |
Manfred Spraul | ee73362 | 2005-07-31 18:32:26 +0200 | [diff] [blame] | 2583 | } |
Manfred Spraul | c2dba06 | 2005-07-31 18:29:47 +0200 | [diff] [blame] | 2584 | } |
| 2585 | } |
| 2586 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2587 | spin_lock_irq(&np->lock); |
| 2588 | |
| 2589 | /* 1) stop tx engine */ |
| 2590 | nv_stop_tx(dev); |
| 2591 | |
| 2592 | /* 2) check that the packets were not sent already: */ |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 2593 | if (!nv_optimized(np)) |
Ayaz Abdulla | 33912e7 | 2009-03-05 08:02:10 +0000 | [diff] [blame] | 2594 | nv_tx_done(dev, np->tx_ring_size); |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2595 | else |
Ayaz Abdulla | 4e16ed1 | 2007-01-23 12:00:56 -0500 | [diff] [blame] | 2596 | nv_tx_done_optimized(dev, np->tx_ring_size); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2597 | |
| 2598 | /* 3) if there are dead entries: clear everything */ |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 2599 | if (np->get_tx_ctx != np->put_tx_ctx) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2600 | printk(KERN_DEBUG "%s: tx_timeout: dead entries!\n", dev->name); |
| 2601 | nv_drain_tx(dev); |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 2602 | nv_init_tx(dev); |
Ayaz Abdulla | 0832b25 | 2006-02-04 13:13:26 -0500 | [diff] [blame] | 2603 | setup_hw_rings(dev, NV_SETUP_TX_RING); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2604 | } |
| 2605 | |
Ayaz Abdulla | 3ba4d09 | 2007-03-23 05:50:02 -0500 | [diff] [blame] | 2606 | netif_wake_queue(dev); |
| 2607 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2608 | /* 4) restart tx engine */ |
| 2609 | nv_start_tx(dev); |
| 2610 | spin_unlock_irq(&np->lock); |
| 2611 | } |
| 2612 | |
Manfred Spraul | 22c6d14 | 2005-04-19 21:17:09 +0200 | [diff] [blame] | 2613 | /* |
| 2614 | * Called when the nic notices a mismatch between the actual data len on the |
| 2615 | * wire and the len indicated in the 802 header |
| 2616 | */ |
| 2617 | static int nv_getlen(struct net_device *dev, void *packet, int datalen) |
| 2618 | { |
| 2619 | int hdrlen; /* length of the 802 header */ |
| 2620 | int protolen; /* length as stored in the proto field */ |
| 2621 | |
| 2622 | /* 1) calculate len according to header */ |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 2623 | if ( ((struct vlan_ethhdr *)packet)->h_vlan_proto == htons(ETH_P_8021Q)) { |
Manfred Spraul | 22c6d14 | 2005-04-19 21:17:09 +0200 | [diff] [blame] | 2624 | protolen = ntohs( ((struct vlan_ethhdr *)packet)->h_vlan_encapsulated_proto ); |
| 2625 | hdrlen = VLAN_HLEN; |
| 2626 | } else { |
| 2627 | protolen = ntohs( ((struct ethhdr *)packet)->h_proto); |
| 2628 | hdrlen = ETH_HLEN; |
| 2629 | } |
| 2630 | dprintk(KERN_DEBUG "%s: nv_getlen: datalen %d, protolen %d, hdrlen %d\n", |
| 2631 | dev->name, datalen, protolen, hdrlen); |
| 2632 | if (protolen > ETH_DATA_LEN) |
| 2633 | return datalen; /* Value in proto field not a len, no checks possible */ |
| 2634 | |
| 2635 | protolen += hdrlen; |
| 2636 | /* consistency checks: */ |
| 2637 | if (datalen > ETH_ZLEN) { |
| 2638 | if (datalen >= protolen) { |
| 2639 | /* more data on wire than in 802 header, trim of |
| 2640 | * additional data. |
| 2641 | */ |
| 2642 | dprintk(KERN_DEBUG "%s: nv_getlen: accepting %d bytes.\n", |
| 2643 | dev->name, protolen); |
| 2644 | return protolen; |
| 2645 | } else { |
| 2646 | /* less data on wire than mentioned in header. |
| 2647 | * Discard the packet. |
| 2648 | */ |
| 2649 | dprintk(KERN_DEBUG "%s: nv_getlen: discarding long packet.\n", |
| 2650 | dev->name); |
| 2651 | return -1; |
| 2652 | } |
| 2653 | } else { |
| 2654 | /* short packet. Accept only if 802 values are also short */ |
| 2655 | if (protolen > ETH_ZLEN) { |
| 2656 | dprintk(KERN_DEBUG "%s: nv_getlen: discarding short packet.\n", |
| 2657 | dev->name); |
| 2658 | return -1; |
| 2659 | } |
| 2660 | dprintk(KERN_DEBUG "%s: nv_getlen: accepting %d bytes.\n", |
| 2661 | dev->name, datalen); |
| 2662 | return datalen; |
| 2663 | } |
| 2664 | } |
| 2665 | |
Stephen Hemminger | e27cdba | 2006-07-31 20:37:19 -0700 | [diff] [blame] | 2666 | static int nv_rx_process(struct net_device *dev, int limit) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2667 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 2668 | struct fe_priv *np = netdev_priv(dev); |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 2669 | u32 flags; |
Ingo Molnar | bcb5feb | 2007-10-16 20:44:59 -0400 | [diff] [blame] | 2670 | int rx_work = 0; |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2671 | struct sk_buff *skb; |
| 2672 | int len; |
Ayaz Abdulla | ee407b0 | 2006-02-04 13:13:17 -0500 | [diff] [blame] | 2673 | |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2674 | while((np->get_rx.orig != np->put_rx.orig) && |
| 2675 | !((flags = le32_to_cpu(np->get_rx.orig->flaglen)) & NV_RX_AVAIL) && |
Ingo Molnar | bcb5feb | 2007-10-16 20:44:59 -0400 | [diff] [blame] | 2676 | (rx_work < limit)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2677 | |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 2678 | dprintk(KERN_DEBUG "%s: nv_rx_process: flags 0x%x.\n", |
| 2679 | dev->name, flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2680 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2681 | /* |
| 2682 | * the packet is for us - immediately tear down the pci mapping. |
| 2683 | * TODO: check if a prefetch of the first cacheline improves |
| 2684 | * the performance. |
| 2685 | */ |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 2686 | pci_unmap_single(np->pci_dev, np->get_rx_ctx->dma, |
| 2687 | np->get_rx_ctx->dma_len, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2688 | PCI_DMA_FROMDEVICE); |
Ayaz Abdulla | 0d63fb3 | 2007-01-09 13:30:13 -0500 | [diff] [blame] | 2689 | skb = np->get_rx_ctx->skb; |
| 2690 | np->get_rx_ctx->skb = NULL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2691 | |
| 2692 | { |
| 2693 | int j; |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 2694 | dprintk(KERN_DEBUG "Dumping packet (flags 0x%x).",flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2695 | for (j=0; j<64; j++) { |
| 2696 | if ((j%16) == 0) |
| 2697 | dprintk("\n%03x:", j); |
Ayaz Abdulla | 0d63fb3 | 2007-01-09 13:30:13 -0500 | [diff] [blame] | 2698 | dprintk(" %02x", ((unsigned char*)skb->data)[j]); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2699 | } |
| 2700 | dprintk("\n"); |
| 2701 | } |
| 2702 | /* look at what we actually got: */ |
| 2703 | if (np->desc_ver == DESC_VER_1) { |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2704 | if (likely(flags & NV_RX_DESCRIPTORVALID)) { |
| 2705 | len = flags & LEN_MASK_V1; |
| 2706 | if (unlikely(flags & NV_RX_ERROR)) { |
Ayaz Abdulla | 1ef6841 | 2008-08-06 12:11:03 -0400 | [diff] [blame] | 2707 | if ((flags & NV_RX_ERROR_MASK) == NV_RX_ERROR4) { |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2708 | len = nv_getlen(dev, skb->data, len); |
| 2709 | if (len < 0) { |
Jeff Garzik | 8148ff4 | 2007-10-16 20:56:09 -0400 | [diff] [blame] | 2710 | dev->stats.rx_errors++; |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2711 | dev_kfree_skb(skb); |
| 2712 | goto next_pkt; |
| 2713 | } |
| 2714 | } |
| 2715 | /* framing errors are soft errors */ |
Ayaz Abdulla | 1ef6841 | 2008-08-06 12:11:03 -0400 | [diff] [blame] | 2716 | else if ((flags & NV_RX_ERROR_MASK) == NV_RX_FRAMINGERR) { |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2717 | if (flags & NV_RX_SUBSTRACT1) { |
| 2718 | len--; |
| 2719 | } |
| 2720 | } |
| 2721 | /* the rest are hard errors */ |
| 2722 | else { |
| 2723 | if (flags & NV_RX_MISSEDFRAME) |
Jeff Garzik | 8148ff4 | 2007-10-16 20:56:09 -0400 | [diff] [blame] | 2724 | dev->stats.rx_missed_errors++; |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2725 | if (flags & NV_RX_CRCERR) |
Jeff Garzik | 8148ff4 | 2007-10-16 20:56:09 -0400 | [diff] [blame] | 2726 | dev->stats.rx_crc_errors++; |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2727 | if (flags & NV_RX_OVERFLOW) |
Jeff Garzik | 8148ff4 | 2007-10-16 20:56:09 -0400 | [diff] [blame] | 2728 | dev->stats.rx_over_errors++; |
| 2729 | dev->stats.rx_errors++; |
Ayaz Abdulla | 0d63fb3 | 2007-01-09 13:30:13 -0500 | [diff] [blame] | 2730 | dev_kfree_skb(skb); |
Ayaz Abdulla | a971c32 | 2005-11-11 08:30:38 -0500 | [diff] [blame] | 2731 | goto next_pkt; |
| 2732 | } |
| 2733 | } |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2734 | } else { |
| 2735 | dev_kfree_skb(skb); |
| 2736 | goto next_pkt; |
Manfred Spraul | 22c6d14 | 2005-04-19 21:17:09 +0200 | [diff] [blame] | 2737 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2738 | } else { |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2739 | if (likely(flags & NV_RX2_DESCRIPTORVALID)) { |
| 2740 | len = flags & LEN_MASK_V2; |
| 2741 | if (unlikely(flags & NV_RX2_ERROR)) { |
Ayaz Abdulla | 1ef6841 | 2008-08-06 12:11:03 -0400 | [diff] [blame] | 2742 | if ((flags & NV_RX2_ERROR_MASK) == NV_RX2_ERROR4) { |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2743 | len = nv_getlen(dev, skb->data, len); |
| 2744 | if (len < 0) { |
Jeff Garzik | 8148ff4 | 2007-10-16 20:56:09 -0400 | [diff] [blame] | 2745 | dev->stats.rx_errors++; |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2746 | dev_kfree_skb(skb); |
| 2747 | goto next_pkt; |
| 2748 | } |
| 2749 | } |
| 2750 | /* framing errors are soft errors */ |
Ayaz Abdulla | 1ef6841 | 2008-08-06 12:11:03 -0400 | [diff] [blame] | 2751 | else if ((flags & NV_RX2_ERROR_MASK) == NV_RX2_FRAMINGERR) { |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2752 | if (flags & NV_RX2_SUBSTRACT1) { |
| 2753 | len--; |
| 2754 | } |
| 2755 | } |
| 2756 | /* the rest are hard errors */ |
| 2757 | else { |
| 2758 | if (flags & NV_RX2_CRCERR) |
Jeff Garzik | 8148ff4 | 2007-10-16 20:56:09 -0400 | [diff] [blame] | 2759 | dev->stats.rx_crc_errors++; |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2760 | if (flags & NV_RX2_OVERFLOW) |
Jeff Garzik | 8148ff4 | 2007-10-16 20:56:09 -0400 | [diff] [blame] | 2761 | dev->stats.rx_over_errors++; |
| 2762 | dev->stats.rx_errors++; |
Ayaz Abdulla | 0d63fb3 | 2007-01-09 13:30:13 -0500 | [diff] [blame] | 2763 | dev_kfree_skb(skb); |
Ayaz Abdulla | a971c32 | 2005-11-11 08:30:38 -0500 | [diff] [blame] | 2764 | goto next_pkt; |
| 2765 | } |
| 2766 | } |
Ayaz Abdulla | bfaffe8 | 2008-01-13 16:02:55 -0500 | [diff] [blame] | 2767 | if (((flags & NV_RX2_CHECKSUMMASK) == NV_RX2_CHECKSUM_IP_TCP) || /*ip and tcp */ |
| 2768 | ((flags & NV_RX2_CHECKSUMMASK) == NV_RX2_CHECKSUM_IP_UDP)) /*ip and udp */ |
Ayaz Abdulla | 0d63fb3 | 2007-01-09 13:30:13 -0500 | [diff] [blame] | 2769 | skb->ip_summed = CHECKSUM_UNNECESSARY; |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2770 | } else { |
| 2771 | dev_kfree_skb(skb); |
| 2772 | goto next_pkt; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2773 | } |
| 2774 | } |
| 2775 | /* got a valid packet - forward it to the network core */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2776 | skb_put(skb, len); |
| 2777 | skb->protocol = eth_type_trans(skb, dev); |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 2778 | dprintk(KERN_DEBUG "%s: nv_rx_process: %d bytes, proto %d accepted.\n", |
| 2779 | dev->name, len, skb->protocol); |
Stephen Hemminger | e27cdba | 2006-07-31 20:37:19 -0700 | [diff] [blame] | 2780 | #ifdef CONFIG_FORCEDETH_NAPI |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2781 | netif_receive_skb(skb); |
Stephen Hemminger | e27cdba | 2006-07-31 20:37:19 -0700 | [diff] [blame] | 2782 | #else |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2783 | netif_rx(skb); |
Stephen Hemminger | e27cdba | 2006-07-31 20:37:19 -0700 | [diff] [blame] | 2784 | #endif |
Jeff Garzik | 8148ff4 | 2007-10-16 20:56:09 -0400 | [diff] [blame] | 2785 | dev->stats.rx_packets++; |
| 2786 | dev->stats.rx_bytes += len; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2787 | next_pkt: |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2788 | if (unlikely(np->get_rx.orig++ == np->last_rx.orig)) |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2789 | np->get_rx.orig = np->first_rx.orig; |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2790 | if (unlikely(np->get_rx_ctx++ == np->last_rx_ctx)) |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2791 | np->get_rx_ctx = np->first_rx_ctx; |
Ingo Molnar | bcb5feb | 2007-10-16 20:44:59 -0400 | [diff] [blame] | 2792 | |
| 2793 | rx_work++; |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2794 | } |
| 2795 | |
Ingo Molnar | bcb5feb | 2007-10-16 20:44:59 -0400 | [diff] [blame] | 2796 | return rx_work; |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2797 | } |
| 2798 | |
| 2799 | static int nv_rx_process_optimized(struct net_device *dev, int limit) |
| 2800 | { |
| 2801 | struct fe_priv *np = netdev_priv(dev); |
| 2802 | u32 flags; |
| 2803 | u32 vlanflags = 0; |
Ingo Molnar | c1b7151 | 2007-10-17 12:18:23 +0200 | [diff] [blame] | 2804 | int rx_work = 0; |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2805 | struct sk_buff *skb; |
| 2806 | int len; |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2807 | |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2808 | while((np->get_rx.ex != np->put_rx.ex) && |
| 2809 | !((flags = le32_to_cpu(np->get_rx.ex->flaglen)) & NV_RX2_AVAIL) && |
Ingo Molnar | c1b7151 | 2007-10-17 12:18:23 +0200 | [diff] [blame] | 2810 | (rx_work < limit)) { |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2811 | |
| 2812 | dprintk(KERN_DEBUG "%s: nv_rx_process_optimized: flags 0x%x.\n", |
| 2813 | dev->name, flags); |
| 2814 | |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2815 | /* |
| 2816 | * the packet is for us - immediately tear down the pci mapping. |
| 2817 | * TODO: check if a prefetch of the first cacheline improves |
| 2818 | * the performance. |
| 2819 | */ |
| 2820 | pci_unmap_single(np->pci_dev, np->get_rx_ctx->dma, |
| 2821 | np->get_rx_ctx->dma_len, |
| 2822 | PCI_DMA_FROMDEVICE); |
| 2823 | skb = np->get_rx_ctx->skb; |
| 2824 | np->get_rx_ctx->skb = NULL; |
| 2825 | |
| 2826 | { |
| 2827 | int j; |
| 2828 | dprintk(KERN_DEBUG "Dumping packet (flags 0x%x).",flags); |
| 2829 | for (j=0; j<64; j++) { |
| 2830 | if ((j%16) == 0) |
| 2831 | dprintk("\n%03x:", j); |
| 2832 | dprintk(" %02x", ((unsigned char*)skb->data)[j]); |
| 2833 | } |
| 2834 | dprintk("\n"); |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 2835 | } |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2836 | /* look at what we actually got: */ |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2837 | if (likely(flags & NV_RX2_DESCRIPTORVALID)) { |
| 2838 | len = flags & LEN_MASK_V2; |
| 2839 | if (unlikely(flags & NV_RX2_ERROR)) { |
Ayaz Abdulla | 1ef6841 | 2008-08-06 12:11:03 -0400 | [diff] [blame] | 2840 | if ((flags & NV_RX2_ERROR_MASK) == NV_RX2_ERROR4) { |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2841 | len = nv_getlen(dev, skb->data, len); |
| 2842 | if (len < 0) { |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2843 | dev_kfree_skb(skb); |
| 2844 | goto next_pkt; |
| 2845 | } |
| 2846 | } |
| 2847 | /* framing errors are soft errors */ |
Ayaz Abdulla | 1ef6841 | 2008-08-06 12:11:03 -0400 | [diff] [blame] | 2848 | else if ((flags & NV_RX2_ERROR_MASK) == NV_RX2_FRAMINGERR) { |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2849 | if (flags & NV_RX2_SUBSTRACT1) { |
| 2850 | len--; |
| 2851 | } |
| 2852 | } |
| 2853 | /* the rest are hard errors */ |
| 2854 | else { |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2855 | dev_kfree_skb(skb); |
| 2856 | goto next_pkt; |
| 2857 | } |
| 2858 | } |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2859 | |
Ayaz Abdulla | bfaffe8 | 2008-01-13 16:02:55 -0500 | [diff] [blame] | 2860 | if (((flags & NV_RX2_CHECKSUMMASK) == NV_RX2_CHECKSUM_IP_TCP) || /*ip and tcp */ |
| 2861 | ((flags & NV_RX2_CHECKSUMMASK) == NV_RX2_CHECKSUM_IP_UDP)) /*ip and udp */ |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2862 | skb->ip_summed = CHECKSUM_UNNECESSARY; |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2863 | |
| 2864 | /* got a valid packet - forward it to the network core */ |
| 2865 | skb_put(skb, len); |
| 2866 | skb->protocol = eth_type_trans(skb, dev); |
| 2867 | prefetch(skb->data); |
| 2868 | |
| 2869 | dprintk(KERN_DEBUG "%s: nv_rx_process_optimized: %d bytes, proto %d accepted.\n", |
| 2870 | dev->name, len, skb->protocol); |
| 2871 | |
| 2872 | if (likely(!np->vlangrp)) { |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2873 | #ifdef CONFIG_FORCEDETH_NAPI |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2874 | netif_receive_skb(skb); |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2875 | #else |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2876 | netif_rx(skb); |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2877 | #endif |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2878 | } else { |
| 2879 | vlanflags = le32_to_cpu(np->get_rx.ex->buflow); |
| 2880 | if (vlanflags & NV_RX3_VLAN_TAG_PRESENT) { |
| 2881 | #ifdef CONFIG_FORCEDETH_NAPI |
| 2882 | vlan_hwaccel_receive_skb(skb, np->vlangrp, |
| 2883 | vlanflags & NV_RX3_VLAN_TAG_MASK); |
| 2884 | #else |
| 2885 | vlan_hwaccel_rx(skb, np->vlangrp, |
| 2886 | vlanflags & NV_RX3_VLAN_TAG_MASK); |
| 2887 | #endif |
| 2888 | } else { |
| 2889 | #ifdef CONFIG_FORCEDETH_NAPI |
| 2890 | netif_receive_skb(skb); |
| 2891 | #else |
| 2892 | netif_rx(skb); |
| 2893 | #endif |
| 2894 | } |
| 2895 | } |
| 2896 | |
Jeff Garzik | 8148ff4 | 2007-10-16 20:56:09 -0400 | [diff] [blame] | 2897 | dev->stats.rx_packets++; |
| 2898 | dev->stats.rx_bytes += len; |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2899 | } else { |
| 2900 | dev_kfree_skb(skb); |
| 2901 | } |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2902 | next_pkt: |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2903 | if (unlikely(np->get_rx.ex++ == np->last_rx.ex)) |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2904 | np->get_rx.ex = np->first_rx.ex; |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2905 | if (unlikely(np->get_rx_ctx++ == np->last_rx_ctx)) |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 2906 | np->get_rx_ctx = np->first_rx_ctx; |
Ingo Molnar | c1b7151 | 2007-10-17 12:18:23 +0200 | [diff] [blame] | 2907 | |
| 2908 | rx_work++; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2909 | } |
Stephen Hemminger | e27cdba | 2006-07-31 20:37:19 -0700 | [diff] [blame] | 2910 | |
Ingo Molnar | c1b7151 | 2007-10-17 12:18:23 +0200 | [diff] [blame] | 2911 | return rx_work; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2912 | } |
| 2913 | |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 2914 | static void set_bufsize(struct net_device *dev) |
| 2915 | { |
| 2916 | struct fe_priv *np = netdev_priv(dev); |
| 2917 | |
| 2918 | if (dev->mtu <= ETH_DATA_LEN) |
| 2919 | np->rx_buf_sz = ETH_DATA_LEN + NV_RX_HEADERS; |
| 2920 | else |
| 2921 | np->rx_buf_sz = dev->mtu + NV_RX_HEADERS; |
| 2922 | } |
| 2923 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2924 | /* |
| 2925 | * nv_change_mtu: dev->change_mtu function |
| 2926 | * Called with dev_base_lock held for read. |
| 2927 | */ |
| 2928 | static int nv_change_mtu(struct net_device *dev, int new_mtu) |
| 2929 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 2930 | struct fe_priv *np = netdev_priv(dev); |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 2931 | int old_mtu; |
| 2932 | |
| 2933 | if (new_mtu < 64 || new_mtu > np->pkt_limit) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2934 | return -EINVAL; |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 2935 | |
| 2936 | old_mtu = dev->mtu; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2937 | dev->mtu = new_mtu; |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 2938 | |
| 2939 | /* return early if the buffer sizes will not change */ |
| 2940 | if (old_mtu <= ETH_DATA_LEN && new_mtu <= ETH_DATA_LEN) |
| 2941 | return 0; |
| 2942 | if (old_mtu == new_mtu) |
| 2943 | return 0; |
| 2944 | |
| 2945 | /* synchronized against open : rtnl_lock() held by caller */ |
| 2946 | if (netif_running(dev)) { |
viro@ftp.linux.org.uk | 25097d4 | 2005-09-06 01:36:58 +0100 | [diff] [blame] | 2947 | u8 __iomem *base = get_hwbase(dev); |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 2948 | /* |
| 2949 | * It seems that the nic preloads valid ring entries into an |
| 2950 | * internal buffer. The procedure for flushing everything is |
| 2951 | * guessed, there is probably a simpler approach. |
| 2952 | * Changing the MTU is a rare event, it shouldn't matter. |
| 2953 | */ |
Ayaz Abdulla | 84b3932 | 2006-05-20 14:59:48 -0700 | [diff] [blame] | 2954 | nv_disable_irq(dev); |
Ayaz Abdulla | 08d9357 | 2009-03-05 08:01:55 +0000 | [diff] [blame] | 2955 | nv_napi_disable(dev); |
Herbert Xu | 932ff27 | 2006-06-09 12:20:56 -0700 | [diff] [blame] | 2956 | netif_tx_lock_bh(dev); |
David S. Miller | e308a5d | 2008-07-15 00:13:44 -0700 | [diff] [blame] | 2957 | netif_addr_lock(dev); |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 2958 | spin_lock(&np->lock); |
| 2959 | /* stop engines */ |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 2960 | nv_stop_rxtx(dev); |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 2961 | nv_txrx_reset(dev); |
| 2962 | /* drain rx queue */ |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 2963 | nv_drain_rxtx(dev); |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 2964 | /* reinit driver view of the rx queue */ |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 2965 | set_bufsize(dev); |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 2966 | if (nv_init_ring(dev)) { |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 2967 | if (!np->in_shutdown) |
| 2968 | mod_timer(&np->oom_kick, jiffies + OOM_REFILL); |
| 2969 | } |
| 2970 | /* reinit nic view of the rx queue */ |
| 2971 | writel(np->rx_buf_sz, base + NvRegOffloadConfig); |
Ayaz Abdulla | 0832b25 | 2006-02-04 13:13:26 -0500 | [diff] [blame] | 2972 | setup_hw_rings(dev, NV_SETUP_RX_RING | NV_SETUP_TX_RING); |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 2973 | writel( ((np->rx_ring_size-1) << NVREG_RINGSZ_RXSHIFT) + ((np->tx_ring_size-1) << NVREG_RINGSZ_TXSHIFT), |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 2974 | base + NvRegRingSizes); |
| 2975 | pci_push(base); |
Manfred Spraul | 8a4ae7f | 2005-09-21 23:22:10 -0400 | [diff] [blame] | 2976 | writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl); |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 2977 | pci_push(base); |
| 2978 | |
| 2979 | /* restart rx engine */ |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 2980 | nv_start_rxtx(dev); |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 2981 | spin_unlock(&np->lock); |
David S. Miller | e308a5d | 2008-07-15 00:13:44 -0700 | [diff] [blame] | 2982 | netif_addr_unlock(dev); |
Herbert Xu | 932ff27 | 2006-06-09 12:20:56 -0700 | [diff] [blame] | 2983 | netif_tx_unlock_bh(dev); |
Ayaz Abdulla | 08d9357 | 2009-03-05 08:01:55 +0000 | [diff] [blame] | 2984 | nv_napi_enable(dev); |
Ayaz Abdulla | 84b3932 | 2006-05-20 14:59:48 -0700 | [diff] [blame] | 2985 | nv_enable_irq(dev); |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 2986 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2987 | return 0; |
| 2988 | } |
| 2989 | |
Manfred Spraul | 72b3178 | 2005-07-31 18:33:34 +0200 | [diff] [blame] | 2990 | static void nv_copy_mac_to_hw(struct net_device *dev) |
| 2991 | { |
viro@ftp.linux.org.uk | 25097d4 | 2005-09-06 01:36:58 +0100 | [diff] [blame] | 2992 | u8 __iomem *base = get_hwbase(dev); |
Manfred Spraul | 72b3178 | 2005-07-31 18:33:34 +0200 | [diff] [blame] | 2993 | u32 mac[2]; |
| 2994 | |
| 2995 | mac[0] = (dev->dev_addr[0] << 0) + (dev->dev_addr[1] << 8) + |
| 2996 | (dev->dev_addr[2] << 16) + (dev->dev_addr[3] << 24); |
| 2997 | mac[1] = (dev->dev_addr[4] << 0) + (dev->dev_addr[5] << 8); |
| 2998 | |
| 2999 | writel(mac[0], base + NvRegMacAddrA); |
| 3000 | writel(mac[1], base + NvRegMacAddrB); |
| 3001 | } |
| 3002 | |
| 3003 | /* |
| 3004 | * nv_set_mac_address: dev->set_mac_address function |
| 3005 | * Called with rtnl_lock() held. |
| 3006 | */ |
| 3007 | static int nv_set_mac_address(struct net_device *dev, void *addr) |
| 3008 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 3009 | struct fe_priv *np = netdev_priv(dev); |
Manfred Spraul | 72b3178 | 2005-07-31 18:33:34 +0200 | [diff] [blame] | 3010 | struct sockaddr *macaddr = (struct sockaddr*)addr; |
| 3011 | |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 3012 | if (!is_valid_ether_addr(macaddr->sa_data)) |
Manfred Spraul | 72b3178 | 2005-07-31 18:33:34 +0200 | [diff] [blame] | 3013 | return -EADDRNOTAVAIL; |
| 3014 | |
| 3015 | /* synchronized against open : rtnl_lock() held by caller */ |
| 3016 | memcpy(dev->dev_addr, macaddr->sa_data, ETH_ALEN); |
| 3017 | |
| 3018 | if (netif_running(dev)) { |
Herbert Xu | 932ff27 | 2006-06-09 12:20:56 -0700 | [diff] [blame] | 3019 | netif_tx_lock_bh(dev); |
David S. Miller | e308a5d | 2008-07-15 00:13:44 -0700 | [diff] [blame] | 3020 | netif_addr_lock(dev); |
Manfred Spraul | 72b3178 | 2005-07-31 18:33:34 +0200 | [diff] [blame] | 3021 | spin_lock_irq(&np->lock); |
| 3022 | |
| 3023 | /* stop rx engine */ |
| 3024 | nv_stop_rx(dev); |
| 3025 | |
| 3026 | /* set mac address */ |
| 3027 | nv_copy_mac_to_hw(dev); |
| 3028 | |
| 3029 | /* restart rx engine */ |
| 3030 | nv_start_rx(dev); |
| 3031 | spin_unlock_irq(&np->lock); |
David S. Miller | e308a5d | 2008-07-15 00:13:44 -0700 | [diff] [blame] | 3032 | netif_addr_unlock(dev); |
Herbert Xu | 932ff27 | 2006-06-09 12:20:56 -0700 | [diff] [blame] | 3033 | netif_tx_unlock_bh(dev); |
Manfred Spraul | 72b3178 | 2005-07-31 18:33:34 +0200 | [diff] [blame] | 3034 | } else { |
| 3035 | nv_copy_mac_to_hw(dev); |
| 3036 | } |
| 3037 | return 0; |
| 3038 | } |
| 3039 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3040 | /* |
| 3041 | * nv_set_multicast: dev->set_multicast function |
Herbert Xu | 932ff27 | 2006-06-09 12:20:56 -0700 | [diff] [blame] | 3042 | * Called with netif_tx_lock held. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3043 | */ |
| 3044 | static void nv_set_multicast(struct net_device *dev) |
| 3045 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 3046 | struct fe_priv *np = netdev_priv(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3047 | u8 __iomem *base = get_hwbase(dev); |
| 3048 | u32 addr[2]; |
| 3049 | u32 mask[2]; |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 3050 | u32 pff = readl(base + NvRegPacketFilterFlags) & NVREG_PFF_PAUSE_RX; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3051 | |
| 3052 | memset(addr, 0, sizeof(addr)); |
| 3053 | memset(mask, 0, sizeof(mask)); |
| 3054 | |
| 3055 | if (dev->flags & IFF_PROMISC) { |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 3056 | pff |= NVREG_PFF_PROMISC; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3057 | } else { |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 3058 | pff |= NVREG_PFF_MYADDR; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3059 | |
| 3060 | if (dev->flags & IFF_ALLMULTI || dev->mc_list) { |
| 3061 | u32 alwaysOff[2]; |
| 3062 | u32 alwaysOn[2]; |
| 3063 | |
| 3064 | alwaysOn[0] = alwaysOn[1] = alwaysOff[0] = alwaysOff[1] = 0xffffffff; |
| 3065 | if (dev->flags & IFF_ALLMULTI) { |
| 3066 | alwaysOn[0] = alwaysOn[1] = alwaysOff[0] = alwaysOff[1] = 0; |
| 3067 | } else { |
| 3068 | struct dev_mc_list *walk; |
| 3069 | |
| 3070 | walk = dev->mc_list; |
| 3071 | while (walk != NULL) { |
| 3072 | u32 a, b; |
Al Viro | 5bb7ea2 | 2007-12-09 16:06:41 +0000 | [diff] [blame] | 3073 | a = le32_to_cpu(*(__le32 *) walk->dmi_addr); |
| 3074 | b = le16_to_cpu(*(__le16 *) (&walk->dmi_addr[4])); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3075 | alwaysOn[0] &= a; |
| 3076 | alwaysOff[0] &= ~a; |
| 3077 | alwaysOn[1] &= b; |
| 3078 | alwaysOff[1] &= ~b; |
| 3079 | walk = walk->next; |
| 3080 | } |
| 3081 | } |
| 3082 | addr[0] = alwaysOn[0]; |
| 3083 | addr[1] = alwaysOn[1]; |
| 3084 | mask[0] = alwaysOn[0] | alwaysOff[0]; |
| 3085 | mask[1] = alwaysOn[1] | alwaysOff[1]; |
Ayaz Abdulla | bb9a4fd | 2008-01-13 16:03:04 -0500 | [diff] [blame] | 3086 | } else { |
| 3087 | mask[0] = NVREG_MCASTMASKA_NONE; |
| 3088 | mask[1] = NVREG_MCASTMASKB_NONE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3089 | } |
| 3090 | } |
| 3091 | addr[0] |= NVREG_MCASTADDRA_FORCE; |
| 3092 | pff |= NVREG_PFF_ALWAYS; |
| 3093 | spin_lock_irq(&np->lock); |
| 3094 | nv_stop_rx(dev); |
| 3095 | writel(addr[0], base + NvRegMulticastAddrA); |
| 3096 | writel(addr[1], base + NvRegMulticastAddrB); |
| 3097 | writel(mask[0], base + NvRegMulticastMaskA); |
| 3098 | writel(mask[1], base + NvRegMulticastMaskB); |
| 3099 | writel(pff, base + NvRegPacketFilterFlags); |
| 3100 | dprintk(KERN_INFO "%s: reconfiguration for multicast lists.\n", |
| 3101 | dev->name); |
| 3102 | nv_start_rx(dev); |
| 3103 | spin_unlock_irq(&np->lock); |
| 3104 | } |
| 3105 | |
Adrian Bunk | c798505 | 2006-06-22 12:03:29 +0200 | [diff] [blame] | 3106 | static void nv_update_pause(struct net_device *dev, u32 pause_flags) |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 3107 | { |
| 3108 | struct fe_priv *np = netdev_priv(dev); |
| 3109 | u8 __iomem *base = get_hwbase(dev); |
| 3110 | |
| 3111 | np->pause_flags &= ~(NV_PAUSEFRAME_TX_ENABLE | NV_PAUSEFRAME_RX_ENABLE); |
| 3112 | |
| 3113 | if (np->pause_flags & NV_PAUSEFRAME_RX_CAPABLE) { |
| 3114 | u32 pff = readl(base + NvRegPacketFilterFlags) & ~NVREG_PFF_PAUSE_RX; |
| 3115 | if (pause_flags & NV_PAUSEFRAME_RX_ENABLE) { |
| 3116 | writel(pff|NVREG_PFF_PAUSE_RX, base + NvRegPacketFilterFlags); |
| 3117 | np->pause_flags |= NV_PAUSEFRAME_RX_ENABLE; |
| 3118 | } else { |
| 3119 | writel(pff, base + NvRegPacketFilterFlags); |
| 3120 | } |
| 3121 | } |
| 3122 | if (np->pause_flags & NV_PAUSEFRAME_TX_CAPABLE) { |
| 3123 | u32 regmisc = readl(base + NvRegMisc1) & ~NVREG_MISC1_PAUSE_TX; |
| 3124 | if (pause_flags & NV_PAUSEFRAME_TX_ENABLE) { |
Ayaz Abdulla | 5289b4c | 2008-02-05 12:30:01 -0500 | [diff] [blame] | 3125 | u32 pause_enable = NVREG_TX_PAUSEFRAME_ENABLE_V1; |
| 3126 | if (np->driver_data & DEV_HAS_PAUSEFRAME_TX_V2) |
| 3127 | pause_enable = NVREG_TX_PAUSEFRAME_ENABLE_V2; |
Ayaz Abdulla | 9a33e88 | 2008-08-06 12:12:34 -0400 | [diff] [blame] | 3128 | if (np->driver_data & DEV_HAS_PAUSEFRAME_TX_V3) { |
Ayaz Abdulla | 5289b4c | 2008-02-05 12:30:01 -0500 | [diff] [blame] | 3129 | pause_enable = NVREG_TX_PAUSEFRAME_ENABLE_V3; |
Ayaz Abdulla | 9a33e88 | 2008-08-06 12:12:34 -0400 | [diff] [blame] | 3130 | /* limit the number of tx pause frames to a default of 8 */ |
| 3131 | writel(readl(base + NvRegTxPauseFrameLimit)|NVREG_TX_PAUSEFRAMELIMIT_ENABLE, base + NvRegTxPauseFrameLimit); |
| 3132 | } |
Ayaz Abdulla | 5289b4c | 2008-02-05 12:30:01 -0500 | [diff] [blame] | 3133 | writel(pause_enable, base + NvRegTxPauseFrame); |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 3134 | writel(regmisc|NVREG_MISC1_PAUSE_TX, base + NvRegMisc1); |
| 3135 | np->pause_flags |= NV_PAUSEFRAME_TX_ENABLE; |
| 3136 | } else { |
| 3137 | writel(NVREG_TX_PAUSEFRAME_DISABLE, base + NvRegTxPauseFrame); |
| 3138 | writel(regmisc, base + NvRegMisc1); |
| 3139 | } |
| 3140 | } |
| 3141 | } |
| 3142 | |
Ayaz Abdulla | 4ea7f29 | 2005-11-11 08:29:59 -0500 | [diff] [blame] | 3143 | /** |
| 3144 | * nv_update_linkspeed: Setup the MAC according to the link partner |
| 3145 | * @dev: Network device to be configured |
| 3146 | * |
| 3147 | * The function queries the PHY and checks if there is a link partner. |
| 3148 | * If yes, then it sets up the MAC accordingly. Otherwise, the MAC is |
| 3149 | * set to 10 MBit HD. |
| 3150 | * |
| 3151 | * The function returns 0 if there is no link partner and 1 if there is |
| 3152 | * a good link partner. |
| 3153 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3154 | static int nv_update_linkspeed(struct net_device *dev) |
| 3155 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 3156 | struct fe_priv *np = netdev_priv(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3157 | u8 __iomem *base = get_hwbase(dev); |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 3158 | int adv = 0; |
| 3159 | int lpa = 0; |
| 3160 | int adv_lpa, adv_pause, lpa_pause; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3161 | int newls = np->linkspeed; |
| 3162 | int newdup = np->duplex; |
| 3163 | int mii_status; |
| 3164 | int retval = 0; |
Ayaz Abdulla | 9744e21 | 2006-07-06 16:45:58 -0400 | [diff] [blame] | 3165 | u32 control_1000, status_1000, phyreg, pause_flags, txreg; |
Ayaz Abdulla | b2976d2 | 2008-02-04 15:13:59 -0500 | [diff] [blame] | 3166 | u32 txrxFlags = 0; |
Ayaz Abdulla | fd9b558 | 2008-02-05 12:29:49 -0500 | [diff] [blame] | 3167 | u32 phy_exp; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3168 | |
| 3169 | /* BMSR_LSTATUS is latched, read it twice: |
| 3170 | * we want the current value. |
| 3171 | */ |
| 3172 | mii_rw(dev, np->phyaddr, MII_BMSR, MII_READ); |
| 3173 | mii_status = mii_rw(dev, np->phyaddr, MII_BMSR, MII_READ); |
| 3174 | |
| 3175 | if (!(mii_status & BMSR_LSTATUS)) { |
| 3176 | dprintk(KERN_DEBUG "%s: no link detected by phy - falling back to 10HD.\n", |
| 3177 | dev->name); |
| 3178 | newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10; |
| 3179 | newdup = 0; |
| 3180 | retval = 0; |
| 3181 | goto set_speed; |
| 3182 | } |
| 3183 | |
| 3184 | if (np->autoneg == 0) { |
| 3185 | dprintk(KERN_DEBUG "%s: nv_update_linkspeed: autoneg off, PHY set to 0x%04x.\n", |
| 3186 | dev->name, np->fixed_mode); |
| 3187 | if (np->fixed_mode & LPA_100FULL) { |
| 3188 | newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_100; |
| 3189 | newdup = 1; |
| 3190 | } else if (np->fixed_mode & LPA_100HALF) { |
| 3191 | newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_100; |
| 3192 | newdup = 0; |
| 3193 | } else if (np->fixed_mode & LPA_10FULL) { |
| 3194 | newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10; |
| 3195 | newdup = 1; |
| 3196 | } else { |
| 3197 | newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10; |
| 3198 | newdup = 0; |
| 3199 | } |
| 3200 | retval = 1; |
| 3201 | goto set_speed; |
| 3202 | } |
| 3203 | /* check auto negotiation is complete */ |
| 3204 | if (!(mii_status & BMSR_ANEGCOMPLETE)) { |
| 3205 | /* still in autonegotiation - configure nic for 10 MBit HD and wait. */ |
| 3206 | newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10; |
| 3207 | newdup = 0; |
| 3208 | retval = 0; |
| 3209 | dprintk(KERN_DEBUG "%s: autoneg not completed - falling back to 10HD.\n", dev->name); |
| 3210 | goto set_speed; |
| 3211 | } |
| 3212 | |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 3213 | adv = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ); |
| 3214 | lpa = mii_rw(dev, np->phyaddr, MII_LPA, MII_READ); |
| 3215 | dprintk(KERN_DEBUG "%s: nv_update_linkspeed: PHY advertises 0x%04x, lpa 0x%04x.\n", |
| 3216 | dev->name, adv, lpa); |
| 3217 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3218 | retval = 1; |
| 3219 | if (np->gigabit == PHY_GIGABIT) { |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 3220 | control_1000 = mii_rw(dev, np->phyaddr, MII_CTRL1000, MII_READ); |
| 3221 | status_1000 = mii_rw(dev, np->phyaddr, MII_STAT1000, MII_READ); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3222 | |
| 3223 | if ((control_1000 & ADVERTISE_1000FULL) && |
| 3224 | (status_1000 & LPA_1000FULL)) { |
| 3225 | dprintk(KERN_DEBUG "%s: nv_update_linkspeed: GBit ethernet detected.\n", |
| 3226 | dev->name); |
| 3227 | newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_1000; |
| 3228 | newdup = 1; |
| 3229 | goto set_speed; |
| 3230 | } |
| 3231 | } |
| 3232 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3233 | /* FIXME: handle parallel detection properly */ |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 3234 | adv_lpa = lpa & adv; |
| 3235 | if (adv_lpa & LPA_100FULL) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3236 | newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_100; |
| 3237 | newdup = 1; |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 3238 | } else if (adv_lpa & LPA_100HALF) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3239 | newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_100; |
| 3240 | newdup = 0; |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 3241 | } else if (adv_lpa & LPA_10FULL) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3242 | newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10; |
| 3243 | newdup = 1; |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 3244 | } else if (adv_lpa & LPA_10HALF) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3245 | newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10; |
| 3246 | newdup = 0; |
| 3247 | } else { |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 3248 | dprintk(KERN_DEBUG "%s: bad ability %04x - falling back to 10HD.\n", dev->name, adv_lpa); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3249 | newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10; |
| 3250 | newdup = 0; |
| 3251 | } |
| 3252 | |
| 3253 | set_speed: |
| 3254 | if (np->duplex == newdup && np->linkspeed == newls) |
| 3255 | return retval; |
| 3256 | |
| 3257 | dprintk(KERN_INFO "%s: changing link setting from %d/%d to %d/%d.\n", |
| 3258 | dev->name, np->linkspeed, np->duplex, newls, newdup); |
| 3259 | |
| 3260 | np->duplex = newdup; |
| 3261 | np->linkspeed = newls; |
| 3262 | |
Ayaz Abdulla | b2976d2 | 2008-02-04 15:13:59 -0500 | [diff] [blame] | 3263 | /* The transmitter and receiver must be restarted for safe update */ |
| 3264 | if (readl(base + NvRegTransmitterControl) & NVREG_XMITCTL_START) { |
| 3265 | txrxFlags |= NV_RESTART_TX; |
| 3266 | nv_stop_tx(dev); |
| 3267 | } |
| 3268 | if (readl(base + NvRegReceiverControl) & NVREG_RCVCTL_START) { |
| 3269 | txrxFlags |= NV_RESTART_RX; |
| 3270 | nv_stop_rx(dev); |
| 3271 | } |
| 3272 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3273 | if (np->gigabit == PHY_GIGABIT) { |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 3274 | phyreg = readl(base + NvRegSlotTime); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3275 | phyreg &= ~(0x3FF00); |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 3276 | if (((np->linkspeed & 0xFFF) == NVREG_LINKSPEED_10) || |
| 3277 | ((np->linkspeed & 0xFFF) == NVREG_LINKSPEED_100)) |
| 3278 | phyreg |= NVREG_SLOTTIME_10_100_FULL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3279 | else if ((np->linkspeed & 0xFFF) == NVREG_LINKSPEED_1000) |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 3280 | phyreg |= NVREG_SLOTTIME_1000_FULL; |
| 3281 | writel(phyreg, base + NvRegSlotTime); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3282 | } |
| 3283 | |
| 3284 | phyreg = readl(base + NvRegPhyInterface); |
| 3285 | phyreg &= ~(PHY_HALF|PHY_100|PHY_1000); |
| 3286 | if (np->duplex == 0) |
| 3287 | phyreg |= PHY_HALF; |
| 3288 | if ((np->linkspeed & NVREG_LINKSPEED_MASK) == NVREG_LINKSPEED_100) |
| 3289 | phyreg |= PHY_100; |
| 3290 | else if ((np->linkspeed & NVREG_LINKSPEED_MASK) == NVREG_LINKSPEED_1000) |
| 3291 | phyreg |= PHY_1000; |
| 3292 | writel(phyreg, base + NvRegPhyInterface); |
| 3293 | |
Ayaz Abdulla | fd9b558 | 2008-02-05 12:29:49 -0500 | [diff] [blame] | 3294 | phy_exp = mii_rw(dev, np->phyaddr, MII_EXPANSION, MII_READ) & EXPANSION_NWAY; /* autoneg capable */ |
Ayaz Abdulla | 9744e21 | 2006-07-06 16:45:58 -0400 | [diff] [blame] | 3295 | if (phyreg & PHY_RGMII) { |
Ayaz Abdulla | fd9b558 | 2008-02-05 12:29:49 -0500 | [diff] [blame] | 3296 | if ((np->linkspeed & NVREG_LINKSPEED_MASK) == NVREG_LINKSPEED_1000) { |
Ayaz Abdulla | 9744e21 | 2006-07-06 16:45:58 -0400 | [diff] [blame] | 3297 | txreg = NVREG_TX_DEFERRAL_RGMII_1000; |
Ayaz Abdulla | fd9b558 | 2008-02-05 12:29:49 -0500 | [diff] [blame] | 3298 | } else { |
| 3299 | if (!phy_exp && !np->duplex && (np->driver_data & DEV_HAS_COLLISION_FIX)) { |
| 3300 | if ((np->linkspeed & NVREG_LINKSPEED_MASK) == NVREG_LINKSPEED_10) |
| 3301 | txreg = NVREG_TX_DEFERRAL_RGMII_STRETCH_10; |
| 3302 | else |
| 3303 | txreg = NVREG_TX_DEFERRAL_RGMII_STRETCH_100; |
| 3304 | } else { |
| 3305 | txreg = NVREG_TX_DEFERRAL_RGMII_10_100; |
| 3306 | } |
| 3307 | } |
Ayaz Abdulla | 9744e21 | 2006-07-06 16:45:58 -0400 | [diff] [blame] | 3308 | } else { |
Ayaz Abdulla | fd9b558 | 2008-02-05 12:29:49 -0500 | [diff] [blame] | 3309 | if (!phy_exp && !np->duplex && (np->driver_data & DEV_HAS_COLLISION_FIX)) |
| 3310 | txreg = NVREG_TX_DEFERRAL_MII_STRETCH; |
| 3311 | else |
| 3312 | txreg = NVREG_TX_DEFERRAL_DEFAULT; |
Ayaz Abdulla | 9744e21 | 2006-07-06 16:45:58 -0400 | [diff] [blame] | 3313 | } |
| 3314 | writel(txreg, base + NvRegTxDeferral); |
| 3315 | |
Ayaz Abdulla | 95d161c | 2006-07-06 16:46:25 -0400 | [diff] [blame] | 3316 | if (np->desc_ver == DESC_VER_1) { |
| 3317 | txreg = NVREG_TX_WM_DESC1_DEFAULT; |
| 3318 | } else { |
| 3319 | if ((np->linkspeed & NVREG_LINKSPEED_MASK) == NVREG_LINKSPEED_1000) |
| 3320 | txreg = NVREG_TX_WM_DESC2_3_1000; |
| 3321 | else |
| 3322 | txreg = NVREG_TX_WM_DESC2_3_DEFAULT; |
| 3323 | } |
| 3324 | writel(txreg, base + NvRegTxWatermark); |
| 3325 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3326 | writel(NVREG_MISC1_FORCE | ( np->duplex ? 0 : NVREG_MISC1_HD), |
| 3327 | base + NvRegMisc1); |
| 3328 | pci_push(base); |
| 3329 | writel(np->linkspeed, base + NvRegLinkSpeed); |
| 3330 | pci_push(base); |
| 3331 | |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 3332 | pause_flags = 0; |
| 3333 | /* setup pause frame */ |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 3334 | if (np->duplex != 0) { |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 3335 | if (np->autoneg && np->pause_flags & NV_PAUSEFRAME_AUTONEG) { |
| 3336 | adv_pause = adv & (ADVERTISE_PAUSE_CAP| ADVERTISE_PAUSE_ASYM); |
| 3337 | lpa_pause = lpa & (LPA_PAUSE_CAP| LPA_PAUSE_ASYM); |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 3338 | |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 3339 | switch (adv_pause) { |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 3340 | case ADVERTISE_PAUSE_CAP: |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 3341 | if (lpa_pause & LPA_PAUSE_CAP) { |
| 3342 | pause_flags |= NV_PAUSEFRAME_RX_ENABLE; |
| 3343 | if (np->pause_flags & NV_PAUSEFRAME_TX_REQ) |
| 3344 | pause_flags |= NV_PAUSEFRAME_TX_ENABLE; |
| 3345 | } |
| 3346 | break; |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 3347 | case ADVERTISE_PAUSE_ASYM: |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 3348 | if (lpa_pause == (LPA_PAUSE_CAP| LPA_PAUSE_ASYM)) |
| 3349 | { |
| 3350 | pause_flags |= NV_PAUSEFRAME_TX_ENABLE; |
| 3351 | } |
| 3352 | break; |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 3353 | case ADVERTISE_PAUSE_CAP| ADVERTISE_PAUSE_ASYM: |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 3354 | if (lpa_pause & LPA_PAUSE_CAP) |
| 3355 | { |
| 3356 | pause_flags |= NV_PAUSEFRAME_RX_ENABLE; |
| 3357 | if (np->pause_flags & NV_PAUSEFRAME_TX_REQ) |
| 3358 | pause_flags |= NV_PAUSEFRAME_TX_ENABLE; |
| 3359 | } |
| 3360 | if (lpa_pause == LPA_PAUSE_ASYM) |
| 3361 | { |
| 3362 | pause_flags |= NV_PAUSEFRAME_RX_ENABLE; |
| 3363 | } |
| 3364 | break; |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 3365 | } |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 3366 | } else { |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 3367 | pause_flags = np->pause_flags; |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 3368 | } |
| 3369 | } |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 3370 | nv_update_pause(dev, pause_flags); |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 3371 | |
Ayaz Abdulla | b2976d2 | 2008-02-04 15:13:59 -0500 | [diff] [blame] | 3372 | if (txrxFlags & NV_RESTART_TX) |
| 3373 | nv_start_tx(dev); |
| 3374 | if (txrxFlags & NV_RESTART_RX) |
| 3375 | nv_start_rx(dev); |
| 3376 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3377 | return retval; |
| 3378 | } |
| 3379 | |
| 3380 | static void nv_linkchange(struct net_device *dev) |
| 3381 | { |
| 3382 | if (nv_update_linkspeed(dev)) { |
Ayaz Abdulla | 4ea7f29 | 2005-11-11 08:29:59 -0500 | [diff] [blame] | 3383 | if (!netif_carrier_ok(dev)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3384 | netif_carrier_on(dev); |
| 3385 | printk(KERN_INFO "%s: link up.\n", dev->name); |
Ayaz Abdulla | 4ea7f29 | 2005-11-11 08:29:59 -0500 | [diff] [blame] | 3386 | nv_start_rx(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3387 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3388 | } else { |
| 3389 | if (netif_carrier_ok(dev)) { |
| 3390 | netif_carrier_off(dev); |
| 3391 | printk(KERN_INFO "%s: link down.\n", dev->name); |
| 3392 | nv_stop_rx(dev); |
| 3393 | } |
| 3394 | } |
| 3395 | } |
| 3396 | |
| 3397 | static void nv_link_irq(struct net_device *dev) |
| 3398 | { |
| 3399 | u8 __iomem *base = get_hwbase(dev); |
| 3400 | u32 miistat; |
| 3401 | |
| 3402 | miistat = readl(base + NvRegMIIStatus); |
Ayaz Abdulla | eb79842 | 2008-02-04 15:14:04 -0500 | [diff] [blame] | 3403 | writel(NVREG_MIISTAT_LINKCHANGE, base + NvRegMIIStatus); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3404 | dprintk(KERN_INFO "%s: link change irq, status 0x%x.\n", dev->name, miistat); |
| 3405 | |
| 3406 | if (miistat & (NVREG_MIISTAT_LINKCHANGE)) |
| 3407 | nv_linkchange(dev); |
| 3408 | dprintk(KERN_DEBUG "%s: link change notification done.\n", dev->name); |
| 3409 | } |
| 3410 | |
Ayaz Abdulla | 4db0ee17 | 2008-06-09 16:51:06 -0700 | [diff] [blame] | 3411 | static void nv_msi_workaround(struct fe_priv *np) |
| 3412 | { |
| 3413 | |
| 3414 | /* Need to toggle the msi irq mask within the ethernet device, |
| 3415 | * otherwise, future interrupts will not be detected. |
| 3416 | */ |
| 3417 | if (np->msi_flags & NV_MSI_ENABLED) { |
| 3418 | u8 __iomem *base = np->base; |
| 3419 | |
| 3420 | writel(0, base + NvRegMSIIrqMask); |
| 3421 | writel(NVREG_MSI_VECTOR_0_ENABLED, base + NvRegMSIIrqMask); |
| 3422 | } |
| 3423 | } |
| 3424 | |
Ayaz Abdulla | 4145ade | 2009-03-05 08:02:26 +0000 | [diff] [blame] | 3425 | static inline int nv_change_interrupt_mode(struct net_device *dev, int total_work) |
| 3426 | { |
| 3427 | struct fe_priv *np = netdev_priv(dev); |
| 3428 | |
| 3429 | if (optimization_mode == NV_OPTIMIZATION_MODE_DYNAMIC) { |
| 3430 | if (total_work > NV_DYNAMIC_THRESHOLD) { |
| 3431 | /* transition to poll based interrupts */ |
| 3432 | np->quiet_count = 0; |
| 3433 | if (np->irqmask != NVREG_IRQMASK_CPU) { |
| 3434 | np->irqmask = NVREG_IRQMASK_CPU; |
| 3435 | return 1; |
| 3436 | } |
| 3437 | } else { |
| 3438 | if (np->quiet_count < NV_DYNAMIC_MAX_QUIET_COUNT) { |
| 3439 | np->quiet_count++; |
| 3440 | } else { |
| 3441 | /* reached a period of low activity, switch |
| 3442 | to per tx/rx packet interrupts */ |
| 3443 | if (np->irqmask != NVREG_IRQMASK_THROUGHPUT) { |
| 3444 | np->irqmask = NVREG_IRQMASK_THROUGHPUT; |
| 3445 | return 1; |
| 3446 | } |
| 3447 | } |
| 3448 | } |
| 3449 | } |
| 3450 | return 0; |
| 3451 | } |
| 3452 | |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 3453 | static irqreturn_t nv_nic_irq(int foo, void *data) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3454 | { |
| 3455 | struct net_device *dev = (struct net_device *) data; |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 3456 | struct fe_priv *np = netdev_priv(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3457 | u8 __iomem *base = get_hwbase(dev); |
Ayaz Abdulla | 4145ade | 2009-03-05 08:02:26 +0000 | [diff] [blame] | 3458 | #ifndef CONFIG_FORCEDETH_NAPI |
| 3459 | int total_work = 0; |
| 3460 | int loop_count = 0; |
| 3461 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3462 | |
| 3463 | dprintk(KERN_DEBUG "%s: nv_nic_irq\n", dev->name); |
| 3464 | |
Ayaz Abdulla | b67874a | 2009-03-05 08:02:22 +0000 | [diff] [blame] | 3465 | if (!(np->msi_flags & NV_MSI_X_ENABLED)) { |
| 3466 | np->events = readl(base + NvRegIrqStatus); |
Ayaz Abdulla | 1b2bb76 | 2009-03-05 08:02:34 +0000 | [diff] [blame] | 3467 | writel(np->events, base + NvRegIrqStatus); |
Ayaz Abdulla | b67874a | 2009-03-05 08:02:22 +0000 | [diff] [blame] | 3468 | } else { |
| 3469 | np->events = readl(base + NvRegMSIXIrqStatus); |
Ayaz Abdulla | 1b2bb76 | 2009-03-05 08:02:34 +0000 | [diff] [blame] | 3470 | writel(np->events, base + NvRegMSIXIrqStatus); |
Ayaz Abdulla | b67874a | 2009-03-05 08:02:22 +0000 | [diff] [blame] | 3471 | } |
| 3472 | dprintk(KERN_DEBUG "%s: irq: %08x\n", dev->name, np->events); |
| 3473 | if (!(np->events & np->irqmask)) |
| 3474 | return IRQ_NONE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3475 | |
Ayaz Abdulla | b67874a | 2009-03-05 08:02:22 +0000 | [diff] [blame] | 3476 | nv_msi_workaround(np); |
Ayaz Abdulla | 4db0ee17 | 2008-06-09 16:51:06 -0700 | [diff] [blame] | 3477 | |
Ayaz Abdulla | f27e6f3 | 2009-03-05 08:02:14 +0000 | [diff] [blame] | 3478 | #ifdef CONFIG_FORCEDETH_NAPI |
Ayaz Abdulla | b67874a | 2009-03-05 08:02:22 +0000 | [diff] [blame] | 3479 | napi_schedule(&np->napi); |
Ayaz Abdulla | f27e6f3 | 2009-03-05 08:02:14 +0000 | [diff] [blame] | 3480 | |
Ayaz Abdulla | b67874a | 2009-03-05 08:02:22 +0000 | [diff] [blame] | 3481 | /* Disable furthur irq's |
| 3482 | (msix not enabled with napi) */ |
| 3483 | writel(0, base + NvRegIrqMask); |
Ayaz Abdulla | f27e6f3 | 2009-03-05 08:02:14 +0000 | [diff] [blame] | 3484 | |
Ayaz Abdulla | f27e6f3 | 2009-03-05 08:02:14 +0000 | [diff] [blame] | 3485 | #else |
Ayaz Abdulla | 4145ade | 2009-03-05 08:02:26 +0000 | [diff] [blame] | 3486 | do |
| 3487 | { |
| 3488 | int work = 0; |
| 3489 | if ((work = nv_rx_process(dev, RX_WORK_PER_LOOP))) { |
| 3490 | if (unlikely(nv_alloc_rx(dev))) { |
| 3491 | spin_lock(&np->lock); |
| 3492 | if (!np->in_shutdown) |
| 3493 | mod_timer(&np->oom_kick, jiffies + OOM_REFILL); |
| 3494 | spin_unlock(&np->lock); |
| 3495 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3496 | } |
Ayaz Abdulla | 4145ade | 2009-03-05 08:02:26 +0000 | [diff] [blame] | 3497 | |
| 3498 | spin_lock(&np->lock); |
| 3499 | work += nv_tx_done(dev, TX_WORK_PER_LOOP); |
| 3500 | spin_unlock(&np->lock); |
| 3501 | |
| 3502 | if (!work) |
| 3503 | break; |
| 3504 | |
| 3505 | total_work += work; |
| 3506 | |
| 3507 | loop_count++; |
| 3508 | } |
| 3509 | while (loop_count < max_interrupt_work); |
| 3510 | |
| 3511 | if (nv_change_interrupt_mode(dev, total_work)) { |
| 3512 | /* setup new irq mask */ |
| 3513 | writel(np->irqmask, base + NvRegIrqMask); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3514 | } |
Ayaz Abdulla | b67874a | 2009-03-05 08:02:22 +0000 | [diff] [blame] | 3515 | |
| 3516 | if (unlikely(np->events & NVREG_IRQ_LINK)) { |
| 3517 | spin_lock(&np->lock); |
| 3518 | nv_link_irq(dev); |
| 3519 | spin_unlock(&np->lock); |
| 3520 | } |
| 3521 | if (unlikely(np->need_linktimer && time_after(jiffies, np->link_timeout))) { |
| 3522 | spin_lock(&np->lock); |
| 3523 | nv_linkchange(dev); |
| 3524 | spin_unlock(&np->lock); |
| 3525 | np->link_timeout = jiffies + LINK_TIMEOUT; |
| 3526 | } |
| 3527 | if (unlikely(np->events & NVREG_IRQ_RECOVER_ERROR)) { |
| 3528 | spin_lock(&np->lock); |
| 3529 | /* disable interrupts on the nic */ |
| 3530 | if (!(np->msi_flags & NV_MSI_X_ENABLED)) |
| 3531 | writel(0, base + NvRegIrqMask); |
| 3532 | else |
| 3533 | writel(np->irqmask, base + NvRegIrqMask); |
| 3534 | pci_push(base); |
| 3535 | |
| 3536 | if (!np->in_shutdown) { |
| 3537 | np->nic_poll_irq = np->irqmask; |
| 3538 | np->recover_error = 1; |
| 3539 | mod_timer(&np->nic_poll, jiffies + POLL_WAIT); |
| 3540 | } |
| 3541 | spin_unlock(&np->lock); |
| 3542 | } |
| 3543 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3544 | dprintk(KERN_DEBUG "%s: nv_nic_irq completed\n", dev->name); |
| 3545 | |
Ayaz Abdulla | b67874a | 2009-03-05 08:02:22 +0000 | [diff] [blame] | 3546 | return IRQ_HANDLED; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3547 | } |
| 3548 | |
Ayaz Abdulla | f0734ab | 2007-01-21 18:10:57 -0500 | [diff] [blame] | 3549 | /** |
| 3550 | * All _optimized functions are used to help increase performance |
| 3551 | * (reduce CPU and increase throughput). They use descripter version 3, |
| 3552 | * compiler directives, and reduce memory accesses. |
| 3553 | */ |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 3554 | static irqreturn_t nv_nic_irq_optimized(int foo, void *data) |
| 3555 | { |
| 3556 | struct net_device *dev = (struct net_device *) data; |
| 3557 | struct fe_priv *np = netdev_priv(dev); |
| 3558 | u8 __iomem *base = get_hwbase(dev); |
Ayaz Abdulla | 4145ade | 2009-03-05 08:02:26 +0000 | [diff] [blame] | 3559 | #ifndef CONFIG_FORCEDETH_NAPI |
| 3560 | int total_work = 0; |
| 3561 | int loop_count = 0; |
| 3562 | #endif |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 3563 | |
| 3564 | dprintk(KERN_DEBUG "%s: nv_nic_irq_optimized\n", dev->name); |
| 3565 | |
Ayaz Abdulla | b67874a | 2009-03-05 08:02:22 +0000 | [diff] [blame] | 3566 | if (!(np->msi_flags & NV_MSI_X_ENABLED)) { |
| 3567 | np->events = readl(base + NvRegIrqStatus); |
Ayaz Abdulla | 1b2bb76 | 2009-03-05 08:02:34 +0000 | [diff] [blame] | 3568 | writel(np->events, base + NvRegIrqStatus); |
Ayaz Abdulla | b67874a | 2009-03-05 08:02:22 +0000 | [diff] [blame] | 3569 | } else { |
| 3570 | np->events = readl(base + NvRegMSIXIrqStatus); |
Ayaz Abdulla | 1b2bb76 | 2009-03-05 08:02:34 +0000 | [diff] [blame] | 3571 | writel(np->events, base + NvRegMSIXIrqStatus); |
Ayaz Abdulla | b67874a | 2009-03-05 08:02:22 +0000 | [diff] [blame] | 3572 | } |
| 3573 | dprintk(KERN_DEBUG "%s: irq: %08x\n", dev->name, np->events); |
| 3574 | if (!(np->events & np->irqmask)) |
| 3575 | return IRQ_NONE; |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 3576 | |
Ayaz Abdulla | b67874a | 2009-03-05 08:02:22 +0000 | [diff] [blame] | 3577 | nv_msi_workaround(np); |
Ayaz Abdulla | 4db0ee17 | 2008-06-09 16:51:06 -0700 | [diff] [blame] | 3578 | |
Ayaz Abdulla | f27e6f3 | 2009-03-05 08:02:14 +0000 | [diff] [blame] | 3579 | #ifdef CONFIG_FORCEDETH_NAPI |
Ayaz Abdulla | b67874a | 2009-03-05 08:02:22 +0000 | [diff] [blame] | 3580 | napi_schedule(&np->napi); |
Ayaz Abdulla | f27e6f3 | 2009-03-05 08:02:14 +0000 | [diff] [blame] | 3581 | |
Ayaz Abdulla | b67874a | 2009-03-05 08:02:22 +0000 | [diff] [blame] | 3582 | /* Disable furthur irq's |
| 3583 | (msix not enabled with napi) */ |
| 3584 | writel(0, base + NvRegIrqMask); |
Ayaz Abdulla | f27e6f3 | 2009-03-05 08:02:14 +0000 | [diff] [blame] | 3585 | |
Ayaz Abdulla | f27e6f3 | 2009-03-05 08:02:14 +0000 | [diff] [blame] | 3586 | #else |
Ayaz Abdulla | 4145ade | 2009-03-05 08:02:26 +0000 | [diff] [blame] | 3587 | do |
| 3588 | { |
| 3589 | int work = 0; |
| 3590 | if ((work = nv_rx_process_optimized(dev, RX_WORK_PER_LOOP))) { |
| 3591 | if (unlikely(nv_alloc_rx_optimized(dev))) { |
| 3592 | spin_lock(&np->lock); |
| 3593 | if (!np->in_shutdown) |
| 3594 | mod_timer(&np->oom_kick, jiffies + OOM_REFILL); |
| 3595 | spin_unlock(&np->lock); |
| 3596 | } |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 3597 | } |
Ayaz Abdulla | 4145ade | 2009-03-05 08:02:26 +0000 | [diff] [blame] | 3598 | |
| 3599 | spin_lock(&np->lock); |
| 3600 | work += nv_tx_done_optimized(dev, TX_WORK_PER_LOOP); |
| 3601 | spin_unlock(&np->lock); |
| 3602 | |
| 3603 | if (!work) |
| 3604 | break; |
| 3605 | |
| 3606 | total_work += work; |
| 3607 | |
| 3608 | loop_count++; |
| 3609 | } |
| 3610 | while (loop_count < max_interrupt_work); |
| 3611 | |
| 3612 | if (nv_change_interrupt_mode(dev, total_work)) { |
| 3613 | /* setup new irq mask */ |
| 3614 | writel(np->irqmask, base + NvRegIrqMask); |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 3615 | } |
Ayaz Abdulla | b67874a | 2009-03-05 08:02:22 +0000 | [diff] [blame] | 3616 | |
| 3617 | if (unlikely(np->events & NVREG_IRQ_LINK)) { |
| 3618 | spin_lock(&np->lock); |
| 3619 | nv_link_irq(dev); |
| 3620 | spin_unlock(&np->lock); |
| 3621 | } |
| 3622 | if (unlikely(np->need_linktimer && time_after(jiffies, np->link_timeout))) { |
| 3623 | spin_lock(&np->lock); |
| 3624 | nv_linkchange(dev); |
| 3625 | spin_unlock(&np->lock); |
| 3626 | np->link_timeout = jiffies + LINK_TIMEOUT; |
| 3627 | } |
| 3628 | if (unlikely(np->events & NVREG_IRQ_RECOVER_ERROR)) { |
| 3629 | spin_lock(&np->lock); |
| 3630 | /* disable interrupts on the nic */ |
| 3631 | if (!(np->msi_flags & NV_MSI_X_ENABLED)) |
| 3632 | writel(0, base + NvRegIrqMask); |
| 3633 | else |
| 3634 | writel(np->irqmask, base + NvRegIrqMask); |
| 3635 | pci_push(base); |
| 3636 | |
| 3637 | if (!np->in_shutdown) { |
| 3638 | np->nic_poll_irq = np->irqmask; |
| 3639 | np->recover_error = 1; |
| 3640 | mod_timer(&np->nic_poll, jiffies + POLL_WAIT); |
| 3641 | } |
| 3642 | spin_unlock(&np->lock); |
| 3643 | } |
| 3644 | |
| 3645 | #endif |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 3646 | dprintk(KERN_DEBUG "%s: nv_nic_irq_optimized completed\n", dev->name); |
| 3647 | |
Ayaz Abdulla | b67874a | 2009-03-05 08:02:22 +0000 | [diff] [blame] | 3648 | return IRQ_HANDLED; |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 3649 | } |
| 3650 | |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 3651 | static irqreturn_t nv_nic_irq_tx(int foo, void *data) |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3652 | { |
| 3653 | struct net_device *dev = (struct net_device *) data; |
| 3654 | struct fe_priv *np = netdev_priv(dev); |
| 3655 | u8 __iomem *base = get_hwbase(dev); |
| 3656 | u32 events; |
| 3657 | int i; |
Peter Zijlstra | 0a07bc6 | 2006-09-19 14:55:22 +0200 | [diff] [blame] | 3658 | unsigned long flags; |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3659 | |
| 3660 | dprintk(KERN_DEBUG "%s: nv_nic_irq_tx\n", dev->name); |
| 3661 | |
| 3662 | for (i=0; ; i++) { |
| 3663 | events = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQ_TX_ALL; |
| 3664 | writel(NVREG_IRQ_TX_ALL, base + NvRegMSIXIrqStatus); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3665 | dprintk(KERN_DEBUG "%s: tx irq: %08x\n", dev->name, events); |
| 3666 | if (!(events & np->irqmask)) |
| 3667 | break; |
| 3668 | |
Peter Zijlstra | 0a07bc6 | 2006-09-19 14:55:22 +0200 | [diff] [blame] | 3669 | spin_lock_irqsave(&np->lock, flags); |
Ayaz Abdulla | 4e16ed1 | 2007-01-23 12:00:56 -0500 | [diff] [blame] | 3670 | nv_tx_done_optimized(dev, TX_WORK_PER_LOOP); |
Peter Zijlstra | 0a07bc6 | 2006-09-19 14:55:22 +0200 | [diff] [blame] | 3671 | spin_unlock_irqrestore(&np->lock, flags); |
Jeff Garzik | f3b197a | 2006-05-26 21:39:03 -0400 | [diff] [blame] | 3672 | |
Ayaz Abdulla | f0734ab | 2007-01-21 18:10:57 -0500 | [diff] [blame] | 3673 | if (unlikely(i > max_interrupt_work)) { |
Peter Zijlstra | 0a07bc6 | 2006-09-19 14:55:22 +0200 | [diff] [blame] | 3674 | spin_lock_irqsave(&np->lock, flags); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3675 | /* disable interrupts on the nic */ |
| 3676 | writel(NVREG_IRQ_TX_ALL, base + NvRegIrqMask); |
| 3677 | pci_push(base); |
| 3678 | |
| 3679 | if (!np->in_shutdown) { |
| 3680 | np->nic_poll_irq |= NVREG_IRQ_TX_ALL; |
| 3681 | mod_timer(&np->nic_poll, jiffies + POLL_WAIT); |
| 3682 | } |
Peter Zijlstra | 0a07bc6 | 2006-09-19 14:55:22 +0200 | [diff] [blame] | 3683 | spin_unlock_irqrestore(&np->lock, flags); |
Timo Jantunen | 1a2b733 | 2007-08-14 21:56:57 +0300 | [diff] [blame] | 3684 | printk(KERN_DEBUG "%s: too many iterations (%d) in nv_nic_irq_tx.\n", dev->name, i); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3685 | break; |
| 3686 | } |
| 3687 | |
| 3688 | } |
| 3689 | dprintk(KERN_DEBUG "%s: nv_nic_irq_tx completed\n", dev->name); |
| 3690 | |
| 3691 | return IRQ_RETVAL(i); |
| 3692 | } |
| 3693 | |
Stephen Hemminger | e27cdba | 2006-07-31 20:37:19 -0700 | [diff] [blame] | 3694 | #ifdef CONFIG_FORCEDETH_NAPI |
Stephen Hemminger | bea3348 | 2007-10-03 16:41:36 -0700 | [diff] [blame] | 3695 | static int nv_napi_poll(struct napi_struct *napi, int budget) |
Stephen Hemminger | e27cdba | 2006-07-31 20:37:19 -0700 | [diff] [blame] | 3696 | { |
Stephen Hemminger | bea3348 | 2007-10-03 16:41:36 -0700 | [diff] [blame] | 3697 | struct fe_priv *np = container_of(napi, struct fe_priv, napi); |
| 3698 | struct net_device *dev = np->dev; |
Stephen Hemminger | e27cdba | 2006-07-31 20:37:19 -0700 | [diff] [blame] | 3699 | u8 __iomem *base = get_hwbase(dev); |
Francois Romieu | d15e9c4 | 2006-12-17 23:03:15 +0100 | [diff] [blame] | 3700 | unsigned long flags; |
Ayaz Abdulla | 4145ade | 2009-03-05 08:02:26 +0000 | [diff] [blame] | 3701 | int retcode; |
| 3702 | int tx_work, rx_work; |
Stephen Hemminger | e27cdba | 2006-07-31 20:37:19 -0700 | [diff] [blame] | 3703 | |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 3704 | if (!nv_optimized(np)) { |
Ayaz Abdulla | f27e6f3 | 2009-03-05 08:02:14 +0000 | [diff] [blame] | 3705 | spin_lock_irqsave(&np->lock, flags); |
Ayaz Abdulla | 4145ade | 2009-03-05 08:02:26 +0000 | [diff] [blame] | 3706 | tx_work = nv_tx_done(dev, np->tx_ring_size); |
Ayaz Abdulla | f27e6f3 | 2009-03-05 08:02:14 +0000 | [diff] [blame] | 3707 | spin_unlock_irqrestore(&np->lock, flags); |
| 3708 | |
Ayaz Abdulla | 4145ade | 2009-03-05 08:02:26 +0000 | [diff] [blame] | 3709 | rx_work = nv_rx_process(dev, budget); |
Ayaz Abdulla | e0379a1 | 2007-02-20 03:34:30 -0500 | [diff] [blame] | 3710 | retcode = nv_alloc_rx(dev); |
| 3711 | } else { |
Ayaz Abdulla | f27e6f3 | 2009-03-05 08:02:14 +0000 | [diff] [blame] | 3712 | spin_lock_irqsave(&np->lock, flags); |
Ayaz Abdulla | 4145ade | 2009-03-05 08:02:26 +0000 | [diff] [blame] | 3713 | tx_work = nv_tx_done_optimized(dev, np->tx_ring_size); |
Ayaz Abdulla | f27e6f3 | 2009-03-05 08:02:14 +0000 | [diff] [blame] | 3714 | spin_unlock_irqrestore(&np->lock, flags); |
| 3715 | |
Ayaz Abdulla | 4145ade | 2009-03-05 08:02:26 +0000 | [diff] [blame] | 3716 | rx_work = nv_rx_process_optimized(dev, budget); |
Ayaz Abdulla | e0379a1 | 2007-02-20 03:34:30 -0500 | [diff] [blame] | 3717 | retcode = nv_alloc_rx_optimized(dev); |
| 3718 | } |
Stephen Hemminger | e27cdba | 2006-07-31 20:37:19 -0700 | [diff] [blame] | 3719 | |
Ayaz Abdulla | e0379a1 | 2007-02-20 03:34:30 -0500 | [diff] [blame] | 3720 | if (retcode) { |
Francois Romieu | d15e9c4 | 2006-12-17 23:03:15 +0100 | [diff] [blame] | 3721 | spin_lock_irqsave(&np->lock, flags); |
Stephen Hemminger | e27cdba | 2006-07-31 20:37:19 -0700 | [diff] [blame] | 3722 | if (!np->in_shutdown) |
| 3723 | mod_timer(&np->oom_kick, jiffies + OOM_REFILL); |
Francois Romieu | d15e9c4 | 2006-12-17 23:03:15 +0100 | [diff] [blame] | 3724 | spin_unlock_irqrestore(&np->lock, flags); |
Stephen Hemminger | e27cdba | 2006-07-31 20:37:19 -0700 | [diff] [blame] | 3725 | } |
| 3726 | |
Ayaz Abdulla | 4145ade | 2009-03-05 08:02:26 +0000 | [diff] [blame] | 3727 | nv_change_interrupt_mode(dev, tx_work + rx_work); |
| 3728 | |
Ayaz Abdulla | f27e6f3 | 2009-03-05 08:02:14 +0000 | [diff] [blame] | 3729 | if (unlikely(np->events & NVREG_IRQ_LINK)) { |
| 3730 | spin_lock_irqsave(&np->lock, flags); |
| 3731 | nv_link_irq(dev); |
| 3732 | spin_unlock_irqrestore(&np->lock, flags); |
| 3733 | } |
| 3734 | if (unlikely(np->need_linktimer && time_after(jiffies, np->link_timeout))) { |
| 3735 | spin_lock_irqsave(&np->lock, flags); |
| 3736 | nv_linkchange(dev); |
| 3737 | spin_unlock_irqrestore(&np->lock, flags); |
| 3738 | np->link_timeout = jiffies + LINK_TIMEOUT; |
| 3739 | } |
| 3740 | if (unlikely(np->events & NVREG_IRQ_RECOVER_ERROR)) { |
| 3741 | spin_lock_irqsave(&np->lock, flags); |
| 3742 | if (!np->in_shutdown) { |
| 3743 | np->nic_poll_irq = np->irqmask; |
| 3744 | np->recover_error = 1; |
| 3745 | mod_timer(&np->nic_poll, jiffies + POLL_WAIT); |
| 3746 | } |
| 3747 | spin_unlock_irqrestore(&np->lock, flags); |
| 3748 | __napi_complete(napi); |
Ayaz Abdulla | 4145ade | 2009-03-05 08:02:26 +0000 | [diff] [blame] | 3749 | return rx_work; |
Ayaz Abdulla | f27e6f3 | 2009-03-05 08:02:14 +0000 | [diff] [blame] | 3750 | } |
| 3751 | |
Ayaz Abdulla | 4145ade | 2009-03-05 08:02:26 +0000 | [diff] [blame] | 3752 | if (rx_work < budget) { |
Ayaz Abdulla | f27e6f3 | 2009-03-05 08:02:14 +0000 | [diff] [blame] | 3753 | /* re-enable interrupts |
| 3754 | (msix not enabled in napi) */ |
Ben Hutchings | 288379f | 2009-01-19 16:43:59 -0800 | [diff] [blame] | 3755 | __napi_complete(napi); |
Stephen Hemminger | bea3348 | 2007-10-03 16:41:36 -0700 | [diff] [blame] | 3756 | |
Ayaz Abdulla | f27e6f3 | 2009-03-05 08:02:14 +0000 | [diff] [blame] | 3757 | writel(np->irqmask, base + NvRegIrqMask); |
Stephen Hemminger | e27cdba | 2006-07-31 20:37:19 -0700 | [diff] [blame] | 3758 | } |
Ayaz Abdulla | 4145ade | 2009-03-05 08:02:26 +0000 | [diff] [blame] | 3759 | return rx_work; |
Stephen Hemminger | e27cdba | 2006-07-31 20:37:19 -0700 | [diff] [blame] | 3760 | } |
| 3761 | #endif |
| 3762 | |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 3763 | static irqreturn_t nv_nic_irq_rx(int foo, void *data) |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3764 | { |
| 3765 | struct net_device *dev = (struct net_device *) data; |
| 3766 | struct fe_priv *np = netdev_priv(dev); |
| 3767 | u8 __iomem *base = get_hwbase(dev); |
| 3768 | u32 events; |
| 3769 | int i; |
Peter Zijlstra | 0a07bc6 | 2006-09-19 14:55:22 +0200 | [diff] [blame] | 3770 | unsigned long flags; |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3771 | |
| 3772 | dprintk(KERN_DEBUG "%s: nv_nic_irq_rx\n", dev->name); |
| 3773 | |
| 3774 | for (i=0; ; i++) { |
| 3775 | events = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQ_RX_ALL; |
| 3776 | writel(NVREG_IRQ_RX_ALL, base + NvRegMSIXIrqStatus); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3777 | dprintk(KERN_DEBUG "%s: rx irq: %08x\n", dev->name, events); |
| 3778 | if (!(events & np->irqmask)) |
| 3779 | break; |
Jeff Garzik | f3b197a | 2006-05-26 21:39:03 -0400 | [diff] [blame] | 3780 | |
Stephen Hemminger | bea3348 | 2007-10-03 16:41:36 -0700 | [diff] [blame] | 3781 | if (nv_rx_process_optimized(dev, RX_WORK_PER_LOOP)) { |
Ayaz Abdulla | f0734ab | 2007-01-21 18:10:57 -0500 | [diff] [blame] | 3782 | if (unlikely(nv_alloc_rx_optimized(dev))) { |
| 3783 | spin_lock_irqsave(&np->lock, flags); |
| 3784 | if (!np->in_shutdown) |
| 3785 | mod_timer(&np->oom_kick, jiffies + OOM_REFILL); |
| 3786 | spin_unlock_irqrestore(&np->lock, flags); |
| 3787 | } |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3788 | } |
Jeff Garzik | f3b197a | 2006-05-26 21:39:03 -0400 | [diff] [blame] | 3789 | |
Ayaz Abdulla | f0734ab | 2007-01-21 18:10:57 -0500 | [diff] [blame] | 3790 | if (unlikely(i > max_interrupt_work)) { |
Peter Zijlstra | 0a07bc6 | 2006-09-19 14:55:22 +0200 | [diff] [blame] | 3791 | spin_lock_irqsave(&np->lock, flags); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3792 | /* disable interrupts on the nic */ |
| 3793 | writel(NVREG_IRQ_RX_ALL, base + NvRegIrqMask); |
| 3794 | pci_push(base); |
| 3795 | |
| 3796 | if (!np->in_shutdown) { |
| 3797 | np->nic_poll_irq |= NVREG_IRQ_RX_ALL; |
| 3798 | mod_timer(&np->nic_poll, jiffies + POLL_WAIT); |
| 3799 | } |
Peter Zijlstra | 0a07bc6 | 2006-09-19 14:55:22 +0200 | [diff] [blame] | 3800 | spin_unlock_irqrestore(&np->lock, flags); |
Timo Jantunen | 1a2b733 | 2007-08-14 21:56:57 +0300 | [diff] [blame] | 3801 | printk(KERN_DEBUG "%s: too many iterations (%d) in nv_nic_irq_rx.\n", dev->name, i); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3802 | break; |
| 3803 | } |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3804 | } |
| 3805 | dprintk(KERN_DEBUG "%s: nv_nic_irq_rx completed\n", dev->name); |
| 3806 | |
| 3807 | return IRQ_RETVAL(i); |
| 3808 | } |
| 3809 | |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 3810 | static irqreturn_t nv_nic_irq_other(int foo, void *data) |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3811 | { |
| 3812 | struct net_device *dev = (struct net_device *) data; |
| 3813 | struct fe_priv *np = netdev_priv(dev); |
| 3814 | u8 __iomem *base = get_hwbase(dev); |
| 3815 | u32 events; |
| 3816 | int i; |
Peter Zijlstra | 0a07bc6 | 2006-09-19 14:55:22 +0200 | [diff] [blame] | 3817 | unsigned long flags; |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3818 | |
| 3819 | dprintk(KERN_DEBUG "%s: nv_nic_irq_other\n", dev->name); |
| 3820 | |
| 3821 | for (i=0; ; i++) { |
| 3822 | events = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQ_OTHER; |
| 3823 | writel(NVREG_IRQ_OTHER, base + NvRegMSIXIrqStatus); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3824 | dprintk(KERN_DEBUG "%s: irq: %08x\n", dev->name, events); |
| 3825 | if (!(events & np->irqmask)) |
| 3826 | break; |
Jeff Garzik | f3b197a | 2006-05-26 21:39:03 -0400 | [diff] [blame] | 3827 | |
Ayaz Abdulla | 4e16ed1 | 2007-01-23 12:00:56 -0500 | [diff] [blame] | 3828 | /* check tx in case we reached max loop limit in tx isr */ |
| 3829 | spin_lock_irqsave(&np->lock, flags); |
| 3830 | nv_tx_done_optimized(dev, TX_WORK_PER_LOOP); |
| 3831 | spin_unlock_irqrestore(&np->lock, flags); |
| 3832 | |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3833 | if (events & NVREG_IRQ_LINK) { |
Peter Zijlstra | 0a07bc6 | 2006-09-19 14:55:22 +0200 | [diff] [blame] | 3834 | spin_lock_irqsave(&np->lock, flags); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3835 | nv_link_irq(dev); |
Peter Zijlstra | 0a07bc6 | 2006-09-19 14:55:22 +0200 | [diff] [blame] | 3836 | spin_unlock_irqrestore(&np->lock, flags); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3837 | } |
| 3838 | if (np->need_linktimer && time_after(jiffies, np->link_timeout)) { |
Peter Zijlstra | 0a07bc6 | 2006-09-19 14:55:22 +0200 | [diff] [blame] | 3839 | spin_lock_irqsave(&np->lock, flags); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3840 | nv_linkchange(dev); |
Peter Zijlstra | 0a07bc6 | 2006-09-19 14:55:22 +0200 | [diff] [blame] | 3841 | spin_unlock_irqrestore(&np->lock, flags); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3842 | np->link_timeout = jiffies + LINK_TIMEOUT; |
| 3843 | } |
Ayaz Abdulla | c5cf910 | 2006-10-30 17:32:01 -0500 | [diff] [blame] | 3844 | if (events & NVREG_IRQ_RECOVER_ERROR) { |
| 3845 | spin_lock_irq(&np->lock); |
| 3846 | /* disable interrupts on the nic */ |
| 3847 | writel(NVREG_IRQ_OTHER, base + NvRegIrqMask); |
| 3848 | pci_push(base); |
| 3849 | |
| 3850 | if (!np->in_shutdown) { |
| 3851 | np->nic_poll_irq |= NVREG_IRQ_OTHER; |
| 3852 | np->recover_error = 1; |
| 3853 | mod_timer(&np->nic_poll, jiffies + POLL_WAIT); |
| 3854 | } |
| 3855 | spin_unlock_irq(&np->lock); |
| 3856 | break; |
| 3857 | } |
Ayaz Abdulla | f0734ab | 2007-01-21 18:10:57 -0500 | [diff] [blame] | 3858 | if (unlikely(i > max_interrupt_work)) { |
Peter Zijlstra | 0a07bc6 | 2006-09-19 14:55:22 +0200 | [diff] [blame] | 3859 | spin_lock_irqsave(&np->lock, flags); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3860 | /* disable interrupts on the nic */ |
| 3861 | writel(NVREG_IRQ_OTHER, base + NvRegIrqMask); |
| 3862 | pci_push(base); |
| 3863 | |
| 3864 | if (!np->in_shutdown) { |
| 3865 | np->nic_poll_irq |= NVREG_IRQ_OTHER; |
| 3866 | mod_timer(&np->nic_poll, jiffies + POLL_WAIT); |
| 3867 | } |
Peter Zijlstra | 0a07bc6 | 2006-09-19 14:55:22 +0200 | [diff] [blame] | 3868 | spin_unlock_irqrestore(&np->lock, flags); |
Timo Jantunen | 1a2b733 | 2007-08-14 21:56:57 +0300 | [diff] [blame] | 3869 | printk(KERN_DEBUG "%s: too many iterations (%d) in nv_nic_irq_other.\n", dev->name, i); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3870 | break; |
| 3871 | } |
| 3872 | |
| 3873 | } |
| 3874 | dprintk(KERN_DEBUG "%s: nv_nic_irq_other completed\n", dev->name); |
| 3875 | |
| 3876 | return IRQ_RETVAL(i); |
| 3877 | } |
| 3878 | |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 3879 | static irqreturn_t nv_nic_irq_test(int foo, void *data) |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 3880 | { |
| 3881 | struct net_device *dev = (struct net_device *) data; |
| 3882 | struct fe_priv *np = netdev_priv(dev); |
| 3883 | u8 __iomem *base = get_hwbase(dev); |
| 3884 | u32 events; |
| 3885 | |
| 3886 | dprintk(KERN_DEBUG "%s: nv_nic_irq_test\n", dev->name); |
| 3887 | |
| 3888 | if (!(np->msi_flags & NV_MSI_X_ENABLED)) { |
| 3889 | events = readl(base + NvRegIrqStatus) & NVREG_IRQSTAT_MASK; |
| 3890 | writel(NVREG_IRQ_TIMER, base + NvRegIrqStatus); |
| 3891 | } else { |
| 3892 | events = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQSTAT_MASK; |
| 3893 | writel(NVREG_IRQ_TIMER, base + NvRegMSIXIrqStatus); |
| 3894 | } |
| 3895 | pci_push(base); |
| 3896 | dprintk(KERN_DEBUG "%s: irq: %08x\n", dev->name, events); |
| 3897 | if (!(events & NVREG_IRQ_TIMER)) |
| 3898 | return IRQ_RETVAL(0); |
| 3899 | |
Ayaz Abdulla | 4db0ee17 | 2008-06-09 16:51:06 -0700 | [diff] [blame] | 3900 | nv_msi_workaround(np); |
| 3901 | |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 3902 | spin_lock(&np->lock); |
| 3903 | np->intr_test = 1; |
| 3904 | spin_unlock(&np->lock); |
| 3905 | |
| 3906 | dprintk(KERN_DEBUG "%s: nv_nic_irq_test completed\n", dev->name); |
| 3907 | |
| 3908 | return IRQ_RETVAL(1); |
| 3909 | } |
| 3910 | |
Ayaz Abdulla | 7a1854b | 2006-06-10 22:48:08 -0400 | [diff] [blame] | 3911 | static void set_msix_vector_map(struct net_device *dev, u32 vector, u32 irqmask) |
| 3912 | { |
| 3913 | u8 __iomem *base = get_hwbase(dev); |
| 3914 | int i; |
| 3915 | u32 msixmap = 0; |
| 3916 | |
| 3917 | /* Each interrupt bit can be mapped to a MSIX vector (4 bits). |
| 3918 | * MSIXMap0 represents the first 8 interrupts and MSIXMap1 represents |
| 3919 | * the remaining 8 interrupts. |
| 3920 | */ |
| 3921 | for (i = 0; i < 8; i++) { |
| 3922 | if ((irqmask >> i) & 0x1) { |
| 3923 | msixmap |= vector << (i << 2); |
| 3924 | } |
| 3925 | } |
| 3926 | writel(readl(base + NvRegMSIXMap0) | msixmap, base + NvRegMSIXMap0); |
| 3927 | |
| 3928 | msixmap = 0; |
| 3929 | for (i = 0; i < 8; i++) { |
| 3930 | if ((irqmask >> (i + 8)) & 0x1) { |
| 3931 | msixmap |= vector << (i << 2); |
| 3932 | } |
| 3933 | } |
| 3934 | writel(readl(base + NvRegMSIXMap1) | msixmap, base + NvRegMSIXMap1); |
| 3935 | } |
| 3936 | |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 3937 | static int nv_request_irq(struct net_device *dev, int intr_test) |
Ayaz Abdulla | 7a1854b | 2006-06-10 22:48:08 -0400 | [diff] [blame] | 3938 | { |
| 3939 | struct fe_priv *np = get_nvpriv(dev); |
| 3940 | u8 __iomem *base = get_hwbase(dev); |
| 3941 | int ret = 1; |
| 3942 | int i; |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 3943 | irqreturn_t (*handler)(int foo, void *data); |
| 3944 | |
| 3945 | if (intr_test) { |
| 3946 | handler = nv_nic_irq_test; |
| 3947 | } else { |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 3948 | if (nv_optimized(np)) |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 3949 | handler = nv_nic_irq_optimized; |
| 3950 | else |
| 3951 | handler = nv_nic_irq; |
| 3952 | } |
Ayaz Abdulla | 7a1854b | 2006-06-10 22:48:08 -0400 | [diff] [blame] | 3953 | |
| 3954 | if (np->msi_flags & NV_MSI_X_CAPABLE) { |
| 3955 | for (i = 0; i < (np->msi_flags & NV_MSI_X_VECTORS_MASK); i++) { |
| 3956 | np->msi_x_entry[i].entry = i; |
| 3957 | } |
| 3958 | if ((ret = pci_enable_msix(np->pci_dev, np->msi_x_entry, (np->msi_flags & NV_MSI_X_VECTORS_MASK))) == 0) { |
| 3959 | np->msi_flags |= NV_MSI_X_ENABLED; |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 3960 | if (optimization_mode == NV_OPTIMIZATION_MODE_THROUGHPUT && !intr_test) { |
Ayaz Abdulla | 7a1854b | 2006-06-10 22:48:08 -0400 | [diff] [blame] | 3961 | /* Request irq for rx handling */ |
Yinghai Lu | ddb213f | 2009-02-06 01:29:23 -0800 | [diff] [blame] | 3962 | sprintf(np->name_rx, "%s-rx", dev->name); |
| 3963 | if (request_irq(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector, |
| 3964 | &nv_nic_irq_rx, IRQF_SHARED, np->name_rx, dev) != 0) { |
Ayaz Abdulla | 7a1854b | 2006-06-10 22:48:08 -0400 | [diff] [blame] | 3965 | printk(KERN_INFO "forcedeth: request_irq failed for rx %d\n", ret); |
| 3966 | pci_disable_msix(np->pci_dev); |
| 3967 | np->msi_flags &= ~NV_MSI_X_ENABLED; |
| 3968 | goto out_err; |
| 3969 | } |
| 3970 | /* Request irq for tx handling */ |
Yinghai Lu | ddb213f | 2009-02-06 01:29:23 -0800 | [diff] [blame] | 3971 | sprintf(np->name_tx, "%s-tx", dev->name); |
| 3972 | if (request_irq(np->msi_x_entry[NV_MSI_X_VECTOR_TX].vector, |
| 3973 | &nv_nic_irq_tx, IRQF_SHARED, np->name_tx, dev) != 0) { |
Ayaz Abdulla | 7a1854b | 2006-06-10 22:48:08 -0400 | [diff] [blame] | 3974 | printk(KERN_INFO "forcedeth: request_irq failed for tx %d\n", ret); |
| 3975 | pci_disable_msix(np->pci_dev); |
| 3976 | np->msi_flags &= ~NV_MSI_X_ENABLED; |
| 3977 | goto out_free_rx; |
| 3978 | } |
| 3979 | /* Request irq for link and timer handling */ |
Yinghai Lu | ddb213f | 2009-02-06 01:29:23 -0800 | [diff] [blame] | 3980 | sprintf(np->name_other, "%s-other", dev->name); |
| 3981 | if (request_irq(np->msi_x_entry[NV_MSI_X_VECTOR_OTHER].vector, |
| 3982 | &nv_nic_irq_other, IRQF_SHARED, np->name_other, dev) != 0) { |
Ayaz Abdulla | 7a1854b | 2006-06-10 22:48:08 -0400 | [diff] [blame] | 3983 | printk(KERN_INFO "forcedeth: request_irq failed for link %d\n", ret); |
| 3984 | pci_disable_msix(np->pci_dev); |
| 3985 | np->msi_flags &= ~NV_MSI_X_ENABLED; |
| 3986 | goto out_free_tx; |
| 3987 | } |
| 3988 | /* map interrupts to their respective vector */ |
| 3989 | writel(0, base + NvRegMSIXMap0); |
| 3990 | writel(0, base + NvRegMSIXMap1); |
| 3991 | set_msix_vector_map(dev, NV_MSI_X_VECTOR_RX, NVREG_IRQ_RX_ALL); |
| 3992 | set_msix_vector_map(dev, NV_MSI_X_VECTOR_TX, NVREG_IRQ_TX_ALL); |
| 3993 | set_msix_vector_map(dev, NV_MSI_X_VECTOR_OTHER, NVREG_IRQ_OTHER); |
| 3994 | } else { |
| 3995 | /* Request irq for all interrupts */ |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 3996 | if (request_irq(np->msi_x_entry[NV_MSI_X_VECTOR_ALL].vector, handler, IRQF_SHARED, dev->name, dev) != 0) { |
Ayaz Abdulla | 7a1854b | 2006-06-10 22:48:08 -0400 | [diff] [blame] | 3997 | printk(KERN_INFO "forcedeth: request_irq failed %d\n", ret); |
| 3998 | pci_disable_msix(np->pci_dev); |
| 3999 | np->msi_flags &= ~NV_MSI_X_ENABLED; |
| 4000 | goto out_err; |
| 4001 | } |
| 4002 | |
| 4003 | /* map interrupts to vector 0 */ |
| 4004 | writel(0, base + NvRegMSIXMap0); |
| 4005 | writel(0, base + NvRegMSIXMap1); |
| 4006 | } |
| 4007 | } |
| 4008 | } |
| 4009 | if (ret != 0 && np->msi_flags & NV_MSI_CAPABLE) { |
| 4010 | if ((ret = pci_enable_msi(np->pci_dev)) == 0) { |
| 4011 | np->msi_flags |= NV_MSI_ENABLED; |
Manfred Spraul | a747590 | 2007-10-17 21:52:33 +0200 | [diff] [blame] | 4012 | dev->irq = np->pci_dev->irq; |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 4013 | if (request_irq(np->pci_dev->irq, handler, IRQF_SHARED, dev->name, dev) != 0) { |
Ayaz Abdulla | 7a1854b | 2006-06-10 22:48:08 -0400 | [diff] [blame] | 4014 | printk(KERN_INFO "forcedeth: request_irq failed %d\n", ret); |
| 4015 | pci_disable_msi(np->pci_dev); |
| 4016 | np->msi_flags &= ~NV_MSI_ENABLED; |
Manfred Spraul | a747590 | 2007-10-17 21:52:33 +0200 | [diff] [blame] | 4017 | dev->irq = np->pci_dev->irq; |
Ayaz Abdulla | 7a1854b | 2006-06-10 22:48:08 -0400 | [diff] [blame] | 4018 | goto out_err; |
| 4019 | } |
| 4020 | |
| 4021 | /* map interrupts to vector 0 */ |
| 4022 | writel(0, base + NvRegMSIMap0); |
| 4023 | writel(0, base + NvRegMSIMap1); |
| 4024 | /* enable msi vector 0 */ |
| 4025 | writel(NVREG_MSI_VECTOR_0_ENABLED, base + NvRegMSIIrqMask); |
| 4026 | } |
| 4027 | } |
| 4028 | if (ret != 0) { |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 4029 | if (request_irq(np->pci_dev->irq, handler, IRQF_SHARED, dev->name, dev) != 0) |
Ayaz Abdulla | 7a1854b | 2006-06-10 22:48:08 -0400 | [diff] [blame] | 4030 | goto out_err; |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 4031 | |
Ayaz Abdulla | 7a1854b | 2006-06-10 22:48:08 -0400 | [diff] [blame] | 4032 | } |
| 4033 | |
| 4034 | return 0; |
| 4035 | out_free_tx: |
| 4036 | free_irq(np->msi_x_entry[NV_MSI_X_VECTOR_TX].vector, dev); |
| 4037 | out_free_rx: |
| 4038 | free_irq(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector, dev); |
| 4039 | out_err: |
| 4040 | return 1; |
| 4041 | } |
| 4042 | |
| 4043 | static void nv_free_irq(struct net_device *dev) |
| 4044 | { |
| 4045 | struct fe_priv *np = get_nvpriv(dev); |
| 4046 | int i; |
| 4047 | |
| 4048 | if (np->msi_flags & NV_MSI_X_ENABLED) { |
| 4049 | for (i = 0; i < (np->msi_flags & NV_MSI_X_VECTORS_MASK); i++) { |
| 4050 | free_irq(np->msi_x_entry[i].vector, dev); |
| 4051 | } |
| 4052 | pci_disable_msix(np->pci_dev); |
| 4053 | np->msi_flags &= ~NV_MSI_X_ENABLED; |
| 4054 | } else { |
| 4055 | free_irq(np->pci_dev->irq, dev); |
| 4056 | if (np->msi_flags & NV_MSI_ENABLED) { |
| 4057 | pci_disable_msi(np->pci_dev); |
| 4058 | np->msi_flags &= ~NV_MSI_ENABLED; |
| 4059 | } |
| 4060 | } |
| 4061 | } |
| 4062 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4063 | static void nv_do_nic_poll(unsigned long data) |
| 4064 | { |
| 4065 | struct net_device *dev = (struct net_device *) data; |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 4066 | struct fe_priv *np = netdev_priv(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4067 | u8 __iomem *base = get_hwbase(dev); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 4068 | u32 mask = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4069 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4070 | /* |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 4071 | * First disable irq(s) and then |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4072 | * reenable interrupts on the nic, we have to do this before calling |
| 4073 | * nv_nic_irq because that may decide to do otherwise |
| 4074 | */ |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 4075 | |
Ayaz Abdulla | 84b3932 | 2006-05-20 14:59:48 -0700 | [diff] [blame] | 4076 | if (!using_multi_irqs(dev)) { |
| 4077 | if (np->msi_flags & NV_MSI_X_ENABLED) |
Ingo Molnar | 8688cfc | 2006-07-03 00:25:39 -0700 | [diff] [blame] | 4078 | disable_irq_lockdep(np->msi_x_entry[NV_MSI_X_VECTOR_ALL].vector); |
Ayaz Abdulla | 84b3932 | 2006-05-20 14:59:48 -0700 | [diff] [blame] | 4079 | else |
Manfred Spraul | a747590 | 2007-10-17 21:52:33 +0200 | [diff] [blame] | 4080 | disable_irq_lockdep(np->pci_dev->irq); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 4081 | mask = np->irqmask; |
| 4082 | } else { |
| 4083 | if (np->nic_poll_irq & NVREG_IRQ_RX_ALL) { |
Ingo Molnar | 8688cfc | 2006-07-03 00:25:39 -0700 | [diff] [blame] | 4084 | disable_irq_lockdep(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 4085 | mask |= NVREG_IRQ_RX_ALL; |
| 4086 | } |
| 4087 | if (np->nic_poll_irq & NVREG_IRQ_TX_ALL) { |
Ingo Molnar | 8688cfc | 2006-07-03 00:25:39 -0700 | [diff] [blame] | 4088 | disable_irq_lockdep(np->msi_x_entry[NV_MSI_X_VECTOR_TX].vector); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 4089 | mask |= NVREG_IRQ_TX_ALL; |
| 4090 | } |
| 4091 | if (np->nic_poll_irq & NVREG_IRQ_OTHER) { |
Ingo Molnar | 8688cfc | 2006-07-03 00:25:39 -0700 | [diff] [blame] | 4092 | disable_irq_lockdep(np->msi_x_entry[NV_MSI_X_VECTOR_OTHER].vector); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 4093 | mask |= NVREG_IRQ_OTHER; |
| 4094 | } |
| 4095 | } |
Manfred Spraul | a747590 | 2007-10-17 21:52:33 +0200 | [diff] [blame] | 4096 | /* disable_irq() contains synchronize_irq, thus no irq handler can run now */ |
| 4097 | |
Ayaz Abdulla | c5cf910 | 2006-10-30 17:32:01 -0500 | [diff] [blame] | 4098 | if (np->recover_error) { |
| 4099 | np->recover_error = 0; |
Ayaz Abdulla | daa91a9 | 2009-02-07 00:25:00 -0800 | [diff] [blame] | 4100 | printk(KERN_INFO "%s: MAC in recoverable error state\n", dev->name); |
Ayaz Abdulla | c5cf910 | 2006-10-30 17:32:01 -0500 | [diff] [blame] | 4101 | if (netif_running(dev)) { |
| 4102 | netif_tx_lock_bh(dev); |
David S. Miller | e308a5d | 2008-07-15 00:13:44 -0700 | [diff] [blame] | 4103 | netif_addr_lock(dev); |
Ayaz Abdulla | c5cf910 | 2006-10-30 17:32:01 -0500 | [diff] [blame] | 4104 | spin_lock(&np->lock); |
| 4105 | /* stop engines */ |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 4106 | nv_stop_rxtx(dev); |
Ayaz Abdulla | daa91a9 | 2009-02-07 00:25:00 -0800 | [diff] [blame] | 4107 | if (np->driver_data & DEV_HAS_POWER_CNTRL) |
| 4108 | nv_mac_reset(dev); |
Ayaz Abdulla | c5cf910 | 2006-10-30 17:32:01 -0500 | [diff] [blame] | 4109 | nv_txrx_reset(dev); |
| 4110 | /* drain rx queue */ |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 4111 | nv_drain_rxtx(dev); |
Ayaz Abdulla | c5cf910 | 2006-10-30 17:32:01 -0500 | [diff] [blame] | 4112 | /* reinit driver view of the rx queue */ |
| 4113 | set_bufsize(dev); |
| 4114 | if (nv_init_ring(dev)) { |
| 4115 | if (!np->in_shutdown) |
| 4116 | mod_timer(&np->oom_kick, jiffies + OOM_REFILL); |
| 4117 | } |
| 4118 | /* reinit nic view of the rx queue */ |
| 4119 | writel(np->rx_buf_sz, base + NvRegOffloadConfig); |
| 4120 | setup_hw_rings(dev, NV_SETUP_RX_RING | NV_SETUP_TX_RING); |
| 4121 | writel( ((np->rx_ring_size-1) << NVREG_RINGSZ_RXSHIFT) + ((np->tx_ring_size-1) << NVREG_RINGSZ_TXSHIFT), |
| 4122 | base + NvRegRingSizes); |
| 4123 | pci_push(base); |
| 4124 | writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl); |
| 4125 | pci_push(base); |
Ayaz Abdulla | daa91a9 | 2009-02-07 00:25:00 -0800 | [diff] [blame] | 4126 | /* clear interrupts */ |
| 4127 | if (!(np->msi_flags & NV_MSI_X_ENABLED)) |
| 4128 | writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus); |
| 4129 | else |
| 4130 | writel(NVREG_IRQSTAT_MASK, base + NvRegMSIXIrqStatus); |
Ayaz Abdulla | c5cf910 | 2006-10-30 17:32:01 -0500 | [diff] [blame] | 4131 | |
| 4132 | /* restart rx engine */ |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 4133 | nv_start_rxtx(dev); |
Ayaz Abdulla | c5cf910 | 2006-10-30 17:32:01 -0500 | [diff] [blame] | 4134 | spin_unlock(&np->lock); |
David S. Miller | e308a5d | 2008-07-15 00:13:44 -0700 | [diff] [blame] | 4135 | netif_addr_unlock(dev); |
Ayaz Abdulla | c5cf910 | 2006-10-30 17:32:01 -0500 | [diff] [blame] | 4136 | netif_tx_unlock_bh(dev); |
| 4137 | } |
| 4138 | } |
| 4139 | |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 4140 | writel(mask, base + NvRegIrqMask); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4141 | pci_push(base); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 4142 | |
Ayaz Abdulla | 84b3932 | 2006-05-20 14:59:48 -0700 | [diff] [blame] | 4143 | if (!using_multi_irqs(dev)) { |
Yinghai Lu | 79d30a5 | 2009-02-06 01:30:01 -0800 | [diff] [blame] | 4144 | np->nic_poll_irq = 0; |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 4145 | if (nv_optimized(np)) |
Ayaz Abdulla | fcc5f26 | 2007-03-23 05:49:37 -0500 | [diff] [blame] | 4146 | nv_nic_irq_optimized(0, dev); |
| 4147 | else |
| 4148 | nv_nic_irq(0, dev); |
Ayaz Abdulla | 84b3932 | 2006-05-20 14:59:48 -0700 | [diff] [blame] | 4149 | if (np->msi_flags & NV_MSI_X_ENABLED) |
Ingo Molnar | 8688cfc | 2006-07-03 00:25:39 -0700 | [diff] [blame] | 4150 | enable_irq_lockdep(np->msi_x_entry[NV_MSI_X_VECTOR_ALL].vector); |
Ayaz Abdulla | 84b3932 | 2006-05-20 14:59:48 -0700 | [diff] [blame] | 4151 | else |
Manfred Spraul | a747590 | 2007-10-17 21:52:33 +0200 | [diff] [blame] | 4152 | enable_irq_lockdep(np->pci_dev->irq); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 4153 | } else { |
| 4154 | if (np->nic_poll_irq & NVREG_IRQ_RX_ALL) { |
Yinghai Lu | 79d30a5 | 2009-02-06 01:30:01 -0800 | [diff] [blame] | 4155 | np->nic_poll_irq &= ~NVREG_IRQ_RX_ALL; |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 4156 | nv_nic_irq_rx(0, dev); |
Ingo Molnar | 8688cfc | 2006-07-03 00:25:39 -0700 | [diff] [blame] | 4157 | enable_irq_lockdep(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 4158 | } |
| 4159 | if (np->nic_poll_irq & NVREG_IRQ_TX_ALL) { |
Yinghai Lu | 79d30a5 | 2009-02-06 01:30:01 -0800 | [diff] [blame] | 4160 | np->nic_poll_irq &= ~NVREG_IRQ_TX_ALL; |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 4161 | nv_nic_irq_tx(0, dev); |
Ingo Molnar | 8688cfc | 2006-07-03 00:25:39 -0700 | [diff] [blame] | 4162 | enable_irq_lockdep(np->msi_x_entry[NV_MSI_X_VECTOR_TX].vector); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 4163 | } |
| 4164 | if (np->nic_poll_irq & NVREG_IRQ_OTHER) { |
Yinghai Lu | 79d30a5 | 2009-02-06 01:30:01 -0800 | [diff] [blame] | 4165 | np->nic_poll_irq &= ~NVREG_IRQ_OTHER; |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 4166 | nv_nic_irq_other(0, dev); |
Ingo Molnar | 8688cfc | 2006-07-03 00:25:39 -0700 | [diff] [blame] | 4167 | enable_irq_lockdep(np->msi_x_entry[NV_MSI_X_VECTOR_OTHER].vector); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 4168 | } |
| 4169 | } |
Yinghai Lu | 79d30a5 | 2009-02-06 01:30:01 -0800 | [diff] [blame] | 4170 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4171 | } |
| 4172 | |
Michal Schmidt | 2918c35 | 2005-05-12 19:42:06 -0400 | [diff] [blame] | 4173 | #ifdef CONFIG_NET_POLL_CONTROLLER |
| 4174 | static void nv_poll_controller(struct net_device *dev) |
| 4175 | { |
| 4176 | nv_do_nic_poll((unsigned long) dev); |
| 4177 | } |
| 4178 | #endif |
| 4179 | |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 4180 | static void nv_do_stats_poll(unsigned long data) |
| 4181 | { |
| 4182 | struct net_device *dev = (struct net_device *) data; |
| 4183 | struct fe_priv *np = netdev_priv(dev); |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 4184 | |
Ayaz Abdulla | 57fff69 | 2007-01-23 12:27:00 -0500 | [diff] [blame] | 4185 | nv_get_hw_stats(dev); |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 4186 | |
| 4187 | if (!np->in_shutdown) |
Daniel Drake | bfebbb8 | 2008-03-18 11:07:18 +0000 | [diff] [blame] | 4188 | mod_timer(&np->stats_poll, |
| 4189 | round_jiffies(jiffies + STATS_INTERVAL)); |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 4190 | } |
| 4191 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4192 | static void nv_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) |
| 4193 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 4194 | struct fe_priv *np = netdev_priv(dev); |
Jeff Garzik | 3f88ce4 | 2007-10-16 04:09:09 -0400 | [diff] [blame] | 4195 | strcpy(info->driver, DRV_NAME); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4196 | strcpy(info->version, FORCEDETH_VERSION); |
| 4197 | strcpy(info->bus_info, pci_name(np->pci_dev)); |
| 4198 | } |
| 4199 | |
| 4200 | static void nv_get_wol(struct net_device *dev, struct ethtool_wolinfo *wolinfo) |
| 4201 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 4202 | struct fe_priv *np = netdev_priv(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4203 | wolinfo->supported = WAKE_MAGIC; |
| 4204 | |
| 4205 | spin_lock_irq(&np->lock); |
| 4206 | if (np->wolenabled) |
| 4207 | wolinfo->wolopts = WAKE_MAGIC; |
| 4208 | spin_unlock_irq(&np->lock); |
| 4209 | } |
| 4210 | |
| 4211 | static int nv_set_wol(struct net_device *dev, struct ethtool_wolinfo *wolinfo) |
| 4212 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 4213 | struct fe_priv *np = netdev_priv(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4214 | u8 __iomem *base = get_hwbase(dev); |
Ayaz Abdulla | c42d9df | 2006-06-10 22:47:52 -0400 | [diff] [blame] | 4215 | u32 flags = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4216 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4217 | if (wolinfo->wolopts == 0) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4218 | np->wolenabled = 0; |
Ayaz Abdulla | c42d9df | 2006-06-10 22:47:52 -0400 | [diff] [blame] | 4219 | } else if (wolinfo->wolopts & WAKE_MAGIC) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4220 | np->wolenabled = 1; |
Ayaz Abdulla | c42d9df | 2006-06-10 22:47:52 -0400 | [diff] [blame] | 4221 | flags = NVREG_WAKEUPFLAGS_ENABLE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4222 | } |
Ayaz Abdulla | c42d9df | 2006-06-10 22:47:52 -0400 | [diff] [blame] | 4223 | if (netif_running(dev)) { |
| 4224 | spin_lock_irq(&np->lock); |
| 4225 | writel(flags, base + NvRegWakeUpFlags); |
| 4226 | spin_unlock_irq(&np->lock); |
| 4227 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4228 | return 0; |
| 4229 | } |
| 4230 | |
| 4231 | static int nv_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd) |
| 4232 | { |
| 4233 | struct fe_priv *np = netdev_priv(dev); |
| 4234 | int adv; |
| 4235 | |
| 4236 | spin_lock_irq(&np->lock); |
| 4237 | ecmd->port = PORT_MII; |
| 4238 | if (!netif_running(dev)) { |
| 4239 | /* We do not track link speed / duplex setting if the |
| 4240 | * interface is disabled. Force a link check */ |
Ayaz Abdulla | f9430a0 | 2006-06-10 22:47:47 -0400 | [diff] [blame] | 4241 | if (nv_update_linkspeed(dev)) { |
| 4242 | if (!netif_carrier_ok(dev)) |
| 4243 | netif_carrier_on(dev); |
| 4244 | } else { |
| 4245 | if (netif_carrier_ok(dev)) |
| 4246 | netif_carrier_off(dev); |
| 4247 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4248 | } |
Ayaz Abdulla | f9430a0 | 2006-06-10 22:47:47 -0400 | [diff] [blame] | 4249 | |
| 4250 | if (netif_carrier_ok(dev)) { |
| 4251 | switch(np->linkspeed & (NVREG_LINKSPEED_MASK)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4252 | case NVREG_LINKSPEED_10: |
| 4253 | ecmd->speed = SPEED_10; |
| 4254 | break; |
| 4255 | case NVREG_LINKSPEED_100: |
| 4256 | ecmd->speed = SPEED_100; |
| 4257 | break; |
| 4258 | case NVREG_LINKSPEED_1000: |
| 4259 | ecmd->speed = SPEED_1000; |
| 4260 | break; |
Ayaz Abdulla | f9430a0 | 2006-06-10 22:47:47 -0400 | [diff] [blame] | 4261 | } |
| 4262 | ecmd->duplex = DUPLEX_HALF; |
| 4263 | if (np->duplex) |
| 4264 | ecmd->duplex = DUPLEX_FULL; |
| 4265 | } else { |
| 4266 | ecmd->speed = -1; |
| 4267 | ecmd->duplex = -1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4268 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4269 | |
| 4270 | ecmd->autoneg = np->autoneg; |
| 4271 | |
| 4272 | ecmd->advertising = ADVERTISED_MII; |
| 4273 | if (np->autoneg) { |
| 4274 | ecmd->advertising |= ADVERTISED_Autoneg; |
| 4275 | adv = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ); |
Ayaz Abdulla | f9430a0 | 2006-06-10 22:47:47 -0400 | [diff] [blame] | 4276 | if (adv & ADVERTISE_10HALF) |
| 4277 | ecmd->advertising |= ADVERTISED_10baseT_Half; |
| 4278 | if (adv & ADVERTISE_10FULL) |
| 4279 | ecmd->advertising |= ADVERTISED_10baseT_Full; |
| 4280 | if (adv & ADVERTISE_100HALF) |
| 4281 | ecmd->advertising |= ADVERTISED_100baseT_Half; |
| 4282 | if (adv & ADVERTISE_100FULL) |
| 4283 | ecmd->advertising |= ADVERTISED_100baseT_Full; |
| 4284 | if (np->gigabit == PHY_GIGABIT) { |
| 4285 | adv = mii_rw(dev, np->phyaddr, MII_CTRL1000, MII_READ); |
| 4286 | if (adv & ADVERTISE_1000FULL) |
| 4287 | ecmd->advertising |= ADVERTISED_1000baseT_Full; |
| 4288 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4289 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4290 | ecmd->supported = (SUPPORTED_Autoneg | |
| 4291 | SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full | |
| 4292 | SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full | |
| 4293 | SUPPORTED_MII); |
| 4294 | if (np->gigabit == PHY_GIGABIT) |
| 4295 | ecmd->supported |= SUPPORTED_1000baseT_Full; |
| 4296 | |
| 4297 | ecmd->phy_address = np->phyaddr; |
| 4298 | ecmd->transceiver = XCVR_EXTERNAL; |
| 4299 | |
| 4300 | /* ignore maxtxpkt, maxrxpkt for now */ |
| 4301 | spin_unlock_irq(&np->lock); |
| 4302 | return 0; |
| 4303 | } |
| 4304 | |
| 4305 | static int nv_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd) |
| 4306 | { |
| 4307 | struct fe_priv *np = netdev_priv(dev); |
| 4308 | |
| 4309 | if (ecmd->port != PORT_MII) |
| 4310 | return -EINVAL; |
| 4311 | if (ecmd->transceiver != XCVR_EXTERNAL) |
| 4312 | return -EINVAL; |
| 4313 | if (ecmd->phy_address != np->phyaddr) { |
| 4314 | /* TODO: support switching between multiple phys. Should be |
| 4315 | * trivial, but not enabled due to lack of test hardware. */ |
| 4316 | return -EINVAL; |
| 4317 | } |
| 4318 | if (ecmd->autoneg == AUTONEG_ENABLE) { |
| 4319 | u32 mask; |
| 4320 | |
| 4321 | mask = ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full | |
| 4322 | ADVERTISED_100baseT_Half | ADVERTISED_100baseT_Full; |
| 4323 | if (np->gigabit == PHY_GIGABIT) |
| 4324 | mask |= ADVERTISED_1000baseT_Full; |
| 4325 | |
| 4326 | if ((ecmd->advertising & mask) == 0) |
| 4327 | return -EINVAL; |
| 4328 | |
| 4329 | } else if (ecmd->autoneg == AUTONEG_DISABLE) { |
| 4330 | /* Note: autonegotiation disable, speed 1000 intentionally |
| 4331 | * forbidden - noone should need that. */ |
| 4332 | |
| 4333 | if (ecmd->speed != SPEED_10 && ecmd->speed != SPEED_100) |
| 4334 | return -EINVAL; |
| 4335 | if (ecmd->duplex != DUPLEX_HALF && ecmd->duplex != DUPLEX_FULL) |
| 4336 | return -EINVAL; |
| 4337 | } else { |
| 4338 | return -EINVAL; |
| 4339 | } |
| 4340 | |
Ayaz Abdulla | f9430a0 | 2006-06-10 22:47:47 -0400 | [diff] [blame] | 4341 | netif_carrier_off(dev); |
| 4342 | if (netif_running(dev)) { |
Tobias Diedrich | 97bff09 | 2008-07-03 23:54:56 -0700 | [diff] [blame] | 4343 | unsigned long flags; |
| 4344 | |
Ayaz Abdulla | f9430a0 | 2006-06-10 22:47:47 -0400 | [diff] [blame] | 4345 | nv_disable_irq(dev); |
Herbert Xu | 58dfd9c | 2006-06-21 10:53:54 +1000 | [diff] [blame] | 4346 | netif_tx_lock_bh(dev); |
David S. Miller | e308a5d | 2008-07-15 00:13:44 -0700 | [diff] [blame] | 4347 | netif_addr_lock(dev); |
Tobias Diedrich | 97bff09 | 2008-07-03 23:54:56 -0700 | [diff] [blame] | 4348 | /* with plain spinlock lockdep complains */ |
| 4349 | spin_lock_irqsave(&np->lock, flags); |
Ayaz Abdulla | f9430a0 | 2006-06-10 22:47:47 -0400 | [diff] [blame] | 4350 | /* stop engines */ |
Tobias Diedrich | 97bff09 | 2008-07-03 23:54:56 -0700 | [diff] [blame] | 4351 | /* FIXME: |
| 4352 | * this can take some time, and interrupts are disabled |
| 4353 | * due to spin_lock_irqsave, but let's hope no daemon |
| 4354 | * is going to change the settings very often... |
| 4355 | * Worst case: |
| 4356 | * NV_RXSTOP_DELAY1MAX + NV_TXSTOP_DELAY1MAX |
| 4357 | * + some minor delays, which is up to a second approximately |
| 4358 | */ |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 4359 | nv_stop_rxtx(dev); |
Tobias Diedrich | 97bff09 | 2008-07-03 23:54:56 -0700 | [diff] [blame] | 4360 | spin_unlock_irqrestore(&np->lock, flags); |
David S. Miller | e308a5d | 2008-07-15 00:13:44 -0700 | [diff] [blame] | 4361 | netif_addr_unlock(dev); |
Herbert Xu | 58dfd9c | 2006-06-21 10:53:54 +1000 | [diff] [blame] | 4362 | netif_tx_unlock_bh(dev); |
Ayaz Abdulla | f9430a0 | 2006-06-10 22:47:47 -0400 | [diff] [blame] | 4363 | } |
| 4364 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4365 | if (ecmd->autoneg == AUTONEG_ENABLE) { |
| 4366 | int adv, bmcr; |
| 4367 | |
| 4368 | np->autoneg = 1; |
| 4369 | |
| 4370 | /* advertise only what has been requested */ |
| 4371 | adv = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ); |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 4372 | adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4 | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4373 | if (ecmd->advertising & ADVERTISED_10baseT_Half) |
| 4374 | adv |= ADVERTISE_10HALF; |
| 4375 | if (ecmd->advertising & ADVERTISED_10baseT_Full) |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 4376 | adv |= ADVERTISE_10FULL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4377 | if (ecmd->advertising & ADVERTISED_100baseT_Half) |
| 4378 | adv |= ADVERTISE_100HALF; |
| 4379 | if (ecmd->advertising & ADVERTISED_100baseT_Full) |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 4380 | adv |= ADVERTISE_100FULL; |
| 4381 | if (np->pause_flags & NV_PAUSEFRAME_RX_REQ) /* for rx we set both advertisments but disable tx pause */ |
| 4382 | adv |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM; |
| 4383 | if (np->pause_flags & NV_PAUSEFRAME_TX_REQ) |
| 4384 | adv |= ADVERTISE_PAUSE_ASYM; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4385 | mii_rw(dev, np->phyaddr, MII_ADVERTISE, adv); |
| 4386 | |
| 4387 | if (np->gigabit == PHY_GIGABIT) { |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 4388 | adv = mii_rw(dev, np->phyaddr, MII_CTRL1000, MII_READ); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4389 | adv &= ~ADVERTISE_1000FULL; |
| 4390 | if (ecmd->advertising & ADVERTISED_1000baseT_Full) |
| 4391 | adv |= ADVERTISE_1000FULL; |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 4392 | mii_rw(dev, np->phyaddr, MII_CTRL1000, adv); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4393 | } |
| 4394 | |
Ayaz Abdulla | f9430a0 | 2006-06-10 22:47:47 -0400 | [diff] [blame] | 4395 | if (netif_running(dev)) |
| 4396 | printk(KERN_INFO "%s: link down.\n", dev->name); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4397 | bmcr = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ); |
Ayaz Abdulla | edf7e5e | 2006-08-24 15:43:42 -0400 | [diff] [blame] | 4398 | if (np->phy_model == PHY_MODEL_MARVELL_E3016) { |
| 4399 | bmcr |= BMCR_ANENABLE; |
| 4400 | /* reset the phy in order for settings to stick, |
| 4401 | * and cause autoneg to start */ |
| 4402 | if (phy_reset(dev, bmcr)) { |
| 4403 | printk(KERN_INFO "%s: phy reset failed\n", dev->name); |
| 4404 | return -EINVAL; |
| 4405 | } |
| 4406 | } else { |
| 4407 | bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART); |
| 4408 | mii_rw(dev, np->phyaddr, MII_BMCR, bmcr); |
| 4409 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4410 | } else { |
| 4411 | int adv, bmcr; |
| 4412 | |
| 4413 | np->autoneg = 0; |
| 4414 | |
| 4415 | adv = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ); |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 4416 | adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4 | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4417 | if (ecmd->speed == SPEED_10 && ecmd->duplex == DUPLEX_HALF) |
| 4418 | adv |= ADVERTISE_10HALF; |
| 4419 | if (ecmd->speed == SPEED_10 && ecmd->duplex == DUPLEX_FULL) |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 4420 | adv |= ADVERTISE_10FULL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4421 | if (ecmd->speed == SPEED_100 && ecmd->duplex == DUPLEX_HALF) |
| 4422 | adv |= ADVERTISE_100HALF; |
| 4423 | if (ecmd->speed == SPEED_100 && ecmd->duplex == DUPLEX_FULL) |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 4424 | adv |= ADVERTISE_100FULL; |
| 4425 | np->pause_flags &= ~(NV_PAUSEFRAME_AUTONEG|NV_PAUSEFRAME_RX_ENABLE|NV_PAUSEFRAME_TX_ENABLE); |
| 4426 | if (np->pause_flags & NV_PAUSEFRAME_RX_REQ) {/* for rx we set both advertisments but disable tx pause */ |
| 4427 | adv |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM; |
| 4428 | np->pause_flags |= NV_PAUSEFRAME_RX_ENABLE; |
| 4429 | } |
| 4430 | if (np->pause_flags & NV_PAUSEFRAME_TX_REQ) { |
| 4431 | adv |= ADVERTISE_PAUSE_ASYM; |
| 4432 | np->pause_flags |= NV_PAUSEFRAME_TX_ENABLE; |
| 4433 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4434 | mii_rw(dev, np->phyaddr, MII_ADVERTISE, adv); |
| 4435 | np->fixed_mode = adv; |
| 4436 | |
| 4437 | if (np->gigabit == PHY_GIGABIT) { |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 4438 | adv = mii_rw(dev, np->phyaddr, MII_CTRL1000, MII_READ); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4439 | adv &= ~ADVERTISE_1000FULL; |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 4440 | mii_rw(dev, np->phyaddr, MII_CTRL1000, adv); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4441 | } |
| 4442 | |
| 4443 | bmcr = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ); |
Ayaz Abdulla | f9430a0 | 2006-06-10 22:47:47 -0400 | [diff] [blame] | 4444 | bmcr &= ~(BMCR_ANENABLE|BMCR_SPEED100|BMCR_SPEED1000|BMCR_FULLDPLX); |
| 4445 | if (np->fixed_mode & (ADVERTISE_10FULL|ADVERTISE_100FULL)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4446 | bmcr |= BMCR_FULLDPLX; |
Ayaz Abdulla | f9430a0 | 2006-06-10 22:47:47 -0400 | [diff] [blame] | 4447 | if (np->fixed_mode & (ADVERTISE_100HALF|ADVERTISE_100FULL)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4448 | bmcr |= BMCR_SPEED100; |
Ayaz Abdulla | f9430a0 | 2006-06-10 22:47:47 -0400 | [diff] [blame] | 4449 | if (np->phy_oui == PHY_OUI_MARVELL) { |
Ayaz Abdulla | edf7e5e | 2006-08-24 15:43:42 -0400 | [diff] [blame] | 4450 | /* reset the phy in order for forced mode settings to stick */ |
| 4451 | if (phy_reset(dev, bmcr)) { |
Ayaz Abdulla | f9430a0 | 2006-06-10 22:47:47 -0400 | [diff] [blame] | 4452 | printk(KERN_INFO "%s: phy reset failed\n", dev->name); |
| 4453 | return -EINVAL; |
| 4454 | } |
Ayaz Abdulla | edf7e5e | 2006-08-24 15:43:42 -0400 | [diff] [blame] | 4455 | } else { |
| 4456 | mii_rw(dev, np->phyaddr, MII_BMCR, bmcr); |
| 4457 | if (netif_running(dev)) { |
| 4458 | /* Wait a bit and then reconfigure the nic. */ |
| 4459 | udelay(10); |
| 4460 | nv_linkchange(dev); |
| 4461 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4462 | } |
| 4463 | } |
Ayaz Abdulla | f9430a0 | 2006-06-10 22:47:47 -0400 | [diff] [blame] | 4464 | |
| 4465 | if (netif_running(dev)) { |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 4466 | nv_start_rxtx(dev); |
Ayaz Abdulla | f9430a0 | 2006-06-10 22:47:47 -0400 | [diff] [blame] | 4467 | nv_enable_irq(dev); |
| 4468 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4469 | |
| 4470 | return 0; |
| 4471 | } |
| 4472 | |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 4473 | #define FORCEDETH_REGS_VER 1 |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 4474 | |
| 4475 | static int nv_get_regs_len(struct net_device *dev) |
| 4476 | { |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 4477 | struct fe_priv *np = netdev_priv(dev); |
| 4478 | return np->register_size; |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 4479 | } |
| 4480 | |
| 4481 | static void nv_get_regs(struct net_device *dev, struct ethtool_regs *regs, void *buf) |
| 4482 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 4483 | struct fe_priv *np = netdev_priv(dev); |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 4484 | u8 __iomem *base = get_hwbase(dev); |
| 4485 | u32 *rbuf = buf; |
| 4486 | int i; |
| 4487 | |
| 4488 | regs->version = FORCEDETH_REGS_VER; |
| 4489 | spin_lock_irq(&np->lock); |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 4490 | for (i = 0;i <= np->register_size/sizeof(u32); i++) |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 4491 | rbuf[i] = readl(base + i*sizeof(u32)); |
| 4492 | spin_unlock_irq(&np->lock); |
| 4493 | } |
| 4494 | |
| 4495 | static int nv_nway_reset(struct net_device *dev) |
| 4496 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 4497 | struct fe_priv *np = netdev_priv(dev); |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 4498 | int ret; |
| 4499 | |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 4500 | if (np->autoneg) { |
| 4501 | int bmcr; |
| 4502 | |
Ayaz Abdulla | f9430a0 | 2006-06-10 22:47:47 -0400 | [diff] [blame] | 4503 | netif_carrier_off(dev); |
| 4504 | if (netif_running(dev)) { |
| 4505 | nv_disable_irq(dev); |
Herbert Xu | 58dfd9c | 2006-06-21 10:53:54 +1000 | [diff] [blame] | 4506 | netif_tx_lock_bh(dev); |
David S. Miller | e308a5d | 2008-07-15 00:13:44 -0700 | [diff] [blame] | 4507 | netif_addr_lock(dev); |
Ayaz Abdulla | f9430a0 | 2006-06-10 22:47:47 -0400 | [diff] [blame] | 4508 | spin_lock(&np->lock); |
| 4509 | /* stop engines */ |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 4510 | nv_stop_rxtx(dev); |
Ayaz Abdulla | f9430a0 | 2006-06-10 22:47:47 -0400 | [diff] [blame] | 4511 | spin_unlock(&np->lock); |
David S. Miller | e308a5d | 2008-07-15 00:13:44 -0700 | [diff] [blame] | 4512 | netif_addr_unlock(dev); |
Herbert Xu | 58dfd9c | 2006-06-21 10:53:54 +1000 | [diff] [blame] | 4513 | netif_tx_unlock_bh(dev); |
Ayaz Abdulla | f9430a0 | 2006-06-10 22:47:47 -0400 | [diff] [blame] | 4514 | printk(KERN_INFO "%s: link down.\n", dev->name); |
| 4515 | } |
| 4516 | |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 4517 | bmcr = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ); |
Ayaz Abdulla | edf7e5e | 2006-08-24 15:43:42 -0400 | [diff] [blame] | 4518 | if (np->phy_model == PHY_MODEL_MARVELL_E3016) { |
| 4519 | bmcr |= BMCR_ANENABLE; |
| 4520 | /* reset the phy in order for settings to stick*/ |
| 4521 | if (phy_reset(dev, bmcr)) { |
| 4522 | printk(KERN_INFO "%s: phy reset failed\n", dev->name); |
| 4523 | return -EINVAL; |
| 4524 | } |
| 4525 | } else { |
| 4526 | bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART); |
| 4527 | mii_rw(dev, np->phyaddr, MII_BMCR, bmcr); |
| 4528 | } |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 4529 | |
Ayaz Abdulla | f9430a0 | 2006-06-10 22:47:47 -0400 | [diff] [blame] | 4530 | if (netif_running(dev)) { |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 4531 | nv_start_rxtx(dev); |
Ayaz Abdulla | f9430a0 | 2006-06-10 22:47:47 -0400 | [diff] [blame] | 4532 | nv_enable_irq(dev); |
| 4533 | } |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 4534 | ret = 0; |
| 4535 | } else { |
| 4536 | ret = -EINVAL; |
| 4537 | } |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 4538 | |
| 4539 | return ret; |
| 4540 | } |
| 4541 | |
Zachary Amsden | 0674d59 | 2006-06-04 02:51:38 -0700 | [diff] [blame] | 4542 | static int nv_set_tso(struct net_device *dev, u32 value) |
| 4543 | { |
| 4544 | struct fe_priv *np = netdev_priv(dev); |
| 4545 | |
| 4546 | if ((np->driver_data & DEV_HAS_CHECKSUM)) |
| 4547 | return ethtool_op_set_tso(dev, value); |
| 4548 | else |
Ayaz Abdulla | 6a78814 | 2006-06-10 22:47:26 -0400 | [diff] [blame] | 4549 | return -EOPNOTSUPP; |
Zachary Amsden | 0674d59 | 2006-06-04 02:51:38 -0700 | [diff] [blame] | 4550 | } |
Zachary Amsden | 0674d59 | 2006-06-04 02:51:38 -0700 | [diff] [blame] | 4551 | |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 4552 | static void nv_get_ringparam(struct net_device *dev, struct ethtool_ringparam* ring) |
| 4553 | { |
| 4554 | struct fe_priv *np = netdev_priv(dev); |
| 4555 | |
| 4556 | ring->rx_max_pending = (np->desc_ver == DESC_VER_1) ? RING_MAX_DESC_VER_1 : RING_MAX_DESC_VER_2_3; |
| 4557 | ring->rx_mini_max_pending = 0; |
| 4558 | ring->rx_jumbo_max_pending = 0; |
| 4559 | ring->tx_max_pending = (np->desc_ver == DESC_VER_1) ? RING_MAX_DESC_VER_1 : RING_MAX_DESC_VER_2_3; |
| 4560 | |
| 4561 | ring->rx_pending = np->rx_ring_size; |
| 4562 | ring->rx_mini_pending = 0; |
| 4563 | ring->rx_jumbo_pending = 0; |
| 4564 | ring->tx_pending = np->tx_ring_size; |
| 4565 | } |
| 4566 | |
| 4567 | static int nv_set_ringparam(struct net_device *dev, struct ethtool_ringparam* ring) |
| 4568 | { |
| 4569 | struct fe_priv *np = netdev_priv(dev); |
| 4570 | u8 __iomem *base = get_hwbase(dev); |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 4571 | u8 *rxtx_ring, *rx_skbuff, *tx_skbuff; |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 4572 | dma_addr_t ring_addr; |
| 4573 | |
| 4574 | if (ring->rx_pending < RX_RING_MIN || |
| 4575 | ring->tx_pending < TX_RING_MIN || |
| 4576 | ring->rx_mini_pending != 0 || |
| 4577 | ring->rx_jumbo_pending != 0 || |
| 4578 | (np->desc_ver == DESC_VER_1 && |
| 4579 | (ring->rx_pending > RING_MAX_DESC_VER_1 || |
| 4580 | ring->tx_pending > RING_MAX_DESC_VER_1)) || |
| 4581 | (np->desc_ver != DESC_VER_1 && |
| 4582 | (ring->rx_pending > RING_MAX_DESC_VER_2_3 || |
| 4583 | ring->tx_pending > RING_MAX_DESC_VER_2_3))) { |
| 4584 | return -EINVAL; |
| 4585 | } |
| 4586 | |
| 4587 | /* allocate new rings */ |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 4588 | if (!nv_optimized(np)) { |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 4589 | rxtx_ring = pci_alloc_consistent(np->pci_dev, |
| 4590 | sizeof(struct ring_desc) * (ring->rx_pending + ring->tx_pending), |
| 4591 | &ring_addr); |
| 4592 | } else { |
| 4593 | rxtx_ring = pci_alloc_consistent(np->pci_dev, |
| 4594 | sizeof(struct ring_desc_ex) * (ring->rx_pending + ring->tx_pending), |
| 4595 | &ring_addr); |
| 4596 | } |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 4597 | rx_skbuff = kmalloc(sizeof(struct nv_skb_map) * ring->rx_pending, GFP_KERNEL); |
| 4598 | tx_skbuff = kmalloc(sizeof(struct nv_skb_map) * ring->tx_pending, GFP_KERNEL); |
| 4599 | if (!rxtx_ring || !rx_skbuff || !tx_skbuff) { |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 4600 | /* fall back to old rings */ |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 4601 | if (!nv_optimized(np)) { |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 4602 | if (rxtx_ring) |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 4603 | pci_free_consistent(np->pci_dev, sizeof(struct ring_desc) * (ring->rx_pending + ring->tx_pending), |
| 4604 | rxtx_ring, ring_addr); |
| 4605 | } else { |
| 4606 | if (rxtx_ring) |
| 4607 | pci_free_consistent(np->pci_dev, sizeof(struct ring_desc_ex) * (ring->rx_pending + ring->tx_pending), |
| 4608 | rxtx_ring, ring_addr); |
| 4609 | } |
| 4610 | if (rx_skbuff) |
| 4611 | kfree(rx_skbuff); |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 4612 | if (tx_skbuff) |
| 4613 | kfree(tx_skbuff); |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 4614 | goto exit; |
| 4615 | } |
| 4616 | |
| 4617 | if (netif_running(dev)) { |
| 4618 | nv_disable_irq(dev); |
Ayaz Abdulla | 08d9357 | 2009-03-05 08:01:55 +0000 | [diff] [blame] | 4619 | nv_napi_disable(dev); |
Herbert Xu | 58dfd9c | 2006-06-21 10:53:54 +1000 | [diff] [blame] | 4620 | netif_tx_lock_bh(dev); |
David S. Miller | e308a5d | 2008-07-15 00:13:44 -0700 | [diff] [blame] | 4621 | netif_addr_lock(dev); |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 4622 | spin_lock(&np->lock); |
| 4623 | /* stop engines */ |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 4624 | nv_stop_rxtx(dev); |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 4625 | nv_txrx_reset(dev); |
| 4626 | /* drain queues */ |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 4627 | nv_drain_rxtx(dev); |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 4628 | /* delete queues */ |
| 4629 | free_rings(dev); |
| 4630 | } |
| 4631 | |
| 4632 | /* set new values */ |
| 4633 | np->rx_ring_size = ring->rx_pending; |
| 4634 | np->tx_ring_size = ring->tx_pending; |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 4635 | |
| 4636 | if (!nv_optimized(np)) { |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 4637 | np->rx_ring.orig = (struct ring_desc*)rxtx_ring; |
| 4638 | np->tx_ring.orig = &np->rx_ring.orig[np->rx_ring_size]; |
| 4639 | } else { |
| 4640 | np->rx_ring.ex = (struct ring_desc_ex*)rxtx_ring; |
| 4641 | np->tx_ring.ex = &np->rx_ring.ex[np->rx_ring_size]; |
| 4642 | } |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 4643 | np->rx_skb = (struct nv_skb_map*)rx_skbuff; |
| 4644 | np->tx_skb = (struct nv_skb_map*)tx_skbuff; |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 4645 | np->ring_addr = ring_addr; |
| 4646 | |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 4647 | memset(np->rx_skb, 0, sizeof(struct nv_skb_map) * np->rx_ring_size); |
| 4648 | memset(np->tx_skb, 0, sizeof(struct nv_skb_map) * np->tx_ring_size); |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 4649 | |
| 4650 | if (netif_running(dev)) { |
| 4651 | /* reinit driver view of the queues */ |
| 4652 | set_bufsize(dev); |
| 4653 | if (nv_init_ring(dev)) { |
| 4654 | if (!np->in_shutdown) |
| 4655 | mod_timer(&np->oom_kick, jiffies + OOM_REFILL); |
| 4656 | } |
| 4657 | |
| 4658 | /* reinit nic view of the queues */ |
| 4659 | writel(np->rx_buf_sz, base + NvRegOffloadConfig); |
| 4660 | setup_hw_rings(dev, NV_SETUP_RX_RING | NV_SETUP_TX_RING); |
| 4661 | writel( ((np->rx_ring_size-1) << NVREG_RINGSZ_RXSHIFT) + ((np->tx_ring_size-1) << NVREG_RINGSZ_TXSHIFT), |
| 4662 | base + NvRegRingSizes); |
| 4663 | pci_push(base); |
| 4664 | writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl); |
| 4665 | pci_push(base); |
| 4666 | |
| 4667 | /* restart engines */ |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 4668 | nv_start_rxtx(dev); |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 4669 | spin_unlock(&np->lock); |
David S. Miller | e308a5d | 2008-07-15 00:13:44 -0700 | [diff] [blame] | 4670 | netif_addr_unlock(dev); |
Herbert Xu | 58dfd9c | 2006-06-21 10:53:54 +1000 | [diff] [blame] | 4671 | netif_tx_unlock_bh(dev); |
Ayaz Abdulla | 08d9357 | 2009-03-05 08:01:55 +0000 | [diff] [blame] | 4672 | nv_napi_enable(dev); |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 4673 | nv_enable_irq(dev); |
| 4674 | } |
| 4675 | return 0; |
| 4676 | exit: |
| 4677 | return -ENOMEM; |
| 4678 | } |
| 4679 | |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 4680 | static void nv_get_pauseparam(struct net_device *dev, struct ethtool_pauseparam* pause) |
| 4681 | { |
| 4682 | struct fe_priv *np = netdev_priv(dev); |
| 4683 | |
| 4684 | pause->autoneg = (np->pause_flags & NV_PAUSEFRAME_AUTONEG) != 0; |
| 4685 | pause->rx_pause = (np->pause_flags & NV_PAUSEFRAME_RX_ENABLE) != 0; |
| 4686 | pause->tx_pause = (np->pause_flags & NV_PAUSEFRAME_TX_ENABLE) != 0; |
| 4687 | } |
| 4688 | |
| 4689 | static int nv_set_pauseparam(struct net_device *dev, struct ethtool_pauseparam* pause) |
| 4690 | { |
| 4691 | struct fe_priv *np = netdev_priv(dev); |
| 4692 | int adv, bmcr; |
| 4693 | |
| 4694 | if ((!np->autoneg && np->duplex == 0) || |
| 4695 | (np->autoneg && !pause->autoneg && np->duplex == 0)) { |
| 4696 | printk(KERN_INFO "%s: can not set pause settings when forced link is in half duplex.\n", |
| 4697 | dev->name); |
| 4698 | return -EINVAL; |
| 4699 | } |
| 4700 | if (pause->tx_pause && !(np->pause_flags & NV_PAUSEFRAME_TX_CAPABLE)) { |
| 4701 | printk(KERN_INFO "%s: hardware does not support tx pause frames.\n", dev->name); |
| 4702 | return -EINVAL; |
| 4703 | } |
| 4704 | |
| 4705 | netif_carrier_off(dev); |
| 4706 | if (netif_running(dev)) { |
| 4707 | nv_disable_irq(dev); |
Herbert Xu | 58dfd9c | 2006-06-21 10:53:54 +1000 | [diff] [blame] | 4708 | netif_tx_lock_bh(dev); |
David S. Miller | e308a5d | 2008-07-15 00:13:44 -0700 | [diff] [blame] | 4709 | netif_addr_lock(dev); |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 4710 | spin_lock(&np->lock); |
| 4711 | /* stop engines */ |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 4712 | nv_stop_rxtx(dev); |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 4713 | spin_unlock(&np->lock); |
David S. Miller | e308a5d | 2008-07-15 00:13:44 -0700 | [diff] [blame] | 4714 | netif_addr_unlock(dev); |
Herbert Xu | 58dfd9c | 2006-06-21 10:53:54 +1000 | [diff] [blame] | 4715 | netif_tx_unlock_bh(dev); |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 4716 | } |
| 4717 | |
| 4718 | np->pause_flags &= ~(NV_PAUSEFRAME_RX_REQ|NV_PAUSEFRAME_TX_REQ); |
| 4719 | if (pause->rx_pause) |
| 4720 | np->pause_flags |= NV_PAUSEFRAME_RX_REQ; |
| 4721 | if (pause->tx_pause) |
| 4722 | np->pause_flags |= NV_PAUSEFRAME_TX_REQ; |
| 4723 | |
| 4724 | if (np->autoneg && pause->autoneg) { |
| 4725 | np->pause_flags |= NV_PAUSEFRAME_AUTONEG; |
| 4726 | |
| 4727 | adv = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ); |
| 4728 | adv &= ~(ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM); |
| 4729 | if (np->pause_flags & NV_PAUSEFRAME_RX_REQ) /* for rx we set both advertisments but disable tx pause */ |
| 4730 | adv |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM; |
| 4731 | if (np->pause_flags & NV_PAUSEFRAME_TX_REQ) |
| 4732 | adv |= ADVERTISE_PAUSE_ASYM; |
| 4733 | mii_rw(dev, np->phyaddr, MII_ADVERTISE, adv); |
| 4734 | |
| 4735 | if (netif_running(dev)) |
| 4736 | printk(KERN_INFO "%s: link down.\n", dev->name); |
| 4737 | bmcr = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ); |
| 4738 | bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART); |
| 4739 | mii_rw(dev, np->phyaddr, MII_BMCR, bmcr); |
| 4740 | } else { |
| 4741 | np->pause_flags &= ~(NV_PAUSEFRAME_AUTONEG|NV_PAUSEFRAME_RX_ENABLE|NV_PAUSEFRAME_TX_ENABLE); |
| 4742 | if (pause->rx_pause) |
| 4743 | np->pause_flags |= NV_PAUSEFRAME_RX_ENABLE; |
| 4744 | if (pause->tx_pause) |
| 4745 | np->pause_flags |= NV_PAUSEFRAME_TX_ENABLE; |
| 4746 | |
| 4747 | if (!netif_running(dev)) |
| 4748 | nv_update_linkspeed(dev); |
| 4749 | else |
| 4750 | nv_update_pause(dev, np->pause_flags); |
| 4751 | } |
| 4752 | |
| 4753 | if (netif_running(dev)) { |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 4754 | nv_start_rxtx(dev); |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 4755 | nv_enable_irq(dev); |
| 4756 | } |
| 4757 | return 0; |
| 4758 | } |
| 4759 | |
Ayaz Abdulla | 5ed2616 | 2006-06-10 22:47:59 -0400 | [diff] [blame] | 4760 | static u32 nv_get_rx_csum(struct net_device *dev) |
| 4761 | { |
| 4762 | struct fe_priv *np = netdev_priv(dev); |
Ayaz Abdulla | f2ad2d9 | 2006-08-24 17:35:41 -0400 | [diff] [blame] | 4763 | return (np->rx_csum) != 0; |
Ayaz Abdulla | 5ed2616 | 2006-06-10 22:47:59 -0400 | [diff] [blame] | 4764 | } |
| 4765 | |
| 4766 | static int nv_set_rx_csum(struct net_device *dev, u32 data) |
| 4767 | { |
| 4768 | struct fe_priv *np = netdev_priv(dev); |
| 4769 | u8 __iomem *base = get_hwbase(dev); |
| 4770 | int retcode = 0; |
| 4771 | |
| 4772 | if (np->driver_data & DEV_HAS_CHECKSUM) { |
Ayaz Abdulla | 5ed2616 | 2006-06-10 22:47:59 -0400 | [diff] [blame] | 4773 | if (data) { |
Ayaz Abdulla | f2ad2d9 | 2006-08-24 17:35:41 -0400 | [diff] [blame] | 4774 | np->rx_csum = 1; |
Ayaz Abdulla | 5ed2616 | 2006-06-10 22:47:59 -0400 | [diff] [blame] | 4775 | np->txrxctl_bits |= NVREG_TXRXCTL_RXCHECK; |
Ayaz Abdulla | 5ed2616 | 2006-06-10 22:47:59 -0400 | [diff] [blame] | 4776 | } else { |
Ayaz Abdulla | f2ad2d9 | 2006-08-24 17:35:41 -0400 | [diff] [blame] | 4777 | np->rx_csum = 0; |
| 4778 | /* vlan is dependent on rx checksum offload */ |
| 4779 | if (!(np->vlanctl_bits & NVREG_VLANCONTROL_ENABLE)) |
| 4780 | np->txrxctl_bits &= ~NVREG_TXRXCTL_RXCHECK; |
Ayaz Abdulla | 5ed2616 | 2006-06-10 22:47:59 -0400 | [diff] [blame] | 4781 | } |
Ayaz Abdulla | 5ed2616 | 2006-06-10 22:47:59 -0400 | [diff] [blame] | 4782 | if (netif_running(dev)) { |
| 4783 | spin_lock_irq(&np->lock); |
| 4784 | writel(np->txrxctl_bits, base + NvRegTxRxControl); |
| 4785 | spin_unlock_irq(&np->lock); |
| 4786 | } |
| 4787 | } else { |
| 4788 | return -EINVAL; |
| 4789 | } |
| 4790 | |
| 4791 | return retcode; |
| 4792 | } |
| 4793 | |
| 4794 | static int nv_set_tx_csum(struct net_device *dev, u32 data) |
| 4795 | { |
| 4796 | struct fe_priv *np = netdev_priv(dev); |
| 4797 | |
| 4798 | if (np->driver_data & DEV_HAS_CHECKSUM) |
Ayaz Abdulla | c1086cd | 2009-02-07 00:24:39 -0800 | [diff] [blame] | 4799 | return ethtool_op_set_tx_csum(dev, data); |
Ayaz Abdulla | 5ed2616 | 2006-06-10 22:47:59 -0400 | [diff] [blame] | 4800 | else |
| 4801 | return -EOPNOTSUPP; |
| 4802 | } |
| 4803 | |
| 4804 | static int nv_set_sg(struct net_device *dev, u32 data) |
| 4805 | { |
| 4806 | struct fe_priv *np = netdev_priv(dev); |
| 4807 | |
| 4808 | if (np->driver_data & DEV_HAS_CHECKSUM) |
| 4809 | return ethtool_op_set_sg(dev, data); |
| 4810 | else |
| 4811 | return -EOPNOTSUPP; |
| 4812 | } |
| 4813 | |
Jeff Garzik | b9f2c04 | 2007-10-03 18:07:32 -0700 | [diff] [blame] | 4814 | static int nv_get_sset_count(struct net_device *dev, int sset) |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 4815 | { |
| 4816 | struct fe_priv *np = netdev_priv(dev); |
| 4817 | |
Jeff Garzik | b9f2c04 | 2007-10-03 18:07:32 -0700 | [diff] [blame] | 4818 | switch (sset) { |
| 4819 | case ETH_SS_TEST: |
| 4820 | if (np->driver_data & DEV_HAS_TEST_EXTENDED) |
| 4821 | return NV_TEST_COUNT_EXTENDED; |
| 4822 | else |
| 4823 | return NV_TEST_COUNT_BASE; |
| 4824 | case ETH_SS_STATS: |
Ayaz Abdulla | 8ed1454 | 2009-03-05 08:01:49 +0000 | [diff] [blame] | 4825 | if (np->driver_data & DEV_HAS_STATISTICS_V3) |
| 4826 | return NV_DEV_STATISTICS_V3_COUNT; |
Jeff Garzik | b9f2c04 | 2007-10-03 18:07:32 -0700 | [diff] [blame] | 4827 | else if (np->driver_data & DEV_HAS_STATISTICS_V2) |
| 4828 | return NV_DEV_STATISTICS_V2_COUNT; |
Ayaz Abdulla | 8ed1454 | 2009-03-05 08:01:49 +0000 | [diff] [blame] | 4829 | else if (np->driver_data & DEV_HAS_STATISTICS_V1) |
| 4830 | return NV_DEV_STATISTICS_V1_COUNT; |
Jeff Garzik | b9f2c04 | 2007-10-03 18:07:32 -0700 | [diff] [blame] | 4831 | else |
| 4832 | return 0; |
| 4833 | default: |
| 4834 | return -EOPNOTSUPP; |
| 4835 | } |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 4836 | } |
| 4837 | |
| 4838 | static void nv_get_ethtool_stats(struct net_device *dev, struct ethtool_stats *estats, u64 *buffer) |
| 4839 | { |
| 4840 | struct fe_priv *np = netdev_priv(dev); |
| 4841 | |
| 4842 | /* update stats */ |
| 4843 | nv_do_stats_poll((unsigned long)dev); |
| 4844 | |
Jeff Garzik | b9f2c04 | 2007-10-03 18:07:32 -0700 | [diff] [blame] | 4845 | memcpy(buffer, &np->estats, nv_get_sset_count(dev, ETH_SS_STATS)*sizeof(u64)); |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 4846 | } |
| 4847 | |
| 4848 | static int nv_link_test(struct net_device *dev) |
| 4849 | { |
| 4850 | struct fe_priv *np = netdev_priv(dev); |
| 4851 | int mii_status; |
| 4852 | |
| 4853 | mii_rw(dev, np->phyaddr, MII_BMSR, MII_READ); |
| 4854 | mii_status = mii_rw(dev, np->phyaddr, MII_BMSR, MII_READ); |
| 4855 | |
| 4856 | /* check phy link status */ |
| 4857 | if (!(mii_status & BMSR_LSTATUS)) |
| 4858 | return 0; |
| 4859 | else |
| 4860 | return 1; |
| 4861 | } |
| 4862 | |
| 4863 | static int nv_register_test(struct net_device *dev) |
| 4864 | { |
| 4865 | u8 __iomem *base = get_hwbase(dev); |
| 4866 | int i = 0; |
| 4867 | u32 orig_read, new_read; |
| 4868 | |
| 4869 | do { |
| 4870 | orig_read = readl(base + nv_registers_test[i].reg); |
| 4871 | |
| 4872 | /* xor with mask to toggle bits */ |
| 4873 | orig_read ^= nv_registers_test[i].mask; |
| 4874 | |
| 4875 | writel(orig_read, base + nv_registers_test[i].reg); |
| 4876 | |
| 4877 | new_read = readl(base + nv_registers_test[i].reg); |
| 4878 | |
| 4879 | if ((new_read & nv_registers_test[i].mask) != (orig_read & nv_registers_test[i].mask)) |
| 4880 | return 0; |
| 4881 | |
| 4882 | /* restore original value */ |
| 4883 | orig_read ^= nv_registers_test[i].mask; |
| 4884 | writel(orig_read, base + nv_registers_test[i].reg); |
| 4885 | |
| 4886 | } while (nv_registers_test[++i].reg != 0); |
| 4887 | |
| 4888 | return 1; |
| 4889 | } |
| 4890 | |
| 4891 | static int nv_interrupt_test(struct net_device *dev) |
| 4892 | { |
| 4893 | struct fe_priv *np = netdev_priv(dev); |
| 4894 | u8 __iomem *base = get_hwbase(dev); |
| 4895 | int ret = 1; |
| 4896 | int testcnt; |
| 4897 | u32 save_msi_flags, save_poll_interval = 0; |
| 4898 | |
| 4899 | if (netif_running(dev)) { |
| 4900 | /* free current irq */ |
| 4901 | nv_free_irq(dev); |
| 4902 | save_poll_interval = readl(base+NvRegPollingInterval); |
| 4903 | } |
| 4904 | |
| 4905 | /* flag to test interrupt handler */ |
| 4906 | np->intr_test = 0; |
| 4907 | |
| 4908 | /* setup test irq */ |
| 4909 | save_msi_flags = np->msi_flags; |
| 4910 | np->msi_flags &= ~NV_MSI_X_VECTORS_MASK; |
| 4911 | np->msi_flags |= 0x001; /* setup 1 vector */ |
| 4912 | if (nv_request_irq(dev, 1)) |
| 4913 | return 0; |
| 4914 | |
| 4915 | /* setup timer interrupt */ |
| 4916 | writel(NVREG_POLL_DEFAULT_CPU, base + NvRegPollingInterval); |
| 4917 | writel(NVREG_UNKSETUP6_VAL, base + NvRegUnknownSetupReg6); |
| 4918 | |
| 4919 | nv_enable_hw_interrupts(dev, NVREG_IRQ_TIMER); |
| 4920 | |
| 4921 | /* wait for at least one interrupt */ |
| 4922 | msleep(100); |
| 4923 | |
| 4924 | spin_lock_irq(&np->lock); |
| 4925 | |
| 4926 | /* flag should be set within ISR */ |
| 4927 | testcnt = np->intr_test; |
| 4928 | if (!testcnt) |
| 4929 | ret = 2; |
| 4930 | |
| 4931 | nv_disable_hw_interrupts(dev, NVREG_IRQ_TIMER); |
| 4932 | if (!(np->msi_flags & NV_MSI_X_ENABLED)) |
| 4933 | writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus); |
| 4934 | else |
| 4935 | writel(NVREG_IRQSTAT_MASK, base + NvRegMSIXIrqStatus); |
| 4936 | |
| 4937 | spin_unlock_irq(&np->lock); |
| 4938 | |
| 4939 | nv_free_irq(dev); |
| 4940 | |
| 4941 | np->msi_flags = save_msi_flags; |
| 4942 | |
| 4943 | if (netif_running(dev)) { |
| 4944 | writel(save_poll_interval, base + NvRegPollingInterval); |
| 4945 | writel(NVREG_UNKSETUP6_VAL, base + NvRegUnknownSetupReg6); |
| 4946 | /* restore original irq */ |
| 4947 | if (nv_request_irq(dev, 0)) |
| 4948 | return 0; |
| 4949 | } |
| 4950 | |
| 4951 | return ret; |
| 4952 | } |
| 4953 | |
| 4954 | static int nv_loopback_test(struct net_device *dev) |
| 4955 | { |
| 4956 | struct fe_priv *np = netdev_priv(dev); |
| 4957 | u8 __iomem *base = get_hwbase(dev); |
| 4958 | struct sk_buff *tx_skb, *rx_skb; |
| 4959 | dma_addr_t test_dma_addr; |
| 4960 | u32 tx_flags_extra = (np->desc_ver == DESC_VER_1 ? NV_TX_LASTPACKET : NV_TX2_LASTPACKET); |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 4961 | u32 flags; |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 4962 | int len, i, pkt_len; |
| 4963 | u8 *pkt_data; |
| 4964 | u32 filter_flags = 0; |
| 4965 | u32 misc1_flags = 0; |
| 4966 | int ret = 1; |
| 4967 | |
| 4968 | if (netif_running(dev)) { |
| 4969 | nv_disable_irq(dev); |
| 4970 | filter_flags = readl(base + NvRegPacketFilterFlags); |
| 4971 | misc1_flags = readl(base + NvRegMisc1); |
| 4972 | } else { |
| 4973 | nv_txrx_reset(dev); |
| 4974 | } |
| 4975 | |
| 4976 | /* reinit driver view of the rx queue */ |
| 4977 | set_bufsize(dev); |
| 4978 | nv_init_ring(dev); |
| 4979 | |
| 4980 | /* setup hardware for loopback */ |
| 4981 | writel(NVREG_MISC1_FORCE, base + NvRegMisc1); |
| 4982 | writel(NVREG_PFF_ALWAYS | NVREG_PFF_LOOPBACK, base + NvRegPacketFilterFlags); |
| 4983 | |
| 4984 | /* reinit nic view of the rx queue */ |
| 4985 | writel(np->rx_buf_sz, base + NvRegOffloadConfig); |
| 4986 | setup_hw_rings(dev, NV_SETUP_RX_RING | NV_SETUP_TX_RING); |
| 4987 | writel( ((np->rx_ring_size-1) << NVREG_RINGSZ_RXSHIFT) + ((np->tx_ring_size-1) << NVREG_RINGSZ_TXSHIFT), |
| 4988 | base + NvRegRingSizes); |
| 4989 | pci_push(base); |
| 4990 | |
| 4991 | /* restart rx engine */ |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 4992 | nv_start_rxtx(dev); |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 4993 | |
| 4994 | /* setup packet for tx */ |
| 4995 | pkt_len = ETH_DATA_LEN; |
| 4996 | tx_skb = dev_alloc_skb(pkt_len); |
Jesper Juhl | 46798c8 | 2006-09-25 16:39:24 -0700 | [diff] [blame] | 4997 | if (!tx_skb) { |
| 4998 | printk(KERN_ERR "dev_alloc_skb() failed during loopback test" |
| 4999 | " of %s\n", dev->name); |
| 5000 | ret = 0; |
| 5001 | goto out; |
| 5002 | } |
Arnaldo Carvalho de Melo | 8b5be26 | 2007-03-20 12:08:20 -0300 | [diff] [blame] | 5003 | test_dma_addr = pci_map_single(np->pci_dev, tx_skb->data, |
| 5004 | skb_tailroom(tx_skb), |
| 5005 | PCI_DMA_FROMDEVICE); |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 5006 | pkt_data = skb_put(tx_skb, pkt_len); |
| 5007 | for (i = 0; i < pkt_len; i++) |
| 5008 | pkt_data[i] = (u8)(i & 0xff); |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 5009 | |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 5010 | if (!nv_optimized(np)) { |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 5011 | np->tx_ring.orig[0].buf = cpu_to_le32(test_dma_addr); |
| 5012 | np->tx_ring.orig[0].flaglen = cpu_to_le32((pkt_len-1) | np->tx_flags | tx_flags_extra); |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 5013 | } else { |
Al Viro | 5bb7ea2 | 2007-12-09 16:06:41 +0000 | [diff] [blame] | 5014 | np->tx_ring.ex[0].bufhigh = cpu_to_le32(dma_high(test_dma_addr)); |
| 5015 | np->tx_ring.ex[0].buflow = cpu_to_le32(dma_low(test_dma_addr)); |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 5016 | np->tx_ring.ex[0].flaglen = cpu_to_le32((pkt_len-1) | np->tx_flags | tx_flags_extra); |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 5017 | } |
| 5018 | writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl); |
| 5019 | pci_push(get_hwbase(dev)); |
| 5020 | |
| 5021 | msleep(500); |
| 5022 | |
| 5023 | /* check for rx of the packet */ |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 5024 | if (!nv_optimized(np)) { |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 5025 | flags = le32_to_cpu(np->rx_ring.orig[0].flaglen); |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 5026 | len = nv_descr_getlength(&np->rx_ring.orig[0], np->desc_ver); |
| 5027 | |
| 5028 | } else { |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 5029 | flags = le32_to_cpu(np->rx_ring.ex[0].flaglen); |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 5030 | len = nv_descr_getlength_ex(&np->rx_ring.ex[0], np->desc_ver); |
| 5031 | } |
| 5032 | |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 5033 | if (flags & NV_RX_AVAIL) { |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 5034 | ret = 0; |
| 5035 | } else if (np->desc_ver == DESC_VER_1) { |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 5036 | if (flags & NV_RX_ERROR) |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 5037 | ret = 0; |
| 5038 | } else { |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 5039 | if (flags & NV_RX2_ERROR) { |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 5040 | ret = 0; |
| 5041 | } |
| 5042 | } |
| 5043 | |
| 5044 | if (ret) { |
| 5045 | if (len != pkt_len) { |
| 5046 | ret = 0; |
| 5047 | dprintk(KERN_DEBUG "%s: loopback len mismatch %d vs %d\n", |
| 5048 | dev->name, len, pkt_len); |
| 5049 | } else { |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 5050 | rx_skb = np->rx_skb[0].skb; |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 5051 | for (i = 0; i < pkt_len; i++) { |
| 5052 | if (rx_skb->data[i] != (u8)(i & 0xff)) { |
| 5053 | ret = 0; |
| 5054 | dprintk(KERN_DEBUG "%s: loopback pattern check failed on byte %d\n", |
| 5055 | dev->name, i); |
| 5056 | break; |
| 5057 | } |
| 5058 | } |
| 5059 | } |
| 5060 | } else { |
| 5061 | dprintk(KERN_DEBUG "%s: loopback - did not receive test packet\n", dev->name); |
| 5062 | } |
| 5063 | |
| 5064 | pci_unmap_page(np->pci_dev, test_dma_addr, |
Arnaldo Carvalho de Melo | 4305b54 | 2007-04-19 20:43:29 -0700 | [diff] [blame] | 5065 | (skb_end_pointer(tx_skb) - tx_skb->data), |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 5066 | PCI_DMA_TODEVICE); |
| 5067 | dev_kfree_skb_any(tx_skb); |
Jesper Juhl | 46798c8 | 2006-09-25 16:39:24 -0700 | [diff] [blame] | 5068 | out: |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 5069 | /* stop engines */ |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 5070 | nv_stop_rxtx(dev); |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 5071 | nv_txrx_reset(dev); |
| 5072 | /* drain rx queue */ |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 5073 | nv_drain_rxtx(dev); |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 5074 | |
| 5075 | if (netif_running(dev)) { |
| 5076 | writel(misc1_flags, base + NvRegMisc1); |
| 5077 | writel(filter_flags, base + NvRegPacketFilterFlags); |
| 5078 | nv_enable_irq(dev); |
| 5079 | } |
| 5080 | |
| 5081 | return ret; |
| 5082 | } |
| 5083 | |
| 5084 | static void nv_self_test(struct net_device *dev, struct ethtool_test *test, u64 *buffer) |
| 5085 | { |
| 5086 | struct fe_priv *np = netdev_priv(dev); |
| 5087 | u8 __iomem *base = get_hwbase(dev); |
| 5088 | int result; |
Jeff Garzik | b9f2c04 | 2007-10-03 18:07:32 -0700 | [diff] [blame] | 5089 | memset(buffer, 0, nv_get_sset_count(dev, ETH_SS_TEST)*sizeof(u64)); |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 5090 | |
| 5091 | if (!nv_link_test(dev)) { |
| 5092 | test->flags |= ETH_TEST_FL_FAILED; |
| 5093 | buffer[0] = 1; |
| 5094 | } |
| 5095 | |
| 5096 | if (test->flags & ETH_TEST_FL_OFFLINE) { |
| 5097 | if (netif_running(dev)) { |
| 5098 | netif_stop_queue(dev); |
Ayaz Abdulla | 08d9357 | 2009-03-05 08:01:55 +0000 | [diff] [blame] | 5099 | nv_napi_disable(dev); |
Herbert Xu | 58dfd9c | 2006-06-21 10:53:54 +1000 | [diff] [blame] | 5100 | netif_tx_lock_bh(dev); |
David S. Miller | e308a5d | 2008-07-15 00:13:44 -0700 | [diff] [blame] | 5101 | netif_addr_lock(dev); |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 5102 | spin_lock_irq(&np->lock); |
| 5103 | nv_disable_hw_interrupts(dev, np->irqmask); |
| 5104 | if (!(np->msi_flags & NV_MSI_X_ENABLED)) { |
| 5105 | writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus); |
| 5106 | } else { |
| 5107 | writel(NVREG_IRQSTAT_MASK, base + NvRegMSIXIrqStatus); |
| 5108 | } |
| 5109 | /* stop engines */ |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 5110 | nv_stop_rxtx(dev); |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 5111 | nv_txrx_reset(dev); |
| 5112 | /* drain rx queue */ |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 5113 | nv_drain_rxtx(dev); |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 5114 | spin_unlock_irq(&np->lock); |
David S. Miller | e308a5d | 2008-07-15 00:13:44 -0700 | [diff] [blame] | 5115 | netif_addr_unlock(dev); |
Herbert Xu | 58dfd9c | 2006-06-21 10:53:54 +1000 | [diff] [blame] | 5116 | netif_tx_unlock_bh(dev); |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 5117 | } |
| 5118 | |
| 5119 | if (!nv_register_test(dev)) { |
| 5120 | test->flags |= ETH_TEST_FL_FAILED; |
| 5121 | buffer[1] = 1; |
| 5122 | } |
| 5123 | |
| 5124 | result = nv_interrupt_test(dev); |
| 5125 | if (result != 1) { |
| 5126 | test->flags |= ETH_TEST_FL_FAILED; |
| 5127 | buffer[2] = 1; |
| 5128 | } |
| 5129 | if (result == 0) { |
| 5130 | /* bail out */ |
| 5131 | return; |
| 5132 | } |
| 5133 | |
| 5134 | if (!nv_loopback_test(dev)) { |
| 5135 | test->flags |= ETH_TEST_FL_FAILED; |
| 5136 | buffer[3] = 1; |
| 5137 | } |
| 5138 | |
| 5139 | if (netif_running(dev)) { |
| 5140 | /* reinit driver view of the rx queue */ |
| 5141 | set_bufsize(dev); |
| 5142 | if (nv_init_ring(dev)) { |
| 5143 | if (!np->in_shutdown) |
| 5144 | mod_timer(&np->oom_kick, jiffies + OOM_REFILL); |
| 5145 | } |
| 5146 | /* reinit nic view of the rx queue */ |
| 5147 | writel(np->rx_buf_sz, base + NvRegOffloadConfig); |
| 5148 | setup_hw_rings(dev, NV_SETUP_RX_RING | NV_SETUP_TX_RING); |
| 5149 | writel( ((np->rx_ring_size-1) << NVREG_RINGSZ_RXSHIFT) + ((np->tx_ring_size-1) << NVREG_RINGSZ_TXSHIFT), |
| 5150 | base + NvRegRingSizes); |
| 5151 | pci_push(base); |
| 5152 | writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl); |
| 5153 | pci_push(base); |
| 5154 | /* restart rx engine */ |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 5155 | nv_start_rxtx(dev); |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 5156 | netif_start_queue(dev); |
Ayaz Abdulla | 08d9357 | 2009-03-05 08:01:55 +0000 | [diff] [blame] | 5157 | nv_napi_enable(dev); |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 5158 | nv_enable_hw_interrupts(dev, np->irqmask); |
| 5159 | } |
| 5160 | } |
| 5161 | } |
| 5162 | |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 5163 | static void nv_get_strings(struct net_device *dev, u32 stringset, u8 *buffer) |
| 5164 | { |
| 5165 | switch (stringset) { |
| 5166 | case ETH_SS_STATS: |
Jeff Garzik | b9f2c04 | 2007-10-03 18:07:32 -0700 | [diff] [blame] | 5167 | memcpy(buffer, &nv_estats_str, nv_get_sset_count(dev, ETH_SS_STATS)*sizeof(struct nv_ethtool_str)); |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 5168 | break; |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 5169 | case ETH_SS_TEST: |
Jeff Garzik | b9f2c04 | 2007-10-03 18:07:32 -0700 | [diff] [blame] | 5170 | memcpy(buffer, &nv_etests_str, nv_get_sset_count(dev, ETH_SS_TEST)*sizeof(struct nv_ethtool_str)); |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 5171 | break; |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 5172 | } |
| 5173 | } |
| 5174 | |
Jeff Garzik | 7282d49 | 2006-09-13 14:30:00 -0400 | [diff] [blame] | 5175 | static const struct ethtool_ops ops = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5176 | .get_drvinfo = nv_get_drvinfo, |
| 5177 | .get_link = ethtool_op_get_link, |
| 5178 | .get_wol = nv_get_wol, |
| 5179 | .set_wol = nv_set_wol, |
| 5180 | .get_settings = nv_get_settings, |
| 5181 | .set_settings = nv_set_settings, |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 5182 | .get_regs_len = nv_get_regs_len, |
| 5183 | .get_regs = nv_get_regs, |
| 5184 | .nway_reset = nv_nway_reset, |
Ayaz Abdulla | 6a78814 | 2006-06-10 22:47:26 -0400 | [diff] [blame] | 5185 | .set_tso = nv_set_tso, |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 5186 | .get_ringparam = nv_get_ringparam, |
| 5187 | .set_ringparam = nv_set_ringparam, |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 5188 | .get_pauseparam = nv_get_pauseparam, |
| 5189 | .set_pauseparam = nv_set_pauseparam, |
Ayaz Abdulla | 5ed2616 | 2006-06-10 22:47:59 -0400 | [diff] [blame] | 5190 | .get_rx_csum = nv_get_rx_csum, |
| 5191 | .set_rx_csum = nv_set_rx_csum, |
Ayaz Abdulla | 5ed2616 | 2006-06-10 22:47:59 -0400 | [diff] [blame] | 5192 | .set_tx_csum = nv_set_tx_csum, |
Ayaz Abdulla | 5ed2616 | 2006-06-10 22:47:59 -0400 | [diff] [blame] | 5193 | .set_sg = nv_set_sg, |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 5194 | .get_strings = nv_get_strings, |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 5195 | .get_ethtool_stats = nv_get_ethtool_stats, |
Jeff Garzik | b9f2c04 | 2007-10-03 18:07:32 -0700 | [diff] [blame] | 5196 | .get_sset_count = nv_get_sset_count, |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 5197 | .self_test = nv_self_test, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5198 | }; |
| 5199 | |
Ayaz Abdulla | ee407b0 | 2006-02-04 13:13:17 -0500 | [diff] [blame] | 5200 | static void nv_vlan_rx_register(struct net_device *dev, struct vlan_group *grp) |
| 5201 | { |
| 5202 | struct fe_priv *np = get_nvpriv(dev); |
| 5203 | |
| 5204 | spin_lock_irq(&np->lock); |
| 5205 | |
| 5206 | /* save vlan group */ |
| 5207 | np->vlangrp = grp; |
| 5208 | |
| 5209 | if (grp) { |
| 5210 | /* enable vlan on MAC */ |
| 5211 | np->txrxctl_bits |= NVREG_TXRXCTL_VLANSTRIP | NVREG_TXRXCTL_VLANINS; |
| 5212 | } else { |
| 5213 | /* disable vlan on MAC */ |
| 5214 | np->txrxctl_bits &= ~NVREG_TXRXCTL_VLANSTRIP; |
| 5215 | np->txrxctl_bits &= ~NVREG_TXRXCTL_VLANINS; |
| 5216 | } |
| 5217 | |
| 5218 | writel(np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl); |
| 5219 | |
| 5220 | spin_unlock_irq(&np->lock); |
Stephen Hemminger | 25805dc | 2007-06-01 09:44:01 -0700 | [diff] [blame] | 5221 | } |
Ayaz Abdulla | ee407b0 | 2006-02-04 13:13:17 -0500 | [diff] [blame] | 5222 | |
Ayaz Abdulla | 7e680c2 | 2006-10-30 17:31:51 -0500 | [diff] [blame] | 5223 | /* The mgmt unit and driver use a semaphore to access the phy during init */ |
| 5224 | static int nv_mgmt_acquire_sema(struct net_device *dev) |
| 5225 | { |
Ayaz Abdulla | cac1c52 | 2009-02-07 00:23:57 -0800 | [diff] [blame] | 5226 | struct fe_priv *np = netdev_priv(dev); |
Ayaz Abdulla | 7e680c2 | 2006-10-30 17:31:51 -0500 | [diff] [blame] | 5227 | u8 __iomem *base = get_hwbase(dev); |
| 5228 | int i; |
| 5229 | u32 tx_ctrl, mgmt_sema; |
| 5230 | |
| 5231 | for (i = 0; i < 10; i++) { |
| 5232 | mgmt_sema = readl(base + NvRegTransmitterControl) & NVREG_XMITCTL_MGMT_SEMA_MASK; |
| 5233 | if (mgmt_sema == NVREG_XMITCTL_MGMT_SEMA_FREE) |
| 5234 | break; |
| 5235 | msleep(500); |
| 5236 | } |
| 5237 | |
| 5238 | if (mgmt_sema != NVREG_XMITCTL_MGMT_SEMA_FREE) |
| 5239 | return 0; |
| 5240 | |
| 5241 | for (i = 0; i < 2; i++) { |
| 5242 | tx_ctrl = readl(base + NvRegTransmitterControl); |
| 5243 | tx_ctrl |= NVREG_XMITCTL_HOST_SEMA_ACQ; |
| 5244 | writel(tx_ctrl, base + NvRegTransmitterControl); |
| 5245 | |
| 5246 | /* verify that semaphore was acquired */ |
| 5247 | tx_ctrl = readl(base + NvRegTransmitterControl); |
| 5248 | if (((tx_ctrl & NVREG_XMITCTL_HOST_SEMA_MASK) == NVREG_XMITCTL_HOST_SEMA_ACQ) && |
Ayaz Abdulla | cac1c52 | 2009-02-07 00:23:57 -0800 | [diff] [blame] | 5249 | ((tx_ctrl & NVREG_XMITCTL_MGMT_SEMA_MASK) == NVREG_XMITCTL_MGMT_SEMA_FREE)) { |
| 5250 | np->mgmt_sema = 1; |
Ayaz Abdulla | 7e680c2 | 2006-10-30 17:31:51 -0500 | [diff] [blame] | 5251 | return 1; |
Ayaz Abdulla | cac1c52 | 2009-02-07 00:23:57 -0800 | [diff] [blame] | 5252 | } |
Ayaz Abdulla | 7e680c2 | 2006-10-30 17:31:51 -0500 | [diff] [blame] | 5253 | else |
| 5254 | udelay(50); |
| 5255 | } |
| 5256 | |
| 5257 | return 0; |
| 5258 | } |
| 5259 | |
Ayaz Abdulla | cac1c52 | 2009-02-07 00:23:57 -0800 | [diff] [blame] | 5260 | static void nv_mgmt_release_sema(struct net_device *dev) |
| 5261 | { |
| 5262 | struct fe_priv *np = netdev_priv(dev); |
| 5263 | u8 __iomem *base = get_hwbase(dev); |
| 5264 | u32 tx_ctrl; |
| 5265 | |
| 5266 | if (np->driver_data & DEV_HAS_MGMT_UNIT) { |
| 5267 | if (np->mgmt_sema) { |
| 5268 | tx_ctrl = readl(base + NvRegTransmitterControl); |
| 5269 | tx_ctrl &= ~NVREG_XMITCTL_HOST_SEMA_ACQ; |
| 5270 | writel(tx_ctrl, base + NvRegTransmitterControl); |
| 5271 | } |
| 5272 | } |
| 5273 | } |
| 5274 | |
| 5275 | |
| 5276 | static int nv_mgmt_get_version(struct net_device *dev) |
| 5277 | { |
| 5278 | struct fe_priv *np = netdev_priv(dev); |
| 5279 | u8 __iomem *base = get_hwbase(dev); |
| 5280 | u32 data_ready = readl(base + NvRegTransmitterControl); |
| 5281 | u32 data_ready2 = 0; |
| 5282 | unsigned long start; |
| 5283 | int ready = 0; |
| 5284 | |
| 5285 | writel(NVREG_MGMTUNITGETVERSION, base + NvRegMgmtUnitGetVersion); |
| 5286 | writel(data_ready ^ NVREG_XMITCTL_DATA_START, base + NvRegTransmitterControl); |
| 5287 | start = jiffies; |
| 5288 | while (time_before(jiffies, start + 5*HZ)) { |
| 5289 | data_ready2 = readl(base + NvRegTransmitterControl); |
| 5290 | if ((data_ready & NVREG_XMITCTL_DATA_READY) != (data_ready2 & NVREG_XMITCTL_DATA_READY)) { |
| 5291 | ready = 1; |
| 5292 | break; |
| 5293 | } |
| 5294 | schedule_timeout_uninterruptible(1); |
| 5295 | } |
| 5296 | |
| 5297 | if (!ready || (data_ready2 & NVREG_XMITCTL_DATA_ERROR)) |
| 5298 | return 0; |
| 5299 | |
| 5300 | np->mgmt_version = readl(base + NvRegMgmtUnitVersion) & NVREG_MGMTUNITVERSION; |
| 5301 | |
| 5302 | return 1; |
| 5303 | } |
| 5304 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5305 | static int nv_open(struct net_device *dev) |
| 5306 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 5307 | struct fe_priv *np = netdev_priv(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5308 | u8 __iomem *base = get_hwbase(dev); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 5309 | int ret = 1; |
| 5310 | int oom, i; |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 5311 | u32 low; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5312 | |
| 5313 | dprintk(KERN_DEBUG "nv_open: begin\n"); |
| 5314 | |
Ed Swierk | cb52deb | 2008-12-01 12:24:43 +0000 | [diff] [blame] | 5315 | /* power up phy */ |
| 5316 | mii_rw(dev, np->phyaddr, MII_BMCR, |
| 5317 | mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ) & ~BMCR_PDOWN); |
| 5318 | |
Ayaz Abdulla | f148965 | 2006-07-31 12:04:45 -0400 | [diff] [blame] | 5319 | /* erase previous misconfiguration */ |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 5320 | if (np->driver_data & DEV_HAS_POWER_CNTRL) |
| 5321 | nv_mac_reset(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5322 | writel(NVREG_MCASTADDRA_FORCE, base + NvRegMulticastAddrA); |
| 5323 | writel(0, base + NvRegMulticastAddrB); |
Ayaz Abdulla | bb9a4fd | 2008-01-13 16:03:04 -0500 | [diff] [blame] | 5324 | writel(NVREG_MCASTMASKA_NONE, base + NvRegMulticastMaskA); |
| 5325 | writel(NVREG_MCASTMASKB_NONE, base + NvRegMulticastMaskB); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5326 | writel(0, base + NvRegPacketFilterFlags); |
| 5327 | |
| 5328 | writel(0, base + NvRegTransmitterControl); |
| 5329 | writel(0, base + NvRegReceiverControl); |
| 5330 | |
| 5331 | writel(0, base + NvRegAdapterControl); |
| 5332 | |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 5333 | if (np->pause_flags & NV_PAUSEFRAME_TX_CAPABLE) |
| 5334 | writel(NVREG_TX_PAUSEFRAME_DISABLE, base + NvRegTxPauseFrame); |
| 5335 | |
Ayaz Abdulla | f148965 | 2006-07-31 12:04:45 -0400 | [diff] [blame] | 5336 | /* initialize descriptor rings */ |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 5337 | set_bufsize(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5338 | oom = nv_init_ring(dev); |
| 5339 | |
| 5340 | writel(0, base + NvRegLinkSpeed); |
Ayaz Abdulla | 5070d34 | 2006-07-31 12:05:01 -0400 | [diff] [blame] | 5341 | writel(readl(base + NvRegTransmitPoll) & NVREG_TRANSMITPOLL_MAC_ADDR_REV, base + NvRegTransmitPoll); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5342 | nv_txrx_reset(dev); |
| 5343 | writel(0, base + NvRegUnknownSetupReg6); |
| 5344 | |
| 5345 | np->in_shutdown = 0; |
| 5346 | |
Ayaz Abdulla | f148965 | 2006-07-31 12:04:45 -0400 | [diff] [blame] | 5347 | /* give hw rings */ |
Ayaz Abdulla | 0832b25 | 2006-02-04 13:13:26 -0500 | [diff] [blame] | 5348 | setup_hw_rings(dev, NV_SETUP_RX_RING | NV_SETUP_TX_RING); |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 5349 | writel( ((np->rx_ring_size-1) << NVREG_RINGSZ_RXSHIFT) + ((np->tx_ring_size-1) << NVREG_RINGSZ_TXSHIFT), |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5350 | base + NvRegRingSizes); |
| 5351 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5352 | writel(np->linkspeed, base + NvRegLinkSpeed); |
Ayaz Abdulla | 95d161c | 2006-07-06 16:46:25 -0400 | [diff] [blame] | 5353 | if (np->desc_ver == DESC_VER_1) |
| 5354 | writel(NVREG_TX_WM_DESC1_DEFAULT, base + NvRegTxWatermark); |
| 5355 | else |
| 5356 | writel(NVREG_TX_WM_DESC2_3_DEFAULT, base + NvRegTxWatermark); |
Manfred Spraul | 8a4ae7f | 2005-09-21 23:22:10 -0400 | [diff] [blame] | 5357 | writel(np->txrxctl_bits, base + NvRegTxRxControl); |
Ayaz Abdulla | ee407b0 | 2006-02-04 13:13:17 -0500 | [diff] [blame] | 5358 | writel(np->vlanctl_bits, base + NvRegVlanControl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5359 | pci_push(base); |
Manfred Spraul | 8a4ae7f | 2005-09-21 23:22:10 -0400 | [diff] [blame] | 5360 | writel(NVREG_TXRXCTL_BIT1|np->txrxctl_bits, base + NvRegTxRxControl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5361 | reg_delay(dev, NvRegUnknownSetupReg5, NVREG_UNKSETUP5_BIT31, NVREG_UNKSETUP5_BIT31, |
| 5362 | NV_SETUP5_DELAY, NV_SETUP5_DELAYMAX, |
| 5363 | KERN_INFO "open: SetupReg5, Bit 31 remained off\n"); |
| 5364 | |
Ayaz Abdulla | 7e680c2 | 2006-10-30 17:31:51 -0500 | [diff] [blame] | 5365 | writel(0, base + NvRegMIIMask); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5366 | writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus); |
Ayaz Abdulla | eb79842 | 2008-02-04 15:14:04 -0500 | [diff] [blame] | 5367 | writel(NVREG_MIISTAT_MASK_ALL, base + NvRegMIIStatus); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5368 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5369 | writel(NVREG_MISC1_FORCE | NVREG_MISC1_HD, base + NvRegMisc1); |
| 5370 | writel(readl(base + NvRegTransmitterStatus), base + NvRegTransmitterStatus); |
| 5371 | writel(NVREG_PFF_ALWAYS, base + NvRegPacketFilterFlags); |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 5372 | writel(np->rx_buf_sz, base + NvRegOffloadConfig); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5373 | |
| 5374 | writel(readl(base + NvRegReceiverStatus), base + NvRegReceiverStatus); |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 5375 | |
| 5376 | get_random_bytes(&low, sizeof(low)); |
| 5377 | low &= NVREG_SLOTTIME_MASK; |
| 5378 | if (np->desc_ver == DESC_VER_1) { |
| 5379 | writel(low|NVREG_SLOTTIME_DEFAULT, base + NvRegSlotTime); |
| 5380 | } else { |
| 5381 | if (!(np->driver_data & DEV_HAS_GEAR_MODE)) { |
| 5382 | /* setup legacy backoff */ |
| 5383 | writel(NVREG_SLOTTIME_LEGBF_ENABLED|NVREG_SLOTTIME_10_100_FULL|low, base + NvRegSlotTime); |
| 5384 | } else { |
| 5385 | writel(NVREG_SLOTTIME_10_100_FULL, base + NvRegSlotTime); |
| 5386 | nv_gear_backoff_reseed(dev); |
| 5387 | } |
| 5388 | } |
Ayaz Abdulla | 9744e21 | 2006-07-06 16:45:58 -0400 | [diff] [blame] | 5389 | writel(NVREG_TX_DEFERRAL_DEFAULT, base + NvRegTxDeferral); |
| 5390 | writel(NVREG_RX_DEFERRAL_DEFAULT, base + NvRegRxDeferral); |
Ayaz Abdulla | a971c32 | 2005-11-11 08:30:38 -0500 | [diff] [blame] | 5391 | if (poll_interval == -1) { |
| 5392 | if (optimization_mode == NV_OPTIMIZATION_MODE_THROUGHPUT) |
| 5393 | writel(NVREG_POLL_DEFAULT_THROUGHPUT, base + NvRegPollingInterval); |
| 5394 | else |
| 5395 | writel(NVREG_POLL_DEFAULT_CPU, base + NvRegPollingInterval); |
| 5396 | } |
| 5397 | else |
| 5398 | writel(poll_interval & 0xFFFF, base + NvRegPollingInterval); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5399 | writel(NVREG_UNKSETUP6_VAL, base + NvRegUnknownSetupReg6); |
| 5400 | writel((np->phyaddr << NVREG_ADAPTCTL_PHYSHIFT)|NVREG_ADAPTCTL_PHYVALID|NVREG_ADAPTCTL_RUNNING, |
| 5401 | base + NvRegAdapterControl); |
| 5402 | writel(NVREG_MIISPEED_BIT8|NVREG_MIIDELAY, base + NvRegMIISpeed); |
Ayaz Abdulla | 7e680c2 | 2006-10-30 17:31:51 -0500 | [diff] [blame] | 5403 | writel(NVREG_MII_LINKCHANGE, base + NvRegMIIMask); |
Ayaz Abdulla | c42d9df | 2006-06-10 22:47:52 -0400 | [diff] [blame] | 5404 | if (np->wolenabled) |
| 5405 | writel(NVREG_WAKEUPFLAGS_ENABLE , base + NvRegWakeUpFlags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5406 | |
| 5407 | i = readl(base + NvRegPowerState); |
| 5408 | if ( (i & NVREG_POWERSTATE_POWEREDUP) == 0) |
| 5409 | writel(NVREG_POWERSTATE_POWEREDUP|i, base + NvRegPowerState); |
| 5410 | |
| 5411 | pci_push(base); |
| 5412 | udelay(10); |
| 5413 | writel(readl(base + NvRegPowerState) | NVREG_POWERSTATE_VALID, base + NvRegPowerState); |
| 5414 | |
Ayaz Abdulla | 84b3932 | 2006-05-20 14:59:48 -0700 | [diff] [blame] | 5415 | nv_disable_hw_interrupts(dev, np->irqmask); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5416 | pci_push(base); |
Ayaz Abdulla | eb79842 | 2008-02-04 15:14:04 -0500 | [diff] [blame] | 5417 | writel(NVREG_MIISTAT_MASK_ALL, base + NvRegMIIStatus); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5418 | writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus); |
| 5419 | pci_push(base); |
| 5420 | |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 5421 | if (nv_request_irq(dev, 0)) { |
Ayaz Abdulla | 84b3932 | 2006-05-20 14:59:48 -0700 | [diff] [blame] | 5422 | goto out_drain; |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 5423 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5424 | |
| 5425 | /* ask for interrupts */ |
Ayaz Abdulla | 84b3932 | 2006-05-20 14:59:48 -0700 | [diff] [blame] | 5426 | nv_enable_hw_interrupts(dev, np->irqmask); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5427 | |
| 5428 | spin_lock_irq(&np->lock); |
| 5429 | writel(NVREG_MCASTADDRA_FORCE, base + NvRegMulticastAddrA); |
| 5430 | writel(0, base + NvRegMulticastAddrB); |
Ayaz Abdulla | bb9a4fd | 2008-01-13 16:03:04 -0500 | [diff] [blame] | 5431 | writel(NVREG_MCASTMASKA_NONE, base + NvRegMulticastMaskA); |
| 5432 | writel(NVREG_MCASTMASKB_NONE, base + NvRegMulticastMaskB); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5433 | writel(NVREG_PFF_ALWAYS|NVREG_PFF_MYADDR, base + NvRegPacketFilterFlags); |
| 5434 | /* One manual link speed update: Interrupts are enabled, future link |
| 5435 | * speed changes cause interrupts and are handled by nv_link_irq(). |
| 5436 | */ |
| 5437 | { |
| 5438 | u32 miistat; |
| 5439 | miistat = readl(base + NvRegMIIStatus); |
Ayaz Abdulla | eb79842 | 2008-02-04 15:14:04 -0500 | [diff] [blame] | 5440 | writel(NVREG_MIISTAT_MASK_ALL, base + NvRegMIIStatus); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5441 | dprintk(KERN_INFO "startup: got 0x%08x.\n", miistat); |
| 5442 | } |
Manfred Spraul | 1b1b3c9 | 2005-08-06 23:47:55 +0200 | [diff] [blame] | 5443 | /* set linkspeed to invalid value, thus force nv_update_linkspeed |
| 5444 | * to init hw */ |
| 5445 | np->linkspeed = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5446 | ret = nv_update_linkspeed(dev); |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 5447 | nv_start_rxtx(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5448 | netif_start_queue(dev); |
Ayaz Abdulla | 08d9357 | 2009-03-05 08:01:55 +0000 | [diff] [blame] | 5449 | nv_napi_enable(dev); |
Stephen Hemminger | e27cdba | 2006-07-31 20:37:19 -0700 | [diff] [blame] | 5450 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5451 | if (ret) { |
| 5452 | netif_carrier_on(dev); |
| 5453 | } else { |
Ed Swierk | f7ab697 | 2007-09-28 22:42:13 -0700 | [diff] [blame] | 5454 | printk(KERN_INFO "%s: no link during initialization.\n", dev->name); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5455 | netif_carrier_off(dev); |
| 5456 | } |
| 5457 | if (oom) |
| 5458 | mod_timer(&np->oom_kick, jiffies + OOM_REFILL); |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 5459 | |
| 5460 | /* start statistics timer */ |
Ayaz Abdulla | 9c66243 | 2008-08-06 12:11:42 -0400 | [diff] [blame] | 5461 | if (np->driver_data & (DEV_HAS_STATISTICS_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_STATISTICS_V3)) |
Daniel Drake | bfebbb8 | 2008-03-18 11:07:18 +0000 | [diff] [blame] | 5462 | mod_timer(&np->stats_poll, |
| 5463 | round_jiffies(jiffies + STATS_INTERVAL)); |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 5464 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5465 | spin_unlock_irq(&np->lock); |
| 5466 | |
| 5467 | return 0; |
| 5468 | out_drain: |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 5469 | nv_drain_rxtx(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5470 | return ret; |
| 5471 | } |
| 5472 | |
| 5473 | static int nv_close(struct net_device *dev) |
| 5474 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 5475 | struct fe_priv *np = netdev_priv(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5476 | u8 __iomem *base; |
| 5477 | |
| 5478 | spin_lock_irq(&np->lock); |
| 5479 | np->in_shutdown = 1; |
| 5480 | spin_unlock_irq(&np->lock); |
Ayaz Abdulla | 08d9357 | 2009-03-05 08:01:55 +0000 | [diff] [blame] | 5481 | nv_napi_disable(dev); |
Manfred Spraul | a747590 | 2007-10-17 21:52:33 +0200 | [diff] [blame] | 5482 | synchronize_irq(np->pci_dev->irq); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5483 | |
| 5484 | del_timer_sync(&np->oom_kick); |
| 5485 | del_timer_sync(&np->nic_poll); |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 5486 | del_timer_sync(&np->stats_poll); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5487 | |
| 5488 | netif_stop_queue(dev); |
| 5489 | spin_lock_irq(&np->lock); |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 5490 | nv_stop_rxtx(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5491 | nv_txrx_reset(dev); |
| 5492 | |
| 5493 | /* disable interrupts on the nic or we will lock up */ |
| 5494 | base = get_hwbase(dev); |
Ayaz Abdulla | 84b3932 | 2006-05-20 14:59:48 -0700 | [diff] [blame] | 5495 | nv_disable_hw_interrupts(dev, np->irqmask); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5496 | pci_push(base); |
| 5497 | dprintk(KERN_INFO "%s: Irqmask is zero again\n", dev->name); |
| 5498 | |
| 5499 | spin_unlock_irq(&np->lock); |
| 5500 | |
Ayaz Abdulla | 84b3932 | 2006-05-20 14:59:48 -0700 | [diff] [blame] | 5501 | nv_free_irq(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5502 | |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 5503 | nv_drain_rxtx(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5504 | |
Tim Mann | 2cc49a5 | 2007-06-14 13:16:38 -0700 | [diff] [blame] | 5505 | if (np->wolenabled) { |
| 5506 | writel(NVREG_PFF_ALWAYS|NVREG_PFF_MYADDR, base + NvRegPacketFilterFlags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5507 | nv_start_rx(dev); |
Ed Swierk | cb52deb | 2008-12-01 12:24:43 +0000 | [diff] [blame] | 5508 | } else { |
| 5509 | /* power down phy */ |
| 5510 | mii_rw(dev, np->phyaddr, MII_BMCR, |
| 5511 | mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ)|BMCR_PDOWN); |
Tim Mann | 2cc49a5 | 2007-06-14 13:16:38 -0700 | [diff] [blame] | 5512 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5513 | |
| 5514 | /* FIXME: power down nic */ |
| 5515 | |
| 5516 | return 0; |
| 5517 | } |
| 5518 | |
Stephen Hemminger | b94426b | 2008-11-19 22:26:51 -0800 | [diff] [blame] | 5519 | static const struct net_device_ops nv_netdev_ops = { |
| 5520 | .ndo_open = nv_open, |
| 5521 | .ndo_stop = nv_close, |
| 5522 | .ndo_get_stats = nv_get_stats, |
Stephen Hemminger | 0082982 | 2008-11-20 20:14:53 -0800 | [diff] [blame] | 5523 | .ndo_start_xmit = nv_start_xmit, |
| 5524 | .ndo_tx_timeout = nv_tx_timeout, |
| 5525 | .ndo_change_mtu = nv_change_mtu, |
| 5526 | .ndo_validate_addr = eth_validate_addr, |
| 5527 | .ndo_set_mac_address = nv_set_mac_address, |
| 5528 | .ndo_set_multicast_list = nv_set_multicast, |
| 5529 | .ndo_vlan_rx_register = nv_vlan_rx_register, |
| 5530 | #ifdef CONFIG_NET_POLL_CONTROLLER |
| 5531 | .ndo_poll_controller = nv_poll_controller, |
| 5532 | #endif |
| 5533 | }; |
| 5534 | |
| 5535 | static const struct net_device_ops nv_netdev_ops_optimized = { |
| 5536 | .ndo_open = nv_open, |
| 5537 | .ndo_stop = nv_close, |
| 5538 | .ndo_get_stats = nv_get_stats, |
| 5539 | .ndo_start_xmit = nv_start_xmit_optimized, |
Stephen Hemminger | b94426b | 2008-11-19 22:26:51 -0800 | [diff] [blame] | 5540 | .ndo_tx_timeout = nv_tx_timeout, |
| 5541 | .ndo_change_mtu = nv_change_mtu, |
| 5542 | .ndo_validate_addr = eth_validate_addr, |
| 5543 | .ndo_set_mac_address = nv_set_mac_address, |
| 5544 | .ndo_set_multicast_list = nv_set_multicast, |
| 5545 | .ndo_vlan_rx_register = nv_vlan_rx_register, |
| 5546 | #ifdef CONFIG_NET_POLL_CONTROLLER |
| 5547 | .ndo_poll_controller = nv_poll_controller, |
| 5548 | #endif |
| 5549 | }; |
| 5550 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5551 | static int __devinit nv_probe(struct pci_dev *pci_dev, const struct pci_device_id *id) |
| 5552 | { |
| 5553 | struct net_device *dev; |
| 5554 | struct fe_priv *np; |
| 5555 | unsigned long addr; |
| 5556 | u8 __iomem *base; |
| 5557 | int err, i; |
Ayaz Abdulla | 5070d34 | 2006-07-31 12:05:01 -0400 | [diff] [blame] | 5558 | u32 powerstate, txreg; |
Ayaz Abdulla | 7e680c2 | 2006-10-30 17:31:51 -0500 | [diff] [blame] | 5559 | u32 phystate_orig = 0, phystate; |
| 5560 | int phyinitialized = 0; |
Jeff Garzik | 3f88ce4 | 2007-10-16 04:09:09 -0400 | [diff] [blame] | 5561 | static int printed_version; |
| 5562 | |
| 5563 | if (!printed_version++) |
| 5564 | printk(KERN_INFO "%s: Reverse Engineered nForce ethernet" |
| 5565 | " driver. Version %s.\n", DRV_NAME, FORCEDETH_VERSION); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5566 | |
| 5567 | dev = alloc_etherdev(sizeof(struct fe_priv)); |
| 5568 | err = -ENOMEM; |
| 5569 | if (!dev) |
| 5570 | goto out; |
| 5571 | |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 5572 | np = netdev_priv(dev); |
Stephen Hemminger | bea3348 | 2007-10-03 16:41:36 -0700 | [diff] [blame] | 5573 | np->dev = dev; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5574 | np->pci_dev = pci_dev; |
| 5575 | spin_lock_init(&np->lock); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5576 | SET_NETDEV_DEV(dev, &pci_dev->dev); |
| 5577 | |
| 5578 | init_timer(&np->oom_kick); |
| 5579 | np->oom_kick.data = (unsigned long) dev; |
| 5580 | np->oom_kick.function = &nv_do_rx_refill; /* timer handler */ |
| 5581 | init_timer(&np->nic_poll); |
| 5582 | np->nic_poll.data = (unsigned long) dev; |
| 5583 | np->nic_poll.function = &nv_do_nic_poll; /* timer handler */ |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 5584 | init_timer(&np->stats_poll); |
| 5585 | np->stats_poll.data = (unsigned long) dev; |
| 5586 | np->stats_poll.function = &nv_do_stats_poll; /* timer handler */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5587 | |
| 5588 | err = pci_enable_device(pci_dev); |
Jeff Garzik | 3f88ce4 | 2007-10-16 04:09:09 -0400 | [diff] [blame] | 5589 | if (err) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5590 | goto out_free; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5591 | |
| 5592 | pci_set_master(pci_dev); |
| 5593 | |
| 5594 | err = pci_request_regions(pci_dev, DRV_NAME); |
| 5595 | if (err < 0) |
| 5596 | goto out_disable; |
| 5597 | |
Ayaz Abdulla | 9c66243 | 2008-08-06 12:11:42 -0400 | [diff] [blame] | 5598 | if (id->driver_data & (DEV_HAS_VLAN|DEV_HAS_MSI_X|DEV_HAS_POWER_CNTRL|DEV_HAS_STATISTICS_V2|DEV_HAS_STATISTICS_V3)) |
Ayaz Abdulla | 57fff69 | 2007-01-23 12:27:00 -0500 | [diff] [blame] | 5599 | np->register_size = NV_PCI_REGSZ_VER3; |
| 5600 | else if (id->driver_data & DEV_HAS_STATISTICS_V1) |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 5601 | np->register_size = NV_PCI_REGSZ_VER2; |
| 5602 | else |
| 5603 | np->register_size = NV_PCI_REGSZ_VER1; |
| 5604 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5605 | err = -EINVAL; |
| 5606 | addr = 0; |
| 5607 | for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { |
| 5608 | dprintk(KERN_DEBUG "%s: resource %d start %p len %ld flags 0x%08lx.\n", |
| 5609 | pci_name(pci_dev), i, (void*)pci_resource_start(pci_dev, i), |
| 5610 | pci_resource_len(pci_dev, i), |
| 5611 | pci_resource_flags(pci_dev, i)); |
| 5612 | if (pci_resource_flags(pci_dev, i) & IORESOURCE_MEM && |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 5613 | pci_resource_len(pci_dev, i) >= np->register_size) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5614 | addr = pci_resource_start(pci_dev, i); |
| 5615 | break; |
| 5616 | } |
| 5617 | } |
| 5618 | if (i == DEVICE_COUNT_RESOURCE) { |
Jeff Garzik | 3f88ce4 | 2007-10-16 04:09:09 -0400 | [diff] [blame] | 5619 | dev_printk(KERN_INFO, &pci_dev->dev, |
| 5620 | "Couldn't find register window\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5621 | goto out_relreg; |
| 5622 | } |
| 5623 | |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 5624 | /* copy of driver data */ |
| 5625 | np->driver_data = id->driver_data; |
Ayaz Abdulla | 9f3f791 | 2008-04-23 14:37:30 -0400 | [diff] [blame] | 5626 | /* copy of device id */ |
| 5627 | np->device_id = id->device; |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 5628 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5629 | /* handle different descriptor versions */ |
Manfred Spraul | ee73362 | 2005-07-31 18:32:26 +0200 | [diff] [blame] | 5630 | if (id->driver_data & DEV_HAS_HIGH_DMA) { |
| 5631 | /* packet format 3: supports 40-bit addressing */ |
| 5632 | np->desc_ver = DESC_VER_3; |
Ayaz Abdulla | 84b3932 | 2006-05-20 14:59:48 -0700 | [diff] [blame] | 5633 | np->txrxctl_bits = NVREG_TXRXCTL_DESC_3; |
Ayaz Abdulla | 69fe3fd | 2006-06-10 22:48:18 -0400 | [diff] [blame] | 5634 | if (dma_64bit) { |
Jeff Garzik | 3f88ce4 | 2007-10-16 04:09:09 -0400 | [diff] [blame] | 5635 | if (pci_set_dma_mask(pci_dev, DMA_39BIT_MASK)) |
| 5636 | dev_printk(KERN_INFO, &pci_dev->dev, |
| 5637 | "64-bit DMA failed, using 32-bit addressing\n"); |
| 5638 | else |
Ayaz Abdulla | 69fe3fd | 2006-06-10 22:48:18 -0400 | [diff] [blame] | 5639 | dev->features |= NETIF_F_HIGHDMA; |
Ayaz Abdulla | 69fe3fd | 2006-06-10 22:48:18 -0400 | [diff] [blame] | 5640 | if (pci_set_consistent_dma_mask(pci_dev, DMA_39BIT_MASK)) { |
Jeff Garzik | 3f88ce4 | 2007-10-16 04:09:09 -0400 | [diff] [blame] | 5641 | dev_printk(KERN_INFO, &pci_dev->dev, |
| 5642 | "64-bit DMA (consistent) failed, using 32-bit ring buffers\n"); |
Ayaz Abdulla | 69fe3fd | 2006-06-10 22:48:18 -0400 | [diff] [blame] | 5643 | } |
Ayaz Abdulla | 84b3932 | 2006-05-20 14:59:48 -0700 | [diff] [blame] | 5644 | } |
Manfred Spraul | ee73362 | 2005-07-31 18:32:26 +0200 | [diff] [blame] | 5645 | } else if (id->driver_data & DEV_HAS_LARGEDESC) { |
| 5646 | /* packet format 2: supports jumbo frames */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5647 | np->desc_ver = DESC_VER_2; |
Manfred Spraul | 8a4ae7f | 2005-09-21 23:22:10 -0400 | [diff] [blame] | 5648 | np->txrxctl_bits = NVREG_TXRXCTL_DESC_2; |
Manfred Spraul | ee73362 | 2005-07-31 18:32:26 +0200 | [diff] [blame] | 5649 | } else { |
| 5650 | /* original packet format */ |
| 5651 | np->desc_ver = DESC_VER_1; |
Manfred Spraul | 8a4ae7f | 2005-09-21 23:22:10 -0400 | [diff] [blame] | 5652 | np->txrxctl_bits = NVREG_TXRXCTL_DESC_1; |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 5653 | } |
Manfred Spraul | ee73362 | 2005-07-31 18:32:26 +0200 | [diff] [blame] | 5654 | |
| 5655 | np->pkt_limit = NV_PKTLIMIT_1; |
| 5656 | if (id->driver_data & DEV_HAS_LARGEDESC) |
| 5657 | np->pkt_limit = NV_PKTLIMIT_2; |
| 5658 | |
Manfred Spraul | 8a4ae7f | 2005-09-21 23:22:10 -0400 | [diff] [blame] | 5659 | if (id->driver_data & DEV_HAS_CHECKSUM) { |
Ayaz Abdulla | f2ad2d9 | 2006-08-24 17:35:41 -0400 | [diff] [blame] | 5660 | np->rx_csum = 1; |
Manfred Spraul | 8a4ae7f | 2005-09-21 23:22:10 -0400 | [diff] [blame] | 5661 | np->txrxctl_bits |= NVREG_TXRXCTL_RXCHECK; |
Ayaz Abdulla | edcfe5f | 2008-08-20 16:34:37 -0700 | [diff] [blame] | 5662 | dev->features |= NETIF_F_IP_CSUM | NETIF_F_SG; |
Ayaz Abdulla | fa45459 | 2006-01-05 22:45:45 -0800 | [diff] [blame] | 5663 | dev->features |= NETIF_F_TSO; |
Ayaz Abdulla | 2182816 | 2007-01-23 12:27:21 -0500 | [diff] [blame] | 5664 | } |
Manfred Spraul | 8a4ae7f | 2005-09-21 23:22:10 -0400 | [diff] [blame] | 5665 | |
Ayaz Abdulla | ee407b0 | 2006-02-04 13:13:17 -0500 | [diff] [blame] | 5666 | np->vlanctl_bits = 0; |
| 5667 | if (id->driver_data & DEV_HAS_VLAN) { |
| 5668 | np->vlanctl_bits = NVREG_VLANCONTROL_ENABLE; |
| 5669 | dev->features |= NETIF_F_HW_VLAN_RX | NETIF_F_HW_VLAN_TX; |
Ayaz Abdulla | ee407b0 | 2006-02-04 13:13:17 -0500 | [diff] [blame] | 5670 | } |
| 5671 | |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 5672 | np->pause_flags = NV_PAUSEFRAME_RX_CAPABLE | NV_PAUSEFRAME_RX_REQ | NV_PAUSEFRAME_AUTONEG; |
Ayaz Abdulla | 5289b4c | 2008-02-05 12:30:01 -0500 | [diff] [blame] | 5673 | if ((id->driver_data & DEV_HAS_PAUSEFRAME_TX_V1) || |
| 5674 | (id->driver_data & DEV_HAS_PAUSEFRAME_TX_V2) || |
| 5675 | (id->driver_data & DEV_HAS_PAUSEFRAME_TX_V3)) { |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 5676 | np->pause_flags |= NV_PAUSEFRAME_TX_CAPABLE | NV_PAUSEFRAME_TX_REQ; |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 5677 | } |
Jeff Garzik | f3b197a | 2006-05-26 21:39:03 -0400 | [diff] [blame] | 5678 | |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 5679 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5680 | err = -ENOMEM; |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 5681 | np->base = ioremap(addr, np->register_size); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5682 | if (!np->base) |
| 5683 | goto out_relreg; |
| 5684 | dev->base_addr = (unsigned long)np->base; |
Manfred Spraul | ee73362 | 2005-07-31 18:32:26 +0200 | [diff] [blame] | 5685 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5686 | dev->irq = pci_dev->irq; |
Manfred Spraul | ee73362 | 2005-07-31 18:32:26 +0200 | [diff] [blame] | 5687 | |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 5688 | np->rx_ring_size = RX_RING_DEFAULT; |
| 5689 | np->tx_ring_size = TX_RING_DEFAULT; |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 5690 | |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 5691 | if (!nv_optimized(np)) { |
Manfred Spraul | ee73362 | 2005-07-31 18:32:26 +0200 | [diff] [blame] | 5692 | np->rx_ring.orig = pci_alloc_consistent(pci_dev, |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 5693 | sizeof(struct ring_desc) * (np->rx_ring_size + np->tx_ring_size), |
Manfred Spraul | ee73362 | 2005-07-31 18:32:26 +0200 | [diff] [blame] | 5694 | &np->ring_addr); |
| 5695 | if (!np->rx_ring.orig) |
| 5696 | goto out_unmap; |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 5697 | np->tx_ring.orig = &np->rx_ring.orig[np->rx_ring_size]; |
Manfred Spraul | ee73362 | 2005-07-31 18:32:26 +0200 | [diff] [blame] | 5698 | } else { |
| 5699 | np->rx_ring.ex = pci_alloc_consistent(pci_dev, |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 5700 | sizeof(struct ring_desc_ex) * (np->rx_ring_size + np->tx_ring_size), |
Manfred Spraul | ee73362 | 2005-07-31 18:32:26 +0200 | [diff] [blame] | 5701 | &np->ring_addr); |
| 5702 | if (!np->rx_ring.ex) |
| 5703 | goto out_unmap; |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 5704 | np->tx_ring.ex = &np->rx_ring.ex[np->rx_ring_size]; |
Manfred Spraul | ee73362 | 2005-07-31 18:32:26 +0200 | [diff] [blame] | 5705 | } |
Yoann Padioleau | dd00cc4 | 2007-07-19 01:49:03 -0700 | [diff] [blame] | 5706 | np->rx_skb = kcalloc(np->rx_ring_size, sizeof(struct nv_skb_map), GFP_KERNEL); |
| 5707 | np->tx_skb = kcalloc(np->tx_ring_size, sizeof(struct nv_skb_map), GFP_KERNEL); |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 5708 | if (!np->rx_skb || !np->tx_skb) |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 5709 | goto out_freering; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5710 | |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 5711 | if (!nv_optimized(np)) |
Stephen Hemminger | 0082982 | 2008-11-20 20:14:53 -0800 | [diff] [blame] | 5712 | dev->netdev_ops = &nv_netdev_ops; |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 5713 | else |
Stephen Hemminger | 0082982 | 2008-11-20 20:14:53 -0800 | [diff] [blame] | 5714 | dev->netdev_ops = &nv_netdev_ops_optimized; |
Stephen Hemminger | b94426b | 2008-11-19 22:26:51 -0800 | [diff] [blame] | 5715 | |
Stephen Hemminger | e27cdba | 2006-07-31 20:37:19 -0700 | [diff] [blame] | 5716 | #ifdef CONFIG_FORCEDETH_NAPI |
Stephen Hemminger | bea3348 | 2007-10-03 16:41:36 -0700 | [diff] [blame] | 5717 | netif_napi_add(dev, &np->napi, nv_napi_poll, RX_WORK_PER_LOOP); |
Stephen Hemminger | e27cdba | 2006-07-31 20:37:19 -0700 | [diff] [blame] | 5718 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5719 | SET_ETHTOOL_OPS(dev, &ops); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5720 | dev->watchdog_timeo = NV_WATCHDOG_TIMEO; |
| 5721 | |
| 5722 | pci_set_drvdata(pci_dev, dev); |
| 5723 | |
| 5724 | /* read the mac address */ |
| 5725 | base = get_hwbase(dev); |
| 5726 | np->orig_mac[0] = readl(base + NvRegMacAddrA); |
| 5727 | np->orig_mac[1] = readl(base + NvRegMacAddrB); |
| 5728 | |
Ayaz Abdulla | 5070d34 | 2006-07-31 12:05:01 -0400 | [diff] [blame] | 5729 | /* check the workaround bit for correct mac address order */ |
| 5730 | txreg = readl(base + NvRegTransmitPoll); |
Ayaz Abdulla | a376e79 | 2008-04-10 21:30:35 -0700 | [diff] [blame] | 5731 | if (id->driver_data & DEV_HAS_CORRECT_MACADDR) { |
Ayaz Abdulla | 5070d34 | 2006-07-31 12:05:01 -0400 | [diff] [blame] | 5732 | /* mac address is already in correct order */ |
| 5733 | dev->dev_addr[0] = (np->orig_mac[0] >> 0) & 0xff; |
| 5734 | dev->dev_addr[1] = (np->orig_mac[0] >> 8) & 0xff; |
| 5735 | dev->dev_addr[2] = (np->orig_mac[0] >> 16) & 0xff; |
| 5736 | dev->dev_addr[3] = (np->orig_mac[0] >> 24) & 0xff; |
| 5737 | dev->dev_addr[4] = (np->orig_mac[1] >> 0) & 0xff; |
| 5738 | dev->dev_addr[5] = (np->orig_mac[1] >> 8) & 0xff; |
Ayaz Abdulla | a376e79 | 2008-04-10 21:30:35 -0700 | [diff] [blame] | 5739 | } else if (txreg & NVREG_TRANSMITPOLL_MAC_ADDR_REV) { |
| 5740 | /* mac address is already in correct order */ |
| 5741 | dev->dev_addr[0] = (np->orig_mac[0] >> 0) & 0xff; |
| 5742 | dev->dev_addr[1] = (np->orig_mac[0] >> 8) & 0xff; |
| 5743 | dev->dev_addr[2] = (np->orig_mac[0] >> 16) & 0xff; |
| 5744 | dev->dev_addr[3] = (np->orig_mac[0] >> 24) & 0xff; |
| 5745 | dev->dev_addr[4] = (np->orig_mac[1] >> 0) & 0xff; |
| 5746 | dev->dev_addr[5] = (np->orig_mac[1] >> 8) & 0xff; |
| 5747 | /* |
| 5748 | * Set orig mac address back to the reversed version. |
| 5749 | * This flag will be cleared during low power transition. |
| 5750 | * Therefore, we should always put back the reversed address. |
| 5751 | */ |
| 5752 | np->orig_mac[0] = (dev->dev_addr[5] << 0) + (dev->dev_addr[4] << 8) + |
| 5753 | (dev->dev_addr[3] << 16) + (dev->dev_addr[2] << 24); |
| 5754 | np->orig_mac[1] = (dev->dev_addr[1] << 0) + (dev->dev_addr[0] << 8); |
Ayaz Abdulla | 5070d34 | 2006-07-31 12:05:01 -0400 | [diff] [blame] | 5755 | } else { |
| 5756 | /* need to reverse mac address to correct order */ |
| 5757 | dev->dev_addr[0] = (np->orig_mac[1] >> 8) & 0xff; |
| 5758 | dev->dev_addr[1] = (np->orig_mac[1] >> 0) & 0xff; |
| 5759 | dev->dev_addr[2] = (np->orig_mac[0] >> 24) & 0xff; |
| 5760 | dev->dev_addr[3] = (np->orig_mac[0] >> 16) & 0xff; |
| 5761 | dev->dev_addr[4] = (np->orig_mac[0] >> 8) & 0xff; |
| 5762 | dev->dev_addr[5] = (np->orig_mac[0] >> 0) & 0xff; |
Ayaz Abdulla | 5070d34 | 2006-07-31 12:05:01 -0400 | [diff] [blame] | 5763 | writel(txreg|NVREG_TRANSMITPOLL_MAC_ADDR_REV, base + NvRegTransmitPoll); |
Yinghai Lu | f55c21f | 2008-09-13 13:10:31 -0700 | [diff] [blame] | 5764 | printk(KERN_DEBUG "nv_probe: set workaround bit for reversed mac addr\n"); |
Ayaz Abdulla | 5070d34 | 2006-07-31 12:05:01 -0400 | [diff] [blame] | 5765 | } |
John W. Linville | c704b85 | 2005-09-12 10:48:56 -0400 | [diff] [blame] | 5766 | memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5767 | |
John W. Linville | c704b85 | 2005-09-12 10:48:56 -0400 | [diff] [blame] | 5768 | if (!is_valid_ether_addr(dev->perm_addr)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5769 | /* |
| 5770 | * Bad mac address. At least one bios sets the mac address |
| 5771 | * to 01:23:45:67:89:ab |
| 5772 | */ |
Jeff Garzik | 3f88ce4 | 2007-10-16 04:09:09 -0400 | [diff] [blame] | 5773 | dev_printk(KERN_ERR, &pci_dev->dev, |
Johannes Berg | e174961 | 2008-10-27 15:59:26 -0700 | [diff] [blame] | 5774 | "Invalid Mac address detected: %pM\n", |
| 5775 | dev->dev_addr); |
Jeff Garzik | 3f88ce4 | 2007-10-16 04:09:09 -0400 | [diff] [blame] | 5776 | dev_printk(KERN_ERR, &pci_dev->dev, |
| 5777 | "Please complain to your hardware vendor. Switching to a random MAC.\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5778 | dev->dev_addr[0] = 0x00; |
| 5779 | dev->dev_addr[1] = 0x00; |
| 5780 | dev->dev_addr[2] = 0x6c; |
| 5781 | get_random_bytes(&dev->dev_addr[3], 3); |
| 5782 | } |
| 5783 | |
Johannes Berg | e174961 | 2008-10-27 15:59:26 -0700 | [diff] [blame] | 5784 | dprintk(KERN_DEBUG "%s: MAC Address %pM\n", |
| 5785 | pci_name(pci_dev), dev->dev_addr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5786 | |
Ayaz Abdulla | f148965 | 2006-07-31 12:04:45 -0400 | [diff] [blame] | 5787 | /* set mac address */ |
| 5788 | nv_copy_mac_to_hw(dev); |
| 5789 | |
Tobias Diedrich | 9a60a82 | 2008-06-01 00:54:42 +0200 | [diff] [blame] | 5790 | /* Workaround current PCI init glitch: wakeup bits aren't |
| 5791 | * being set from PCI PM capability. |
| 5792 | */ |
| 5793 | device_init_wakeup(&pci_dev->dev, 1); |
| 5794 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5795 | /* disable WOL */ |
| 5796 | writel(0, base + NvRegWakeUpFlags); |
| 5797 | np->wolenabled = 0; |
| 5798 | |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 5799 | if (id->driver_data & DEV_HAS_POWER_CNTRL) { |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 5800 | |
| 5801 | /* take phy and nic out of low power mode */ |
| 5802 | powerstate = readl(base + NvRegPowerState2); |
| 5803 | powerstate &= ~NVREG_POWERSTATE2_POWERUP_MASK; |
| 5804 | if ((id->device == PCI_DEVICE_ID_NVIDIA_NVENET_12 || |
| 5805 | id->device == PCI_DEVICE_ID_NVIDIA_NVENET_13) && |
Auke Kok | 44c1013 | 2007-06-08 15:46:36 -0700 | [diff] [blame] | 5806 | pci_dev->revision >= 0xA3) |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 5807 | powerstate |= NVREG_POWERSTATE2_POWERUP_REV_A3; |
| 5808 | writel(powerstate, base + NvRegPowerState2); |
| 5809 | } |
| 5810 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5811 | if (np->desc_ver == DESC_VER_1) { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 5812 | np->tx_flags = NV_TX_VALID; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5813 | } else { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 5814 | np->tx_flags = NV_TX2_VALID; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5815 | } |
Ayaz Abdulla | 9e18476 | 2009-03-05 08:02:18 +0000 | [diff] [blame] | 5816 | |
| 5817 | np->msi_flags = 0; |
| 5818 | if ((id->driver_data & DEV_HAS_MSI) && msi) { |
| 5819 | np->msi_flags |= NV_MSI_CAPABLE; |
| 5820 | } |
| 5821 | if ((id->driver_data & DEV_HAS_MSI_X) && msix) { |
| 5822 | /* msix has had reported issues when modifying irqmask |
| 5823 | as in the case of napi, therefore, disable for now |
| 5824 | */ |
| 5825 | #ifndef CONFIG_FORCEDETH_NAPI |
| 5826 | np->msi_flags |= NV_MSI_X_CAPABLE; |
| 5827 | #endif |
| 5828 | } |
| 5829 | |
| 5830 | if (optimization_mode == NV_OPTIMIZATION_MODE_CPU) { |
Ayaz Abdulla | a971c32 | 2005-11-11 08:30:38 -0500 | [diff] [blame] | 5831 | np->irqmask = NVREG_IRQMASK_CPU; |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 5832 | if (np->msi_flags & NV_MSI_X_CAPABLE) /* set number of vectors */ |
| 5833 | np->msi_flags |= 0x0001; |
Ayaz Abdulla | 9e18476 | 2009-03-05 08:02:18 +0000 | [diff] [blame] | 5834 | } else if (optimization_mode == NV_OPTIMIZATION_MODE_DYNAMIC && |
| 5835 | !(id->driver_data & DEV_NEED_TIMERIRQ)) { |
| 5836 | /* start off in throughput mode */ |
| 5837 | np->irqmask = NVREG_IRQMASK_THROUGHPUT; |
| 5838 | /* remove support for msix mode */ |
| 5839 | np->msi_flags &= ~NV_MSI_X_CAPABLE; |
| 5840 | } else { |
| 5841 | optimization_mode = NV_OPTIMIZATION_MODE_THROUGHPUT; |
| 5842 | np->irqmask = NVREG_IRQMASK_THROUGHPUT; |
| 5843 | if (np->msi_flags & NV_MSI_X_CAPABLE) /* set number of vectors */ |
| 5844 | np->msi_flags |= 0x0003; |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 5845 | } |
Ayaz Abdulla | a971c32 | 2005-11-11 08:30:38 -0500 | [diff] [blame] | 5846 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5847 | if (id->driver_data & DEV_NEED_TIMERIRQ) |
| 5848 | np->irqmask |= NVREG_IRQ_TIMER; |
| 5849 | if (id->driver_data & DEV_NEED_LINKTIMER) { |
| 5850 | dprintk(KERN_INFO "%s: link timer on.\n", pci_name(pci_dev)); |
| 5851 | np->need_linktimer = 1; |
| 5852 | np->link_timeout = jiffies + LINK_TIMEOUT; |
| 5853 | } else { |
| 5854 | dprintk(KERN_INFO "%s: link timer off.\n", pci_name(pci_dev)); |
| 5855 | np->need_linktimer = 0; |
| 5856 | } |
| 5857 | |
Ayaz Abdulla | 3b446c3 | 2008-03-10 14:58:21 -0500 | [diff] [blame] | 5858 | /* Limit the number of tx's outstanding for hw bug */ |
| 5859 | if (id->driver_data & DEV_NEED_TX_LIMIT) { |
| 5860 | np->tx_limit = 1; |
| 5861 | if ((id->device == PCI_DEVICE_ID_NVIDIA_NVENET_32 || |
| 5862 | id->device == PCI_DEVICE_ID_NVIDIA_NVENET_33 || |
| 5863 | id->device == PCI_DEVICE_ID_NVIDIA_NVENET_34 || |
| 5864 | id->device == PCI_DEVICE_ID_NVIDIA_NVENET_35 || |
| 5865 | id->device == PCI_DEVICE_ID_NVIDIA_NVENET_36 || |
| 5866 | id->device == PCI_DEVICE_ID_NVIDIA_NVENET_37 || |
| 5867 | id->device == PCI_DEVICE_ID_NVIDIA_NVENET_38 || |
| 5868 | id->device == PCI_DEVICE_ID_NVIDIA_NVENET_39) && |
| 5869 | pci_dev->revision >= 0xA2) |
| 5870 | np->tx_limit = 0; |
| 5871 | } |
| 5872 | |
Ayaz Abdulla | 7e680c2 | 2006-10-30 17:31:51 -0500 | [diff] [blame] | 5873 | /* clear phy state and temporarily halt phy interrupts */ |
| 5874 | writel(0, base + NvRegMIIMask); |
| 5875 | phystate = readl(base + NvRegAdapterControl); |
| 5876 | if (phystate & NVREG_ADAPTCTL_RUNNING) { |
| 5877 | phystate_orig = 1; |
| 5878 | phystate &= ~NVREG_ADAPTCTL_RUNNING; |
| 5879 | writel(phystate, base + NvRegAdapterControl); |
| 5880 | } |
Ayaz Abdulla | eb79842 | 2008-02-04 15:14:04 -0500 | [diff] [blame] | 5881 | writel(NVREG_MIISTAT_MASK_ALL, base + NvRegMIIStatus); |
Ayaz Abdulla | 7e680c2 | 2006-10-30 17:31:51 -0500 | [diff] [blame] | 5882 | |
| 5883 | if (id->driver_data & DEV_HAS_MGMT_UNIT) { |
Ayaz Abdulla | 7e680c2 | 2006-10-30 17:31:51 -0500 | [diff] [blame] | 5884 | /* management unit running on the mac? */ |
Ayaz Abdulla | cac1c52 | 2009-02-07 00:23:57 -0800 | [diff] [blame] | 5885 | if ((readl(base + NvRegTransmitterControl) & NVREG_XMITCTL_MGMT_ST) && |
| 5886 | (readl(base + NvRegTransmitterControl) & NVREG_XMITCTL_SYNC_PHY_INIT) && |
| 5887 | nv_mgmt_acquire_sema(dev) && |
| 5888 | nv_mgmt_get_version(dev)) { |
| 5889 | np->mac_in_use = 1; |
| 5890 | if (np->mgmt_version > 0) { |
| 5891 | np->mac_in_use = readl(base + NvRegMgmtUnitControl) & NVREG_MGMTUNITCONTROL_INUSE; |
| 5892 | } |
| 5893 | dprintk(KERN_INFO "%s: mgmt unit is running. mac in use %x.\n", |
| 5894 | pci_name(pci_dev), np->mac_in_use); |
| 5895 | /* management unit setup the phy already? */ |
| 5896 | if (np->mac_in_use && |
| 5897 | ((readl(base + NvRegTransmitterControl) & NVREG_XMITCTL_SYNC_MASK) == |
| 5898 | NVREG_XMITCTL_SYNC_PHY_INIT)) { |
| 5899 | /* phy is inited by mgmt unit */ |
| 5900 | phyinitialized = 1; |
| 5901 | dprintk(KERN_INFO "%s: Phy already initialized by mgmt unit.\n", |
| 5902 | pci_name(pci_dev)); |
| 5903 | } else { |
| 5904 | /* we need to init the phy */ |
Ayaz Abdulla | 7e680c2 | 2006-10-30 17:31:51 -0500 | [diff] [blame] | 5905 | } |
| 5906 | } |
| 5907 | } |
| 5908 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5909 | /* find a suitable phy */ |
Ayaz Abdulla | 7a33e45 | 2005-11-11 08:31:11 -0500 | [diff] [blame] | 5910 | for (i = 1; i <= 32; i++) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5911 | int id1, id2; |
Ayaz Abdulla | 7a33e45 | 2005-11-11 08:31:11 -0500 | [diff] [blame] | 5912 | int phyaddr = i & 0x1F; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5913 | |
| 5914 | spin_lock_irq(&np->lock); |
Ayaz Abdulla | 7a33e45 | 2005-11-11 08:31:11 -0500 | [diff] [blame] | 5915 | id1 = mii_rw(dev, phyaddr, MII_PHYSID1, MII_READ); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5916 | spin_unlock_irq(&np->lock); |
| 5917 | if (id1 < 0 || id1 == 0xffff) |
| 5918 | continue; |
| 5919 | spin_lock_irq(&np->lock); |
Ayaz Abdulla | 7a33e45 | 2005-11-11 08:31:11 -0500 | [diff] [blame] | 5920 | id2 = mii_rw(dev, phyaddr, MII_PHYSID2, MII_READ); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5921 | spin_unlock_irq(&np->lock); |
| 5922 | if (id2 < 0 || id2 == 0xffff) |
| 5923 | continue; |
| 5924 | |
Ayaz Abdulla | edf7e5e | 2006-08-24 15:43:42 -0400 | [diff] [blame] | 5925 | np->phy_model = id2 & PHYID2_MODEL_MASK; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5926 | id1 = (id1 & PHYID1_OUI_MASK) << PHYID1_OUI_SHFT; |
| 5927 | id2 = (id2 & PHYID2_OUI_MASK) >> PHYID2_OUI_SHFT; |
| 5928 | dprintk(KERN_DEBUG "%s: open: Found PHY %04x:%04x at address %d.\n", |
Ayaz Abdulla | 7a33e45 | 2005-11-11 08:31:11 -0500 | [diff] [blame] | 5929 | pci_name(pci_dev), id1, id2, phyaddr); |
| 5930 | np->phyaddr = phyaddr; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5931 | np->phy_oui = id1 | id2; |
Ayaz Abdulla | 9f3f791 | 2008-04-23 14:37:30 -0400 | [diff] [blame] | 5932 | |
| 5933 | /* Realtek hardcoded phy id1 to all zero's on certain phys */ |
| 5934 | if (np->phy_oui == PHY_OUI_REALTEK2) |
| 5935 | np->phy_oui = PHY_OUI_REALTEK; |
| 5936 | /* Setup phy revision for Realtek */ |
| 5937 | if (np->phy_oui == PHY_OUI_REALTEK && np->phy_model == PHY_MODEL_REALTEK_8211) |
| 5938 | np->phy_rev = mii_rw(dev, phyaddr, MII_RESV1, MII_READ) & PHY_REV_MASK; |
| 5939 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5940 | break; |
| 5941 | } |
Ayaz Abdulla | 7a33e45 | 2005-11-11 08:31:11 -0500 | [diff] [blame] | 5942 | if (i == 33) { |
Jeff Garzik | 3f88ce4 | 2007-10-16 04:09:09 -0400 | [diff] [blame] | 5943 | dev_printk(KERN_INFO, &pci_dev->dev, |
| 5944 | "open: Could not find a valid PHY.\n"); |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 5945 | goto out_error; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5946 | } |
Jeff Garzik | f3b197a | 2006-05-26 21:39:03 -0400 | [diff] [blame] | 5947 | |
Ayaz Abdulla | 7e680c2 | 2006-10-30 17:31:51 -0500 | [diff] [blame] | 5948 | if (!phyinitialized) { |
| 5949 | /* reset it */ |
| 5950 | phy_init(dev); |
Ayaz Abdulla | f35723e | 2003-02-20 03:03:54 -0500 | [diff] [blame] | 5951 | } else { |
| 5952 | /* see if it is a gigabit phy */ |
| 5953 | u32 mii_status = mii_rw(dev, np->phyaddr, MII_BMSR, MII_READ); |
| 5954 | if (mii_status & PHY_GIGABIT) { |
| 5955 | np->gigabit = PHY_GIGABIT; |
| 5956 | } |
Ayaz Abdulla | 7e680c2 | 2006-10-30 17:31:51 -0500 | [diff] [blame] | 5957 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5958 | |
| 5959 | /* set default link speed settings */ |
| 5960 | np->linkspeed = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10; |
| 5961 | np->duplex = 0; |
| 5962 | np->autoneg = 1; |
| 5963 | |
| 5964 | err = register_netdev(dev); |
| 5965 | if (err) { |
Jeff Garzik | 3f88ce4 | 2007-10-16 04:09:09 -0400 | [diff] [blame] | 5966 | dev_printk(KERN_INFO, &pci_dev->dev, |
| 5967 | "unable to register netdev: %d\n", err); |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 5968 | goto out_error; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5969 | } |
Jeff Garzik | 3f88ce4 | 2007-10-16 04:09:09 -0400 | [diff] [blame] | 5970 | |
| 5971 | dev_printk(KERN_INFO, &pci_dev->dev, "ifname %s, PHY OUI 0x%x @ %d, " |
| 5972 | "addr %2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x\n", |
| 5973 | dev->name, |
| 5974 | np->phy_oui, |
| 5975 | np->phyaddr, |
| 5976 | dev->dev_addr[0], |
| 5977 | dev->dev_addr[1], |
| 5978 | dev->dev_addr[2], |
| 5979 | dev->dev_addr[3], |
| 5980 | dev->dev_addr[4], |
| 5981 | dev->dev_addr[5]); |
| 5982 | |
| 5983 | dev_printk(KERN_INFO, &pci_dev->dev, "%s%s%s%s%s%s%s%s%s%sdesc-v%u\n", |
| 5984 | dev->features & NETIF_F_HIGHDMA ? "highdma " : "", |
Ayaz Abdulla | edcfe5f | 2008-08-20 16:34:37 -0700 | [diff] [blame] | 5985 | dev->features & (NETIF_F_IP_CSUM | NETIF_F_SG) ? |
Jeff Garzik | 3f88ce4 | 2007-10-16 04:09:09 -0400 | [diff] [blame] | 5986 | "csum " : "", |
| 5987 | dev->features & (NETIF_F_HW_VLAN_RX | NETIF_F_HW_VLAN_TX) ? |
| 5988 | "vlan " : "", |
| 5989 | id->driver_data & DEV_HAS_POWER_CNTRL ? "pwrctl " : "", |
| 5990 | id->driver_data & DEV_HAS_MGMT_UNIT ? "mgmt " : "", |
| 5991 | id->driver_data & DEV_NEED_TIMERIRQ ? "timirq " : "", |
| 5992 | np->gigabit == PHY_GIGABIT ? "gbit " : "", |
| 5993 | np->need_linktimer ? "lnktim " : "", |
| 5994 | np->msi_flags & NV_MSI_CAPABLE ? "msi " : "", |
| 5995 | np->msi_flags & NV_MSI_X_CAPABLE ? "msi-x " : "", |
| 5996 | np->desc_ver); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5997 | |
| 5998 | return 0; |
| 5999 | |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 6000 | out_error: |
Ayaz Abdulla | 7e680c2 | 2006-10-30 17:31:51 -0500 | [diff] [blame] | 6001 | if (phystate_orig) |
| 6002 | writel(phystate|NVREG_ADAPTCTL_RUNNING, base + NvRegAdapterControl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 6003 | pci_set_drvdata(pci_dev, NULL); |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 6004 | out_freering: |
| 6005 | free_rings(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 6006 | out_unmap: |
| 6007 | iounmap(get_hwbase(dev)); |
| 6008 | out_relreg: |
| 6009 | pci_release_regions(pci_dev); |
| 6010 | out_disable: |
| 6011 | pci_disable_device(pci_dev); |
| 6012 | out_free: |
| 6013 | free_netdev(dev); |
| 6014 | out: |
| 6015 | return err; |
| 6016 | } |
| 6017 | |
Ayaz Abdulla | 9f3f791 | 2008-04-23 14:37:30 -0400 | [diff] [blame] | 6018 | static void nv_restore_phy(struct net_device *dev) |
| 6019 | { |
| 6020 | struct fe_priv *np = netdev_priv(dev); |
| 6021 | u16 phy_reserved, mii_control; |
| 6022 | |
| 6023 | if (np->phy_oui == PHY_OUI_REALTEK && |
| 6024 | np->phy_model == PHY_MODEL_REALTEK_8201 && |
| 6025 | phy_cross == NV_CROSSOVER_DETECTION_DISABLED) { |
| 6026 | mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT3); |
| 6027 | phy_reserved = mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG2, MII_READ); |
| 6028 | phy_reserved &= ~PHY_REALTEK_INIT_MSK1; |
| 6029 | phy_reserved |= PHY_REALTEK_INIT8; |
| 6030 | mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG2, phy_reserved); |
| 6031 | mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT1); |
| 6032 | |
| 6033 | /* restart auto negotiation */ |
| 6034 | mii_control = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ); |
| 6035 | mii_control |= (BMCR_ANRESTART | BMCR_ANENABLE); |
| 6036 | mii_rw(dev, np->phyaddr, MII_BMCR, mii_control); |
| 6037 | } |
| 6038 | } |
| 6039 | |
Yinghai Lu | f55c21f | 2008-09-13 13:10:31 -0700 | [diff] [blame] | 6040 | static void nv_restore_mac_addr(struct pci_dev *pci_dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 6041 | { |
| 6042 | struct net_device *dev = pci_get_drvdata(pci_dev); |
Ayaz Abdulla | f148965 | 2006-07-31 12:04:45 -0400 | [diff] [blame] | 6043 | struct fe_priv *np = netdev_priv(dev); |
| 6044 | u8 __iomem *base = get_hwbase(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 6045 | |
Ayaz Abdulla | f148965 | 2006-07-31 12:04:45 -0400 | [diff] [blame] | 6046 | /* special op: write back the misordered MAC address - otherwise |
| 6047 | * the next nv_probe would see a wrong address. |
| 6048 | */ |
| 6049 | writel(np->orig_mac[0], base + NvRegMacAddrA); |
| 6050 | writel(np->orig_mac[1], base + NvRegMacAddrB); |
Björn Steinbrink | 2e3884b | 2008-01-07 23:22:53 -0800 | [diff] [blame] | 6051 | writel(readl(base + NvRegTransmitPoll) & ~NVREG_TRANSMITPOLL_MAC_ADDR_REV, |
| 6052 | base + NvRegTransmitPoll); |
Yinghai Lu | f55c21f | 2008-09-13 13:10:31 -0700 | [diff] [blame] | 6053 | } |
| 6054 | |
| 6055 | static void __devexit nv_remove(struct pci_dev *pci_dev) |
| 6056 | { |
| 6057 | struct net_device *dev = pci_get_drvdata(pci_dev); |
| 6058 | |
| 6059 | unregister_netdev(dev); |
| 6060 | |
| 6061 | nv_restore_mac_addr(pci_dev); |
Ayaz Abdulla | f148965 | 2006-07-31 12:04:45 -0400 | [diff] [blame] | 6062 | |
Ayaz Abdulla | 9f3f791 | 2008-04-23 14:37:30 -0400 | [diff] [blame] | 6063 | /* restore any phy related changes */ |
| 6064 | nv_restore_phy(dev); |
| 6065 | |
Ayaz Abdulla | cac1c52 | 2009-02-07 00:23:57 -0800 | [diff] [blame] | 6066 | nv_mgmt_release_sema(dev); |
| 6067 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 6068 | /* free all structures */ |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 6069 | free_rings(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 6070 | iounmap(get_hwbase(dev)); |
| 6071 | pci_release_regions(pci_dev); |
| 6072 | pci_disable_device(pci_dev); |
| 6073 | free_netdev(dev); |
| 6074 | pci_set_drvdata(pci_dev, NULL); |
| 6075 | } |
| 6076 | |
Francois Romieu | a189317 | 2006-10-10 14:33:27 -0700 | [diff] [blame] | 6077 | #ifdef CONFIG_PM |
| 6078 | static int nv_suspend(struct pci_dev *pdev, pm_message_t state) |
| 6079 | { |
| 6080 | struct net_device *dev = pci_get_drvdata(pdev); |
| 6081 | struct fe_priv *np = netdev_priv(dev); |
Tobias Diedrich | 1a1ca86 | 2008-05-18 15:03:44 +0200 | [diff] [blame] | 6082 | u8 __iomem *base = get_hwbase(dev); |
| 6083 | int i; |
Francois Romieu | a189317 | 2006-10-10 14:33:27 -0700 | [diff] [blame] | 6084 | |
Tobias Diedrich | 25d9081 | 2008-05-18 15:04:29 +0200 | [diff] [blame] | 6085 | if (netif_running(dev)) { |
| 6086 | // Gross. |
| 6087 | nv_close(dev); |
| 6088 | } |
Francois Romieu | a189317 | 2006-10-10 14:33:27 -0700 | [diff] [blame] | 6089 | netif_device_detach(dev); |
| 6090 | |
Tobias Diedrich | 1a1ca86 | 2008-05-18 15:03:44 +0200 | [diff] [blame] | 6091 | /* save non-pci configuration space */ |
| 6092 | for (i = 0;i <= np->register_size/sizeof(u32); i++) |
| 6093 | np->saved_config_space[i] = readl(base + i*sizeof(u32)); |
| 6094 | |
Francois Romieu | a189317 | 2006-10-10 14:33:27 -0700 | [diff] [blame] | 6095 | pci_save_state(pdev); |
| 6096 | pci_enable_wake(pdev, pci_choose_state(pdev, state), np->wolenabled); |
Tobias Diedrich | 25d9081 | 2008-05-18 15:04:29 +0200 | [diff] [blame] | 6097 | pci_disable_device(pdev); |
Francois Romieu | a189317 | 2006-10-10 14:33:27 -0700 | [diff] [blame] | 6098 | pci_set_power_state(pdev, pci_choose_state(pdev, state)); |
Francois Romieu | a189317 | 2006-10-10 14:33:27 -0700 | [diff] [blame] | 6099 | return 0; |
| 6100 | } |
| 6101 | |
| 6102 | static int nv_resume(struct pci_dev *pdev) |
| 6103 | { |
| 6104 | struct net_device *dev = pci_get_drvdata(pdev); |
Tobias Diedrich | 1a1ca86 | 2008-05-18 15:03:44 +0200 | [diff] [blame] | 6105 | struct fe_priv *np = netdev_priv(dev); |
Ayaz Abdulla | a376e79 | 2008-04-10 21:30:35 -0700 | [diff] [blame] | 6106 | u8 __iomem *base = get_hwbase(dev); |
Tobias Diedrich | 1a1ca86 | 2008-05-18 15:03:44 +0200 | [diff] [blame] | 6107 | int i, rc = 0; |
Francois Romieu | a189317 | 2006-10-10 14:33:27 -0700 | [diff] [blame] | 6108 | |
Francois Romieu | a189317 | 2006-10-10 14:33:27 -0700 | [diff] [blame] | 6109 | pci_set_power_state(pdev, PCI_D0); |
| 6110 | pci_restore_state(pdev); |
Tobias Diedrich | 25d9081 | 2008-05-18 15:04:29 +0200 | [diff] [blame] | 6111 | /* ack any pending wake events, disable PME */ |
Francois Romieu | a189317 | 2006-10-10 14:33:27 -0700 | [diff] [blame] | 6112 | pci_enable_wake(pdev, PCI_D0, 0); |
| 6113 | |
Tobias Diedrich | 1a1ca86 | 2008-05-18 15:03:44 +0200 | [diff] [blame] | 6114 | /* restore non-pci configuration space */ |
| 6115 | for (i = 0;i <= np->register_size/sizeof(u32); i++) |
| 6116 | writel(np->saved_config_space[i], base+i*sizeof(u32)); |
Ayaz Abdulla | a376e79 | 2008-04-10 21:30:35 -0700 | [diff] [blame] | 6117 | |
Ayaz Abdulla | b6e4405 | 2009-02-07 00:24:15 -0800 | [diff] [blame] | 6118 | pci_write_config_dword(pdev, NV_MSI_PRIV_OFFSET, NV_MSI_PRIV_VALUE); |
| 6119 | |
Tobias Diedrich | 25d9081 | 2008-05-18 15:04:29 +0200 | [diff] [blame] | 6120 | netif_device_attach(dev); |
| 6121 | if (netif_running(dev)) { |
| 6122 | rc = nv_open(dev); |
| 6123 | nv_set_multicast(dev); |
| 6124 | } |
Francois Romieu | a189317 | 2006-10-10 14:33:27 -0700 | [diff] [blame] | 6125 | return rc; |
| 6126 | } |
Tobias Diedrich | f735a2a | 2008-05-18 15:02:37 +0200 | [diff] [blame] | 6127 | |
| 6128 | static void nv_shutdown(struct pci_dev *pdev) |
| 6129 | { |
| 6130 | struct net_device *dev = pci_get_drvdata(pdev); |
| 6131 | struct fe_priv *np = netdev_priv(dev); |
| 6132 | |
| 6133 | if (netif_running(dev)) |
| 6134 | nv_close(dev); |
| 6135 | |
Tobias Diedrich | 34edaa8 | 2009-02-16 00:13:20 -0800 | [diff] [blame] | 6136 | /* |
| 6137 | * Restore the MAC so a kernel started by kexec won't get confused. |
| 6138 | * If we really go for poweroff, we must not restore the MAC, |
| 6139 | * otherwise the MAC for WOL will be reversed at least on some boards. |
| 6140 | */ |
| 6141 | if (system_state != SYSTEM_POWER_OFF) { |
| 6142 | nv_restore_mac_addr(pdev); |
| 6143 | } |
Yinghai Lu | f55c21f | 2008-09-13 13:10:31 -0700 | [diff] [blame] | 6144 | |
Tobias Diedrich | f735a2a | 2008-05-18 15:02:37 +0200 | [diff] [blame] | 6145 | pci_disable_device(pdev); |
Tobias Diedrich | 34edaa8 | 2009-02-16 00:13:20 -0800 | [diff] [blame] | 6146 | /* |
| 6147 | * Apparently it is not possible to reinitialise from D3 hot, |
| 6148 | * only put the device into D3 if we really go for poweroff. |
| 6149 | */ |
Rafael J. Wysocki | 3cb5599 | 2008-09-05 14:00:19 -0700 | [diff] [blame] | 6150 | if (system_state == SYSTEM_POWER_OFF) { |
| 6151 | if (pci_enable_wake(pdev, PCI_D3cold, np->wolenabled)) |
| 6152 | pci_enable_wake(pdev, PCI_D3hot, np->wolenabled); |
| 6153 | pci_set_power_state(pdev, PCI_D3hot); |
| 6154 | } |
Tobias Diedrich | f735a2a | 2008-05-18 15:02:37 +0200 | [diff] [blame] | 6155 | } |
Francois Romieu | a189317 | 2006-10-10 14:33:27 -0700 | [diff] [blame] | 6156 | #else |
| 6157 | #define nv_suspend NULL |
Tobias Diedrich | f735a2a | 2008-05-18 15:02:37 +0200 | [diff] [blame] | 6158 | #define nv_shutdown NULL |
Francois Romieu | a189317 | 2006-10-10 14:33:27 -0700 | [diff] [blame] | 6159 | #define nv_resume NULL |
| 6160 | #endif /* CONFIG_PM */ |
| 6161 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 6162 | static struct pci_device_id pci_tbl[] = { |
| 6163 | { /* nForce Ethernet Controller */ |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 6164 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_1), |
Manfred Spraul | c2dba06 | 2005-07-31 18:29:47 +0200 | [diff] [blame] | 6165 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 6166 | }, |
| 6167 | { /* nForce2 Ethernet Controller */ |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 6168 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_2), |
Manfred Spraul | c2dba06 | 2005-07-31 18:29:47 +0200 | [diff] [blame] | 6169 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 6170 | }, |
| 6171 | { /* nForce3 Ethernet Controller */ |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 6172 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_3), |
Manfred Spraul | c2dba06 | 2005-07-31 18:29:47 +0200 | [diff] [blame] | 6173 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 6174 | }, |
| 6175 | { /* nForce3 Ethernet Controller */ |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 6176 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_4), |
Manfred Spraul | 8a4ae7f | 2005-09-21 23:22:10 -0400 | [diff] [blame] | 6177 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 6178 | }, |
| 6179 | { /* nForce3 Ethernet Controller */ |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 6180 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_5), |
Manfred Spraul | 8a4ae7f | 2005-09-21 23:22:10 -0400 | [diff] [blame] | 6181 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 6182 | }, |
| 6183 | { /* nForce3 Ethernet Controller */ |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 6184 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_6), |
Manfred Spraul | 8a4ae7f | 2005-09-21 23:22:10 -0400 | [diff] [blame] | 6185 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 6186 | }, |
| 6187 | { /* nForce3 Ethernet Controller */ |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 6188 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_7), |
Manfred Spraul | 8a4ae7f | 2005-09-21 23:22:10 -0400 | [diff] [blame] | 6189 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 6190 | }, |
| 6191 | { /* CK804 Ethernet Controller */ |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 6192 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_8), |
Yinghai Lu | 033e97b | 2009-02-06 01:30:56 -0800 | [diff] [blame] | 6193 | .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_STATISTICS_V1|DEV_NEED_TX_LIMIT, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 6194 | }, |
| 6195 | { /* CK804 Ethernet Controller */ |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 6196 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_9), |
Yinghai Lu | 033e97b | 2009-02-06 01:30:56 -0800 | [diff] [blame] | 6197 | .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_STATISTICS_V1|DEV_NEED_TX_LIMIT, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 6198 | }, |
| 6199 | { /* MCP04 Ethernet Controller */ |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 6200 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_10), |
Ayaz Abdulla | 9e18476 | 2009-03-05 08:02:18 +0000 | [diff] [blame] | 6201 | .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_STATISTICS_V1|DEV_NEED_TX_LIMIT, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 6202 | }, |
| 6203 | { /* MCP04 Ethernet Controller */ |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 6204 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_11), |
Ayaz Abdulla | 9e18476 | 2009-03-05 08:02:18 +0000 | [diff] [blame] | 6205 | .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_STATISTICS_V1|DEV_NEED_TX_LIMIT, |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 6206 | }, |
| 6207 | { /* MCP51 Ethernet Controller */ |
| 6208 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_12), |
Ayaz Abdulla | 9e18476 | 2009-03-05 08:02:18 +0000 | [diff] [blame] | 6209 | .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_STATISTICS_V1, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 6210 | }, |
Manfred Spraul | 9992d4a | 2005-06-05 17:36:11 +0200 | [diff] [blame] | 6211 | { /* MCP51 Ethernet Controller */ |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 6212 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_13), |
Ayaz Abdulla | 9e18476 | 2009-03-05 08:02:18 +0000 | [diff] [blame] | 6213 | .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_STATISTICS_V1, |
Manfred Spraul | 9992d4a | 2005-06-05 17:36:11 +0200 | [diff] [blame] | 6214 | }, |
Manfred Spraul | f49d16e | 2005-06-26 11:36:52 +0200 | [diff] [blame] | 6215 | { /* MCP55 Ethernet Controller */ |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 6216 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_14), |
Yinghai Lu | 033e97b | 2009-02-06 01:30:56 -0800 | [diff] [blame] | 6217 | .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_VLAN|DEV_HAS_MSI|DEV_HAS_MSI_X|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_NEED_TX_LIMIT, |
Manfred Spraul | f49d16e | 2005-06-26 11:36:52 +0200 | [diff] [blame] | 6218 | }, |
| 6219 | { /* MCP55 Ethernet Controller */ |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 6220 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_15), |
Yinghai Lu | 033e97b | 2009-02-06 01:30:56 -0800 | [diff] [blame] | 6221 | .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_VLAN|DEV_HAS_MSI|DEV_HAS_MSI_X|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_NEED_TX_LIMIT, |
Manfred Spraul | f49d16e | 2005-06-26 11:36:52 +0200 | [diff] [blame] | 6222 | }, |
Ayaz Abdulla | c99ce7e | 2006-06-10 22:48:28 -0400 | [diff] [blame] | 6223 | { /* MCP61 Ethernet Controller */ |
| 6224 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_16), |
Ayaz Abdulla | 9e18476 | 2009-03-05 08:02:18 +0000 | [diff] [blame] | 6225 | .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR, |
Ayaz Abdulla | c99ce7e | 2006-06-10 22:48:28 -0400 | [diff] [blame] | 6226 | }, |
| 6227 | { /* MCP61 Ethernet Controller */ |
| 6228 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_17), |
Ayaz Abdulla | 9e18476 | 2009-03-05 08:02:18 +0000 | [diff] [blame] | 6229 | .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR, |
Ayaz Abdulla | c99ce7e | 2006-06-10 22:48:28 -0400 | [diff] [blame] | 6230 | }, |
| 6231 | { /* MCP61 Ethernet Controller */ |
| 6232 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_18), |
Ayaz Abdulla | 9e18476 | 2009-03-05 08:02:18 +0000 | [diff] [blame] | 6233 | .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR, |
Ayaz Abdulla | c99ce7e | 2006-06-10 22:48:28 -0400 | [diff] [blame] | 6234 | }, |
| 6235 | { /* MCP61 Ethernet Controller */ |
| 6236 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_19), |
Ayaz Abdulla | 9e18476 | 2009-03-05 08:02:18 +0000 | [diff] [blame] | 6237 | .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR, |
Ayaz Abdulla | c99ce7e | 2006-06-10 22:48:28 -0400 | [diff] [blame] | 6238 | }, |
| 6239 | { /* MCP65 Ethernet Controller */ |
| 6240 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_20), |
Ayaz Abdulla | 9e18476 | 2009-03-05 08:02:18 +0000 | [diff] [blame] | 6241 | .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_NEED_TX_LIMIT|DEV_NEED_TX_LIMIT|DEV_HAS_GEAR_MODE, |
Ayaz Abdulla | c99ce7e | 2006-06-10 22:48:28 -0400 | [diff] [blame] | 6242 | }, |
| 6243 | { /* MCP65 Ethernet Controller */ |
| 6244 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_21), |
Ayaz Abdulla | 9e18476 | 2009-03-05 08:02:18 +0000 | [diff] [blame] | 6245 | .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_NEED_TX_LIMIT|DEV_HAS_GEAR_MODE, |
Ayaz Abdulla | c99ce7e | 2006-06-10 22:48:28 -0400 | [diff] [blame] | 6246 | }, |
| 6247 | { /* MCP65 Ethernet Controller */ |
| 6248 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_22), |
Ayaz Abdulla | 9e18476 | 2009-03-05 08:02:18 +0000 | [diff] [blame] | 6249 | .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_NEED_TX_LIMIT|DEV_HAS_GEAR_MODE, |
Ayaz Abdulla | c99ce7e | 2006-06-10 22:48:28 -0400 | [diff] [blame] | 6250 | }, |
| 6251 | { /* MCP65 Ethernet Controller */ |
| 6252 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_23), |
Ayaz Abdulla | 9e18476 | 2009-03-05 08:02:18 +0000 | [diff] [blame] | 6253 | .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_NEED_TX_LIMIT|DEV_HAS_GEAR_MODE, |
Ayaz Abdulla | c99ce7e | 2006-06-10 22:48:28 -0400 | [diff] [blame] | 6254 | }, |
Ayaz Abdulla | f434484 | 2006-11-06 00:43:40 -0800 | [diff] [blame] | 6255 | { /* MCP67 Ethernet Controller */ |
| 6256 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_24), |
Ayaz Abdulla | 9e18476 | 2009-03-05 08:02:18 +0000 | [diff] [blame] | 6257 | .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_GEAR_MODE, |
Ayaz Abdulla | f434484 | 2006-11-06 00:43:40 -0800 | [diff] [blame] | 6258 | }, |
| 6259 | { /* MCP67 Ethernet Controller */ |
| 6260 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_25), |
Ayaz Abdulla | 9e18476 | 2009-03-05 08:02:18 +0000 | [diff] [blame] | 6261 | .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_GEAR_MODE, |
Ayaz Abdulla | f434484 | 2006-11-06 00:43:40 -0800 | [diff] [blame] | 6262 | }, |
| 6263 | { /* MCP67 Ethernet Controller */ |
| 6264 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_26), |
Ayaz Abdulla | 9e18476 | 2009-03-05 08:02:18 +0000 | [diff] [blame] | 6265 | .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_GEAR_MODE, |
Ayaz Abdulla | f434484 | 2006-11-06 00:43:40 -0800 | [diff] [blame] | 6266 | }, |
| 6267 | { /* MCP67 Ethernet Controller */ |
| 6268 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_27), |
Ayaz Abdulla | 9e18476 | 2009-03-05 08:02:18 +0000 | [diff] [blame] | 6269 | .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_GEAR_MODE, |
Ayaz Abdulla | f434484 | 2006-11-06 00:43:40 -0800 | [diff] [blame] | 6270 | }, |
Ayaz Abdulla | 1398661 | 2007-07-22 20:43:26 -0400 | [diff] [blame] | 6271 | { /* MCP73 Ethernet Controller */ |
| 6272 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_28), |
Ayaz Abdulla | 9e18476 | 2009-03-05 08:02:18 +0000 | [diff] [blame] | 6273 | .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_HAS_GEAR_MODE, |
Ayaz Abdulla | 1398661 | 2007-07-22 20:43:26 -0400 | [diff] [blame] | 6274 | }, |
| 6275 | { /* MCP73 Ethernet Controller */ |
| 6276 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_29), |
Ayaz Abdulla | 9e18476 | 2009-03-05 08:02:18 +0000 | [diff] [blame] | 6277 | .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_HAS_GEAR_MODE, |
Ayaz Abdulla | 1398661 | 2007-07-22 20:43:26 -0400 | [diff] [blame] | 6278 | }, |
| 6279 | { /* MCP73 Ethernet Controller */ |
| 6280 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_30), |
Ayaz Abdulla | 9e18476 | 2009-03-05 08:02:18 +0000 | [diff] [blame] | 6281 | .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_HAS_GEAR_MODE, |
Ayaz Abdulla | 1398661 | 2007-07-22 20:43:26 -0400 | [diff] [blame] | 6282 | }, |
| 6283 | { /* MCP73 Ethernet Controller */ |
| 6284 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_31), |
Ayaz Abdulla | 9e18476 | 2009-03-05 08:02:18 +0000 | [diff] [blame] | 6285 | .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_HAS_GEAR_MODE, |
Ayaz Abdulla | 1398661 | 2007-07-22 20:43:26 -0400 | [diff] [blame] | 6286 | }, |
Ayaz Abdulla | 96fd4cd | 2007-10-25 03:36:42 -0400 | [diff] [blame] | 6287 | { /* MCP77 Ethernet Controller */ |
| 6288 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_32), |
Ayaz Abdulla | 9e18476 | 2009-03-05 08:02:18 +0000 | [diff] [blame] | 6289 | .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V2|DEV_HAS_STATISTICS_V3|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_NEED_TX_LIMIT|DEV_HAS_GEAR_MODE, |
Ayaz Abdulla | 96fd4cd | 2007-10-25 03:36:42 -0400 | [diff] [blame] | 6290 | }, |
| 6291 | { /* MCP77 Ethernet Controller */ |
| 6292 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_33), |
Ayaz Abdulla | 9e18476 | 2009-03-05 08:02:18 +0000 | [diff] [blame] | 6293 | .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V2|DEV_HAS_STATISTICS_V3|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_NEED_TX_LIMIT|DEV_HAS_GEAR_MODE, |
Ayaz Abdulla | 96fd4cd | 2007-10-25 03:36:42 -0400 | [diff] [blame] | 6294 | }, |
| 6295 | { /* MCP77 Ethernet Controller */ |
| 6296 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_34), |
Ayaz Abdulla | 9e18476 | 2009-03-05 08:02:18 +0000 | [diff] [blame] | 6297 | .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V2|DEV_HAS_STATISTICS_V3|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_NEED_TX_LIMIT|DEV_HAS_GEAR_MODE, |
Ayaz Abdulla | 96fd4cd | 2007-10-25 03:36:42 -0400 | [diff] [blame] | 6298 | }, |
| 6299 | { /* MCP77 Ethernet Controller */ |
| 6300 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_35), |
Ayaz Abdulla | 9e18476 | 2009-03-05 08:02:18 +0000 | [diff] [blame] | 6301 | .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V2|DEV_HAS_STATISTICS_V3|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_NEED_TX_LIMIT|DEV_HAS_GEAR_MODE, |
Ayaz Abdulla | 96fd4cd | 2007-10-25 03:36:42 -0400 | [diff] [blame] | 6302 | }, |
Ayaz Abdulla | 490dde8 | 2007-11-23 20:54:01 -0500 | [diff] [blame] | 6303 | { /* MCP79 Ethernet Controller */ |
| 6304 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_36), |
Ayaz Abdulla | a7ee2f7 | 2009-01-09 22:40:06 -0800 | [diff] [blame] | 6305 | .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V3|DEV_HAS_STATISTICS_V3|DEV_HAS_TEST_EXTENDED|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_NEED_TX_LIMIT|DEV_HAS_GEAR_MODE, |
Ayaz Abdulla | 490dde8 | 2007-11-23 20:54:01 -0500 | [diff] [blame] | 6306 | }, |
| 6307 | { /* MCP79 Ethernet Controller */ |
| 6308 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_37), |
Ayaz Abdulla | 9e18476 | 2009-03-05 08:02:18 +0000 | [diff] [blame] | 6309 | .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V3|DEV_HAS_STATISTICS_V3|DEV_HAS_TEST_EXTENDED|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_NEED_TX_LIMIT|DEV_HAS_GEAR_MODE, |
Ayaz Abdulla | 490dde8 | 2007-11-23 20:54:01 -0500 | [diff] [blame] | 6310 | }, |
| 6311 | { /* MCP79 Ethernet Controller */ |
| 6312 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_38), |
Ayaz Abdulla | 9e18476 | 2009-03-05 08:02:18 +0000 | [diff] [blame] | 6313 | .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V3|DEV_HAS_STATISTICS_V3|DEV_HAS_TEST_EXTENDED|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_NEED_TX_LIMIT|DEV_HAS_GEAR_MODE, |
Ayaz Abdulla | 490dde8 | 2007-11-23 20:54:01 -0500 | [diff] [blame] | 6314 | }, |
| 6315 | { /* MCP79 Ethernet Controller */ |
| 6316 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_39), |
Ayaz Abdulla | 9e18476 | 2009-03-05 08:02:18 +0000 | [diff] [blame] | 6317 | .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V3|DEV_HAS_STATISTICS_V3|DEV_HAS_TEST_EXTENDED|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_NEED_TX_LIMIT|DEV_HAS_GEAR_MODE, |
Ayaz Abdulla | 490dde8 | 2007-11-23 20:54:01 -0500 | [diff] [blame] | 6318 | }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 6319 | {0,}, |
| 6320 | }; |
| 6321 | |
| 6322 | static struct pci_driver driver = { |
Jeff Garzik | 3f88ce4 | 2007-10-16 04:09:09 -0400 | [diff] [blame] | 6323 | .name = DRV_NAME, |
| 6324 | .id_table = pci_tbl, |
| 6325 | .probe = nv_probe, |
| 6326 | .remove = __devexit_p(nv_remove), |
| 6327 | .suspend = nv_suspend, |
| 6328 | .resume = nv_resume, |
Tobias Diedrich | f735a2a | 2008-05-18 15:02:37 +0200 | [diff] [blame] | 6329 | .shutdown = nv_shutdown, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 6330 | }; |
| 6331 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 6332 | static int __init init_nic(void) |
| 6333 | { |
Jeff Garzik | 2991762 | 2006-08-19 17:48:59 -0400 | [diff] [blame] | 6334 | return pci_register_driver(&driver); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 6335 | } |
| 6336 | |
| 6337 | static void __exit exit_nic(void) |
| 6338 | { |
| 6339 | pci_unregister_driver(&driver); |
| 6340 | } |
| 6341 | |
| 6342 | module_param(max_interrupt_work, int, 0); |
| 6343 | MODULE_PARM_DESC(max_interrupt_work, "forcedeth maximum events handled per interrupt"); |
Ayaz Abdulla | a971c32 | 2005-11-11 08:30:38 -0500 | [diff] [blame] | 6344 | module_param(optimization_mode, int, 0); |
Ayaz Abdulla | 9e18476 | 2009-03-05 08:02:18 +0000 | [diff] [blame] | 6345 | MODULE_PARM_DESC(optimization_mode, "In throughput mode (0), every tx & rx packet will generate an interrupt. In CPU mode (1), interrupts are controlled by a timer. In dynamic mode (2), the mode toggles between throughput and CPU mode based on network load."); |
Ayaz Abdulla | a971c32 | 2005-11-11 08:30:38 -0500 | [diff] [blame] | 6346 | module_param(poll_interval, int, 0); |
| 6347 | MODULE_PARM_DESC(poll_interval, "Interval determines how frequent timer interrupt is generated by [(time_in_micro_secs * 100) / (2^10)]. Min is 0 and Max is 65535."); |
Ayaz Abdulla | 69fe3fd | 2006-06-10 22:48:18 -0400 | [diff] [blame] | 6348 | module_param(msi, int, 0); |
| 6349 | MODULE_PARM_DESC(msi, "MSI interrupts are enabled by setting to 1 and disabled by setting to 0."); |
| 6350 | module_param(msix, int, 0); |
| 6351 | MODULE_PARM_DESC(msix, "MSIX interrupts are enabled by setting to 1 and disabled by setting to 0."); |
| 6352 | module_param(dma_64bit, int, 0); |
| 6353 | MODULE_PARM_DESC(dma_64bit, "High DMA is enabled by setting to 1 and disabled by setting to 0."); |
Ayaz Abdulla | 9f3f791 | 2008-04-23 14:37:30 -0400 | [diff] [blame] | 6354 | module_param(phy_cross, int, 0); |
| 6355 | MODULE_PARM_DESC(phy_cross, "Phy crossover detection for Realtek 8201 phy is enabled by setting to 1 and disabled by setting to 0."); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 6356 | |
| 6357 | MODULE_AUTHOR("Manfred Spraul <manfred@colorfullife.com>"); |
| 6358 | MODULE_DESCRIPTION("Reverse Engineered nForce ethernet driver"); |
| 6359 | MODULE_LICENSE("GPL"); |
| 6360 | |
| 6361 | MODULE_DEVICE_TABLE(pci, pci_tbl); |
| 6362 | |
| 6363 | module_init(init_nic); |
| 6364 | module_exit(exit_nic); |