Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1 | /*- |
| 2 | * Copyright (c) 2002-2005 Sam Leffler, Errno Consulting |
| 3 | * Copyright (c) 2004-2005 Atheros Communications, Inc. |
| 4 | * Copyright (c) 2006 Devicescape Software, Inc. |
| 5 | * Copyright (c) 2007 Jiri Slaby <jirislaby@gmail.com> |
| 6 | * Copyright (c) 2007 Luis R. Rodriguez <mcgrof@winlab.rutgers.edu> |
| 7 | * |
| 8 | * All rights reserved. |
| 9 | * |
| 10 | * Redistribution and use in source and binary forms, with or without |
| 11 | * modification, are permitted provided that the following conditions |
| 12 | * are met: |
| 13 | * 1. Redistributions of source code must retain the above copyright |
| 14 | * notice, this list of conditions and the following disclaimer, |
| 15 | * without modification. |
| 16 | * 2. Redistributions in binary form must reproduce at minimum a disclaimer |
| 17 | * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any |
| 18 | * redistribution must be conditioned upon including a substantially |
| 19 | * similar Disclaimer requirement for further binary redistribution. |
| 20 | * 3. Neither the names of the above-listed copyright holders nor the names |
| 21 | * of any contributors may be used to endorse or promote products derived |
| 22 | * from this software without specific prior written permission. |
| 23 | * |
| 24 | * Alternatively, this software may be distributed under the terms of the |
| 25 | * GNU General Public License ("GPL") version 2 as published by the Free |
| 26 | * Software Foundation. |
| 27 | * |
| 28 | * NO WARRANTY |
| 29 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
| 30 | * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
| 31 | * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY |
| 32 | * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL |
| 33 | * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, |
| 34 | * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 35 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 36 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER |
| 37 | * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 38 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF |
| 39 | * THE POSSIBILITY OF SUCH DAMAGES. |
| 40 | * |
| 41 | */ |
| 42 | |
Joe Perches | 516304b | 2012-03-18 17:30:52 -0700 | [diff] [blame] | 43 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
| 44 | |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 45 | #include <linux/module.h> |
| 46 | #include <linux/delay.h> |
Alexey Dobriyan | b7f080c | 2011-06-16 11:01:34 +0000 | [diff] [blame] | 47 | #include <linux/dma-mapping.h> |
Jiri Slaby | 274c7c3 | 2008-07-15 17:44:20 +0200 | [diff] [blame] | 48 | #include <linux/hardirq.h> |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 49 | #include <linux/if.h> |
Jiri Slaby | 274c7c3 | 2008-07-15 17:44:20 +0200 | [diff] [blame] | 50 | #include <linux/io.h> |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 51 | #include <linux/netdevice.h> |
| 52 | #include <linux/cache.h> |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 53 | #include <linux/ethtool.h> |
| 54 | #include <linux/uaccess.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 55 | #include <linux/slab.h> |
Ben Greear | b1ae1ed | 2010-09-30 12:22:58 -0700 | [diff] [blame] | 56 | #include <linux/etherdevice.h> |
Pavel Roskin | 931be26 | 2011-07-26 22:26:59 -0400 | [diff] [blame] | 57 | #include <linux/nl80211.h> |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 58 | |
| 59 | #include <net/ieee80211_radiotap.h> |
| 60 | |
| 61 | #include <asm/unaligned.h> |
| 62 | |
| 63 | #include "base.h" |
| 64 | #include "reg.h" |
| 65 | #include "debug.h" |
Bruno Randolf | 2111ac0 | 2010-04-02 18:44:08 +0900 | [diff] [blame] | 66 | #include "ani.h" |
Pavel Roskin | 931be26 | 2011-07-26 22:26:59 -0400 | [diff] [blame] | 67 | #include "ath5k.h" |
| 68 | #include "../regd.h" |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 69 | |
Bob Copeland | 0e47225 | 2011-01-24 23:32:55 -0500 | [diff] [blame] | 70 | #define CREATE_TRACE_POINTS |
| 71 | #include "trace.h" |
| 72 | |
Rusty Russell | eb93992 | 2011-12-19 14:08:01 +0000 | [diff] [blame] | 73 | bool ath5k_modparam_nohwcrypt; |
John W. Linville | 18cb6e3 | 2011-01-05 09:39:59 -0500 | [diff] [blame] | 74 | module_param_named(nohwcrypt, ath5k_modparam_nohwcrypt, bool, S_IRUGO); |
Bob Copeland | 9ad9a26 | 2008-10-29 08:30:54 -0400 | [diff] [blame] | 75 | MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption."); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 76 | |
Rusty Russell | eb93992 | 2011-12-19 14:08:01 +0000 | [diff] [blame] | 77 | static bool modparam_fastchanswitch; |
Nick Kossifidis | a99168e | 2011-06-02 03:09:48 +0300 | [diff] [blame] | 78 | module_param_named(fastchanswitch, modparam_fastchanswitch, bool, S_IRUGO); |
| 79 | MODULE_PARM_DESC(fastchanswitch, "Enable fast channel switching for AR2413/AR5413 radios."); |
| 80 | |
John W. Linville | 11deb53 | 2012-01-24 14:58:47 -0500 | [diff] [blame] | 81 | static bool ath5k_modparam_no_hw_rfkill_switch; |
Nick Kossifidis | 84e1e73 | 2011-11-25 20:40:27 +0200 | [diff] [blame] | 82 | module_param_named(no_hw_rfkill_switch, ath5k_modparam_no_hw_rfkill_switch, |
| 83 | bool, S_IRUGO); |
| 84 | MODULE_PARM_DESC(no_hw_rfkill_switch, "Ignore the GPIO RFKill switch state"); |
| 85 | |
Nick Kossifidis | a99168e | 2011-06-02 03:09:48 +0300 | [diff] [blame] | 86 | |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 87 | /* Module info */ |
| 88 | MODULE_AUTHOR("Jiri Slaby"); |
| 89 | MODULE_AUTHOR("Nick Kossifidis"); |
| 90 | MODULE_DESCRIPTION("Support for 5xxx series of Atheros 802.11 wireless LAN cards."); |
| 91 | MODULE_SUPPORTED_DEVICE("Atheros 5xxx WLAN cards"); |
| 92 | MODULE_LICENSE("Dual BSD/GPL"); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 93 | |
Felix Fietkau | 132b1c3 | 2010-12-02 10:26:56 +0100 | [diff] [blame] | 94 | static int ath5k_init(struct ieee80211_hw *hw); |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 95 | static int ath5k_reset(struct ath5k_hw *ah, struct ieee80211_channel *chan, |
Nick Kossifidis | 8aec7af | 2010-11-23 21:39:28 +0200 | [diff] [blame] | 96 | bool skip_pcu); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 97 | |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 98 | /* Known SREVs */ |
Jiri Slaby | 2c91108c | 2009-03-07 10:26:41 +0100 | [diff] [blame] | 99 | static const struct ath5k_srev_name srev_names[] = { |
Felix Fietkau | a0b907e | 2010-12-02 10:27:16 +0100 | [diff] [blame] | 100 | #ifdef CONFIG_ATHEROS_AR231X |
| 101 | { "5312", AR5K_VERSION_MAC, AR5K_SREV_AR5312_R2 }, |
| 102 | { "5312", AR5K_VERSION_MAC, AR5K_SREV_AR5312_R7 }, |
| 103 | { "2313", AR5K_VERSION_MAC, AR5K_SREV_AR2313_R8 }, |
| 104 | { "2315", AR5K_VERSION_MAC, AR5K_SREV_AR2315_R6 }, |
| 105 | { "2315", AR5K_VERSION_MAC, AR5K_SREV_AR2315_R7 }, |
| 106 | { "2317", AR5K_VERSION_MAC, AR5K_SREV_AR2317_R1 }, |
| 107 | { "2317", AR5K_VERSION_MAC, AR5K_SREV_AR2317_R2 }, |
| 108 | #else |
Nick Kossifidis | 1bef016 | 2008-09-29 02:09:09 +0300 | [diff] [blame] | 109 | { "5210", AR5K_VERSION_MAC, AR5K_SREV_AR5210 }, |
| 110 | { "5311", AR5K_VERSION_MAC, AR5K_SREV_AR5311 }, |
| 111 | { "5311A", AR5K_VERSION_MAC, AR5K_SREV_AR5311A }, |
| 112 | { "5311B", AR5K_VERSION_MAC, AR5K_SREV_AR5311B }, |
| 113 | { "5211", AR5K_VERSION_MAC, AR5K_SREV_AR5211 }, |
| 114 | { "5212", AR5K_VERSION_MAC, AR5K_SREV_AR5212 }, |
| 115 | { "5213", AR5K_VERSION_MAC, AR5K_SREV_AR5213 }, |
| 116 | { "5213A", AR5K_VERSION_MAC, AR5K_SREV_AR5213A }, |
| 117 | { "2413", AR5K_VERSION_MAC, AR5K_SREV_AR2413 }, |
| 118 | { "2414", AR5K_VERSION_MAC, AR5K_SREV_AR2414 }, |
| 119 | { "5424", AR5K_VERSION_MAC, AR5K_SREV_AR5424 }, |
| 120 | { "5413", AR5K_VERSION_MAC, AR5K_SREV_AR5413 }, |
| 121 | { "5414", AR5K_VERSION_MAC, AR5K_SREV_AR5414 }, |
| 122 | { "2415", AR5K_VERSION_MAC, AR5K_SREV_AR2415 }, |
| 123 | { "5416", AR5K_VERSION_MAC, AR5K_SREV_AR5416 }, |
| 124 | { "5418", AR5K_VERSION_MAC, AR5K_SREV_AR5418 }, |
| 125 | { "2425", AR5K_VERSION_MAC, AR5K_SREV_AR2425 }, |
| 126 | { "2417", AR5K_VERSION_MAC, AR5K_SREV_AR2417 }, |
Felix Fietkau | a0b907e | 2010-12-02 10:27:16 +0100 | [diff] [blame] | 127 | #endif |
Nick Kossifidis | 1bef016 | 2008-09-29 02:09:09 +0300 | [diff] [blame] | 128 | { "xxxxx", AR5K_VERSION_MAC, AR5K_SREV_UNKNOWN }, |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 129 | { "5110", AR5K_VERSION_RAD, AR5K_SREV_RAD_5110 }, |
| 130 | { "5111", AR5K_VERSION_RAD, AR5K_SREV_RAD_5111 }, |
Nick Kossifidis | 1bef016 | 2008-09-29 02:09:09 +0300 | [diff] [blame] | 131 | { "5111A", AR5K_VERSION_RAD, AR5K_SREV_RAD_5111A }, |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 132 | { "2111", AR5K_VERSION_RAD, AR5K_SREV_RAD_2111 }, |
| 133 | { "5112", AR5K_VERSION_RAD, AR5K_SREV_RAD_5112 }, |
| 134 | { "5112A", AR5K_VERSION_RAD, AR5K_SREV_RAD_5112A }, |
Nick Kossifidis | 1bef016 | 2008-09-29 02:09:09 +0300 | [diff] [blame] | 135 | { "5112B", AR5K_VERSION_RAD, AR5K_SREV_RAD_5112B }, |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 136 | { "2112", AR5K_VERSION_RAD, AR5K_SREV_RAD_2112 }, |
| 137 | { "2112A", AR5K_VERSION_RAD, AR5K_SREV_RAD_2112A }, |
Nick Kossifidis | 1bef016 | 2008-09-29 02:09:09 +0300 | [diff] [blame] | 138 | { "2112B", AR5K_VERSION_RAD, AR5K_SREV_RAD_2112B }, |
| 139 | { "2413", AR5K_VERSION_RAD, AR5K_SREV_RAD_2413 }, |
| 140 | { "5413", AR5K_VERSION_RAD, AR5K_SREV_RAD_5413 }, |
Nick Kossifidis | 1bef016 | 2008-09-29 02:09:09 +0300 | [diff] [blame] | 141 | { "5424", AR5K_VERSION_RAD, AR5K_SREV_RAD_5424 }, |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 142 | { "5133", AR5K_VERSION_RAD, AR5K_SREV_RAD_5133 }, |
Felix Fietkau | a0b907e | 2010-12-02 10:27:16 +0100 | [diff] [blame] | 143 | #ifdef CONFIG_ATHEROS_AR231X |
| 144 | { "2316", AR5K_VERSION_RAD, AR5K_SREV_RAD_2316 }, |
| 145 | { "2317", AR5K_VERSION_RAD, AR5K_SREV_RAD_2317 }, |
| 146 | #endif |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 147 | { "xxxxx", AR5K_VERSION_RAD, AR5K_SREV_UNKNOWN }, |
| 148 | }; |
| 149 | |
Jiri Slaby | 2c91108c | 2009-03-07 10:26:41 +0100 | [diff] [blame] | 150 | static const struct ieee80211_rate ath5k_rates[] = { |
Bruno Randolf | 63266a6 | 2008-07-30 17:12:58 +0200 | [diff] [blame] | 151 | { .bitrate = 10, |
| 152 | .hw_value = ATH5K_RATE_CODE_1M, }, |
| 153 | { .bitrate = 20, |
| 154 | .hw_value = ATH5K_RATE_CODE_2M, |
| 155 | .hw_value_short = ATH5K_RATE_CODE_2M | AR5K_SET_SHORT_PREAMBLE, |
| 156 | .flags = IEEE80211_RATE_SHORT_PREAMBLE }, |
| 157 | { .bitrate = 55, |
| 158 | .hw_value = ATH5K_RATE_CODE_5_5M, |
| 159 | .hw_value_short = ATH5K_RATE_CODE_5_5M | AR5K_SET_SHORT_PREAMBLE, |
| 160 | .flags = IEEE80211_RATE_SHORT_PREAMBLE }, |
| 161 | { .bitrate = 110, |
| 162 | .hw_value = ATH5K_RATE_CODE_11M, |
| 163 | .hw_value_short = ATH5K_RATE_CODE_11M | AR5K_SET_SHORT_PREAMBLE, |
| 164 | .flags = IEEE80211_RATE_SHORT_PREAMBLE }, |
| 165 | { .bitrate = 60, |
| 166 | .hw_value = ATH5K_RATE_CODE_6M, |
| 167 | .flags = 0 }, |
| 168 | { .bitrate = 90, |
| 169 | .hw_value = ATH5K_RATE_CODE_9M, |
| 170 | .flags = 0 }, |
| 171 | { .bitrate = 120, |
| 172 | .hw_value = ATH5K_RATE_CODE_12M, |
| 173 | .flags = 0 }, |
| 174 | { .bitrate = 180, |
| 175 | .hw_value = ATH5K_RATE_CODE_18M, |
| 176 | .flags = 0 }, |
| 177 | { .bitrate = 240, |
| 178 | .hw_value = ATH5K_RATE_CODE_24M, |
| 179 | .flags = 0 }, |
| 180 | { .bitrate = 360, |
| 181 | .hw_value = ATH5K_RATE_CODE_36M, |
| 182 | .flags = 0 }, |
| 183 | { .bitrate = 480, |
| 184 | .hw_value = ATH5K_RATE_CODE_48M, |
| 185 | .flags = 0 }, |
| 186 | { .bitrate = 540, |
| 187 | .hw_value = ATH5K_RATE_CODE_54M, |
| 188 | .flags = 0 }, |
Bruno Randolf | 63266a6 | 2008-07-30 17:12:58 +0200 | [diff] [blame] | 189 | }; |
| 190 | |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 191 | static inline u64 ath5k_extend_tsf(struct ath5k_hw *ah, u32 rstamp) |
| 192 | { |
| 193 | u64 tsf = ath5k_hw_get_tsf64(ah); |
| 194 | |
| 195 | if ((tsf & 0x7fff) < rstamp) |
| 196 | tsf -= 0x8000; |
| 197 | |
| 198 | return (tsf & ~0x7fff) | rstamp; |
| 199 | } |
| 200 | |
Felix Fietkau | e5b046d | 2010-12-02 10:27:01 +0100 | [diff] [blame] | 201 | const char * |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 202 | ath5k_chip_name(enum ath5k_srev_type type, u_int16_t val) |
| 203 | { |
| 204 | const char *name = "xxxxx"; |
| 205 | unsigned int i; |
| 206 | |
| 207 | for (i = 0; i < ARRAY_SIZE(srev_names); i++) { |
| 208 | if (srev_names[i].sr_type != type) |
| 209 | continue; |
Nick Kossifidis | 75d0edb | 2008-09-29 01:24:44 +0300 | [diff] [blame] | 210 | |
| 211 | if ((val & 0xf0) == srev_names[i].sr_val) |
| 212 | name = srev_names[i].sr_name; |
| 213 | |
| 214 | if ((val & 0xff) == srev_names[i].sr_val) { |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 215 | name = srev_names[i].sr_name; |
| 216 | break; |
| 217 | } |
| 218 | } |
| 219 | |
| 220 | return name; |
| 221 | } |
Luis R. Rodriguez | e5aa847 | 2009-09-10 16:55:11 -0700 | [diff] [blame] | 222 | static unsigned int ath5k_ioread32(void *hw_priv, u32 reg_offset) |
| 223 | { |
| 224 | struct ath5k_hw *ah = (struct ath5k_hw *) hw_priv; |
| 225 | return ath5k_hw_reg_read(ah, reg_offset); |
| 226 | } |
| 227 | |
| 228 | static void ath5k_iowrite32(void *hw_priv, u32 val, u32 reg_offset) |
| 229 | { |
| 230 | struct ath5k_hw *ah = (struct ath5k_hw *) hw_priv; |
| 231 | ath5k_hw_reg_write(ah, val, reg_offset); |
| 232 | } |
| 233 | |
| 234 | static const struct ath_ops ath5k_common_ops = { |
| 235 | .read = ath5k_ioread32, |
| 236 | .write = ath5k_iowrite32, |
| 237 | }; |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 238 | |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 239 | /***********************\ |
| 240 | * Driver Initialization * |
| 241 | \***********************/ |
| 242 | |
Bob Copeland | f769c36 | 2009-03-30 22:30:31 -0400 | [diff] [blame] | 243 | static int ath5k_reg_notifier(struct wiphy *wiphy, struct regulatory_request *request) |
| 244 | { |
| 245 | struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy); |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 246 | struct ath5k_hw *ah = hw->priv; |
| 247 | struct ath_regulatory *regulatory = ath5k_hw_regulatory(ah); |
Bob Copeland | f769c36 | 2009-03-30 22:30:31 -0400 | [diff] [blame] | 248 | |
Luis R. Rodriguez | 608b88c | 2009-08-17 18:07:23 -0700 | [diff] [blame] | 249 | return ath_reg_notifier_apply(wiphy, request, regulatory); |
Bob Copeland | f769c36 | 2009-03-30 22:30:31 -0400 | [diff] [blame] | 250 | } |
| 251 | |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 252 | /********************\ |
| 253 | * Channel/mode setup * |
| 254 | \********************/ |
| 255 | |
| 256 | /* |
Luis R. Rodriguez | 2f8684c | 2012-07-06 15:21:51 -0700 | [diff] [blame] | 257 | * Returns true for the channel numbers used. |
Bob Copeland | 42639fc | 2009-03-30 08:05:29 -0400 | [diff] [blame] | 258 | */ |
Luis R. Rodriguez | 2f8684c | 2012-07-06 15:21:51 -0700 | [diff] [blame] | 259 | #ifdef CONFIG_ATH5K_TEST_CHANNELS |
| 260 | static bool ath5k_is_standard_channel(short chan, enum ieee80211_band band) |
| 261 | { |
| 262 | return true; |
| 263 | } |
| 264 | |
| 265 | #else |
Bruno Randolf | 410e612 | 2011-01-19 18:20:57 +0900 | [diff] [blame] | 266 | static bool ath5k_is_standard_channel(short chan, enum ieee80211_band band) |
Bob Copeland | 42639fc | 2009-03-30 08:05:29 -0400 | [diff] [blame] | 267 | { |
Bruno Randolf | 410e612 | 2011-01-19 18:20:57 +0900 | [diff] [blame] | 268 | if (band == IEEE80211_BAND_2GHZ && chan <= 14) |
| 269 | return true; |
| 270 | |
| 271 | return /* UNII 1,2 */ |
| 272 | (((chan & 3) == 0 && chan >= 36 && chan <= 64) || |
Bob Copeland | 42639fc | 2009-03-30 08:05:29 -0400 | [diff] [blame] | 273 | /* midband */ |
| 274 | ((chan & 3) == 0 && chan >= 100 && chan <= 140) || |
| 275 | /* UNII-3 */ |
Bruno Randolf | 410e612 | 2011-01-19 18:20:57 +0900 | [diff] [blame] | 276 | ((chan & 3) == 1 && chan >= 149 && chan <= 165) || |
| 277 | /* 802.11j 5.030-5.080 GHz (20MHz) */ |
| 278 | (chan == 8 || chan == 12 || chan == 16) || |
| 279 | /* 802.11j 4.9GHz (20MHz) */ |
| 280 | (chan == 184 || chan == 188 || chan == 192 || chan == 196)); |
Bob Copeland | 42639fc | 2009-03-30 08:05:29 -0400 | [diff] [blame] | 281 | } |
Luis R. Rodriguez | 2f8684c | 2012-07-06 15:21:51 -0700 | [diff] [blame] | 282 | #endif |
Bob Copeland | 42639fc | 2009-03-30 08:05:29 -0400 | [diff] [blame] | 283 | |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 284 | static unsigned int |
Bruno Randolf | 97d9c3a | 2011-01-19 18:20:52 +0900 | [diff] [blame] | 285 | ath5k_setup_channels(struct ath5k_hw *ah, struct ieee80211_channel *channels, |
| 286 | unsigned int mode, unsigned int max) |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 287 | { |
Pavel Roskin | 32c2546 | 2011-07-23 09:29:09 -0400 | [diff] [blame] | 288 | unsigned int count, size, freq, ch; |
Bruno Randolf | 90c02d7 | 2011-01-19 18:20:36 +0900 | [diff] [blame] | 289 | enum ieee80211_band band; |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 290 | |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 291 | switch (mode) { |
Luis R. Rodriguez | d8ee398 | 2008-02-03 21:51:04 -0500 | [diff] [blame] | 292 | case AR5K_MODE_11A: |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 293 | /* 1..220, but 2GHz frequencies are filtered by check_channel */ |
Bruno Randolf | 97d9c3a | 2011-01-19 18:20:52 +0900 | [diff] [blame] | 294 | size = 220; |
Bruno Randolf | 90c02d7 | 2011-01-19 18:20:36 +0900 | [diff] [blame] | 295 | band = IEEE80211_BAND_5GHZ; |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 296 | break; |
Luis R. Rodriguez | d8ee398 | 2008-02-03 21:51:04 -0500 | [diff] [blame] | 297 | case AR5K_MODE_11B: |
| 298 | case AR5K_MODE_11G: |
Luis R. Rodriguez | d8ee398 | 2008-02-03 21:51:04 -0500 | [diff] [blame] | 299 | size = 26; |
Bruno Randolf | 90c02d7 | 2011-01-19 18:20:36 +0900 | [diff] [blame] | 300 | band = IEEE80211_BAND_2GHZ; |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 301 | break; |
| 302 | default: |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 303 | ATH5K_WARN(ah, "bad mode, not copying channels\n"); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 304 | return 0; |
| 305 | } |
| 306 | |
Bruno Randolf | 2b1351a | 2011-01-21 12:19:52 +0900 | [diff] [blame] | 307 | count = 0; |
| 308 | for (ch = 1; ch <= size && count < max; ch++) { |
Bruno Randolf | 90c02d7 | 2011-01-19 18:20:36 +0900 | [diff] [blame] | 309 | freq = ieee80211_channel_to_frequency(ch, band); |
| 310 | |
| 311 | if (freq == 0) /* mapping failed - not a standard channel */ |
| 312 | continue; |
Luis R. Rodriguez | d8ee398 | 2008-02-03 21:51:04 -0500 | [diff] [blame] | 313 | |
Pavel Roskin | 32c2546 | 2011-07-23 09:29:09 -0400 | [diff] [blame] | 314 | /* Write channel info, needed for ath5k_channel_ok() */ |
| 315 | channels[count].center_freq = freq; |
| 316 | channels[count].band = band; |
| 317 | channels[count].hw_value = mode; |
| 318 | |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 319 | /* Check if channel is supported by the chipset */ |
Pavel Roskin | 32c2546 | 2011-07-23 09:29:09 -0400 | [diff] [blame] | 320 | if (!ath5k_channel_ok(ah, &channels[count])) |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 321 | continue; |
| 322 | |
Luis R. Rodriguez | 2f8684c | 2012-07-06 15:21:51 -0700 | [diff] [blame] | 323 | if (!ath5k_is_standard_channel(ch, band)) |
Bob Copeland | 42639fc | 2009-03-30 08:05:29 -0400 | [diff] [blame] | 324 | continue; |
| 325 | |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 326 | count++; |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 327 | } |
| 328 | |
| 329 | return count; |
| 330 | } |
| 331 | |
Bruno Randolf | 63266a6 | 2008-07-30 17:12:58 +0200 | [diff] [blame] | 332 | static void |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 333 | ath5k_setup_rate_idx(struct ath5k_hw *ah, struct ieee80211_supported_band *b) |
Bruno Randolf | 63266a6 | 2008-07-30 17:12:58 +0200 | [diff] [blame] | 334 | { |
| 335 | u8 i; |
| 336 | |
| 337 | for (i = 0; i < AR5K_MAX_RATES; i++) |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 338 | ah->rate_idx[b->band][i] = -1; |
Bruno Randolf | 63266a6 | 2008-07-30 17:12:58 +0200 | [diff] [blame] | 339 | |
| 340 | for (i = 0; i < b->n_bitrates; i++) { |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 341 | ah->rate_idx[b->band][b->bitrates[i].hw_value] = i; |
Bruno Randolf | 63266a6 | 2008-07-30 17:12:58 +0200 | [diff] [blame] | 342 | if (b->bitrates[i].hw_value_short) |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 343 | ah->rate_idx[b->band][b->bitrates[i].hw_value_short] = i; |
Bruno Randolf | 63266a6 | 2008-07-30 17:12:58 +0200 | [diff] [blame] | 344 | } |
| 345 | } |
| 346 | |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 347 | static int |
Bruno Randolf | 63266a6 | 2008-07-30 17:12:58 +0200 | [diff] [blame] | 348 | ath5k_setup_bands(struct ieee80211_hw *hw) |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 349 | { |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 350 | struct ath5k_hw *ah = hw->priv; |
Bruno Randolf | 63266a6 | 2008-07-30 17:12:58 +0200 | [diff] [blame] | 351 | struct ieee80211_supported_band *sband; |
| 352 | int max_c, count_c = 0; |
| 353 | int i; |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 354 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 355 | BUILD_BUG_ON(ARRAY_SIZE(ah->sbands) < IEEE80211_NUM_BANDS); |
| 356 | max_c = ARRAY_SIZE(ah->channels); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 357 | |
Luis R. Rodriguez | d8ee398 | 2008-02-03 21:51:04 -0500 | [diff] [blame] | 358 | /* 2GHz band */ |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 359 | sband = &ah->sbands[IEEE80211_BAND_2GHZ]; |
Bruno Randolf | 63266a6 | 2008-07-30 17:12:58 +0200 | [diff] [blame] | 360 | sband->band = IEEE80211_BAND_2GHZ; |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 361 | sband->bitrates = &ah->rates[IEEE80211_BAND_2GHZ][0]; |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 362 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 363 | if (test_bit(AR5K_MODE_11G, ah->ah_capabilities.cap_mode)) { |
Bruno Randolf | 63266a6 | 2008-07-30 17:12:58 +0200 | [diff] [blame] | 364 | /* G mode */ |
| 365 | memcpy(sband->bitrates, &ath5k_rates[0], |
| 366 | sizeof(struct ieee80211_rate) * 12); |
| 367 | sband->n_bitrates = 12; |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 368 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 369 | sband->channels = ah->channels; |
Bruno Randolf | 0810569 | 2011-01-19 18:20:47 +0900 | [diff] [blame] | 370 | sband->n_channels = ath5k_setup_channels(ah, sband->channels, |
Bruno Randolf | 63266a6 | 2008-07-30 17:12:58 +0200 | [diff] [blame] | 371 | AR5K_MODE_11G, max_c); |
Luis R. Rodriguez | d8ee398 | 2008-02-03 21:51:04 -0500 | [diff] [blame] | 372 | |
| 373 | hw->wiphy->bands[IEEE80211_BAND_2GHZ] = sband; |
Bruno Randolf | 63266a6 | 2008-07-30 17:12:58 +0200 | [diff] [blame] | 374 | count_c = sband->n_channels; |
Luis R. Rodriguez | d8ee398 | 2008-02-03 21:51:04 -0500 | [diff] [blame] | 375 | max_c -= count_c; |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 376 | } else if (test_bit(AR5K_MODE_11B, ah->ah_capabilities.cap_mode)) { |
Bruno Randolf | 63266a6 | 2008-07-30 17:12:58 +0200 | [diff] [blame] | 377 | /* B mode */ |
| 378 | memcpy(sband->bitrates, &ath5k_rates[0], |
| 379 | sizeof(struct ieee80211_rate) * 4); |
| 380 | sband->n_bitrates = 4; |
Luis R. Rodriguez | d8ee398 | 2008-02-03 21:51:04 -0500 | [diff] [blame] | 381 | |
Bruno Randolf | 63266a6 | 2008-07-30 17:12:58 +0200 | [diff] [blame] | 382 | /* 5211 only supports B rates and uses 4bit rate codes |
| 383 | * (e.g normally we have 0x1B for 1M, but on 5211 we have 0x0B) |
| 384 | * fix them up here: |
| 385 | */ |
| 386 | if (ah->ah_version == AR5K_AR5211) { |
| 387 | for (i = 0; i < 4; i++) { |
| 388 | sband->bitrates[i].hw_value = |
| 389 | sband->bitrates[i].hw_value & 0xF; |
| 390 | sband->bitrates[i].hw_value_short = |
| 391 | sband->bitrates[i].hw_value_short & 0xF; |
| 392 | } |
| 393 | } |
| 394 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 395 | sband->channels = ah->channels; |
Bruno Randolf | 0810569 | 2011-01-19 18:20:47 +0900 | [diff] [blame] | 396 | sband->n_channels = ath5k_setup_channels(ah, sband->channels, |
Bruno Randolf | 63266a6 | 2008-07-30 17:12:58 +0200 | [diff] [blame] | 397 | AR5K_MODE_11B, max_c); |
| 398 | |
| 399 | hw->wiphy->bands[IEEE80211_BAND_2GHZ] = sband; |
| 400 | count_c = sband->n_channels; |
| 401 | max_c -= count_c; |
Luis R. Rodriguez | d8ee398 | 2008-02-03 21:51:04 -0500 | [diff] [blame] | 402 | } |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 403 | ath5k_setup_rate_idx(ah, sband); |
Luis R. Rodriguez | d8ee398 | 2008-02-03 21:51:04 -0500 | [diff] [blame] | 404 | |
Bruno Randolf | 63266a6 | 2008-07-30 17:12:58 +0200 | [diff] [blame] | 405 | /* 5GHz band, A mode */ |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 406 | if (test_bit(AR5K_MODE_11A, ah->ah_capabilities.cap_mode)) { |
| 407 | sband = &ah->sbands[IEEE80211_BAND_5GHZ]; |
Luis R. Rodriguez | d8ee398 | 2008-02-03 21:51:04 -0500 | [diff] [blame] | 408 | sband->band = IEEE80211_BAND_5GHZ; |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 409 | sband->bitrates = &ah->rates[IEEE80211_BAND_5GHZ][0]; |
Bruno Randolf | 63266a6 | 2008-07-30 17:12:58 +0200 | [diff] [blame] | 410 | |
| 411 | memcpy(sband->bitrates, &ath5k_rates[4], |
| 412 | sizeof(struct ieee80211_rate) * 8); |
| 413 | sband->n_bitrates = 8; |
| 414 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 415 | sband->channels = &ah->channels[count_c]; |
Bruno Randolf | 0810569 | 2011-01-19 18:20:47 +0900 | [diff] [blame] | 416 | sband->n_channels = ath5k_setup_channels(ah, sband->channels, |
Luis R. Rodriguez | d8ee398 | 2008-02-03 21:51:04 -0500 | [diff] [blame] | 417 | AR5K_MODE_11A, max_c); |
| 418 | |
Luis R. Rodriguez | d8ee398 | 2008-02-03 21:51:04 -0500 | [diff] [blame] | 419 | hw->wiphy->bands[IEEE80211_BAND_5GHZ] = sband; |
| 420 | } |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 421 | ath5k_setup_rate_idx(ah, sband); |
Luis R. Rodriguez | d8ee398 | 2008-02-03 21:51:04 -0500 | [diff] [blame] | 422 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 423 | ath5k_debug_dump_bands(ah); |
Luis R. Rodriguez | d8ee398 | 2008-02-03 21:51:04 -0500 | [diff] [blame] | 424 | |
| 425 | return 0; |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 426 | } |
| 427 | |
| 428 | /* |
Joerg Albert | e30eb4a | 2009-08-05 01:52:07 +0200 | [diff] [blame] | 429 | * Set/change channels. We always reset the chip. |
| 430 | * To accomplish this we must first cleanup any pending DMA, |
| 431 | * then restart stuff after a la ath5k_init. |
Bob Copeland | be00937 | 2009-01-22 08:44:16 -0500 | [diff] [blame] | 432 | * |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 433 | * Called with ah->lock. |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 434 | */ |
Bruno Randolf | cd2c548 | 2010-12-22 19:20:32 +0900 | [diff] [blame] | 435 | int |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 436 | ath5k_chan_set(struct ath5k_hw *ah, struct ieee80211_channel *chan) |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 437 | { |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 438 | ATH5K_DBG(ah, ATH5K_DEBUG_RESET, |
Bruno Randolf | 8d67a03 | 2010-06-16 19:11:12 +0900 | [diff] [blame] | 439 | "channel set, resetting (%u -> %u MHz)\n", |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 440 | ah->curchan->center_freq, chan->center_freq); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 441 | |
Joerg Albert | e30eb4a | 2009-08-05 01:52:07 +0200 | [diff] [blame] | 442 | /* |
| 443 | * To switch channels clear any pending DMA operations; |
| 444 | * wait long enough for the RX fifo to drain, reset the |
| 445 | * hardware at the new frequency, and then re-enable |
| 446 | * the relevant bits of the h/w. |
| 447 | */ |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 448 | return ath5k_reset(ah, chan, true); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 449 | } |
| 450 | |
Ben Greear | e4b0b32 | 2011-03-03 14:39:05 -0800 | [diff] [blame] | 451 | void ath5k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif) |
Ben Greear | b1ae1ed | 2010-09-30 12:22:58 -0700 | [diff] [blame] | 452 | { |
Ben Greear | e4b0b32 | 2011-03-03 14:39:05 -0800 | [diff] [blame] | 453 | struct ath5k_vif_iter_data *iter_data = data; |
Ben Greear | b1ae1ed | 2010-09-30 12:22:58 -0700 | [diff] [blame] | 454 | int i; |
Ben Greear | 62c58fb | 2010-10-08 12:01:15 -0700 | [diff] [blame] | 455 | struct ath5k_vif *avf = (void *)vif->drv_priv; |
Ben Greear | b1ae1ed | 2010-09-30 12:22:58 -0700 | [diff] [blame] | 456 | |
| 457 | if (iter_data->hw_macaddr) |
| 458 | for (i = 0; i < ETH_ALEN; i++) |
| 459 | iter_data->mask[i] &= |
| 460 | ~(iter_data->hw_macaddr[i] ^ mac[i]); |
| 461 | |
| 462 | if (!iter_data->found_active) { |
| 463 | iter_data->found_active = true; |
| 464 | memcpy(iter_data->active_mac, mac, ETH_ALEN); |
| 465 | } |
| 466 | |
| 467 | if (iter_data->need_set_hw_addr && iter_data->hw_macaddr) |
Joe Perches | 2e42e47 | 2012-05-09 17:17:46 +0000 | [diff] [blame] | 468 | if (ether_addr_equal(iter_data->hw_macaddr, mac)) |
Ben Greear | b1ae1ed | 2010-09-30 12:22:58 -0700 | [diff] [blame] | 469 | iter_data->need_set_hw_addr = false; |
| 470 | |
| 471 | if (!iter_data->any_assoc) { |
Ben Greear | b1ae1ed | 2010-09-30 12:22:58 -0700 | [diff] [blame] | 472 | if (avf->assoc) |
| 473 | iter_data->any_assoc = true; |
| 474 | } |
Ben Greear | 62c58fb | 2010-10-08 12:01:15 -0700 | [diff] [blame] | 475 | |
| 476 | /* Calculate combined mode - when APs are active, operate in AP mode. |
| 477 | * Otherwise use the mode of the new interface. This can currently |
| 478 | * only deal with combinations of APs and STAs. Only one ad-hoc |
Ben Greear | 7afbb2f | 2010-11-10 11:43:51 -0800 | [diff] [blame] | 479 | * interfaces is allowed. |
Ben Greear | 62c58fb | 2010-10-08 12:01:15 -0700 | [diff] [blame] | 480 | */ |
| 481 | if (avf->opmode == NL80211_IFTYPE_AP) |
| 482 | iter_data->opmode = NL80211_IFTYPE_AP; |
Ben Greear | e4b0b32 | 2011-03-03 14:39:05 -0800 | [diff] [blame] | 483 | else { |
| 484 | if (avf->opmode == NL80211_IFTYPE_STATION) |
| 485 | iter_data->n_stas++; |
Ben Greear | 62c58fb | 2010-10-08 12:01:15 -0700 | [diff] [blame] | 486 | if (iter_data->opmode == NL80211_IFTYPE_UNSPECIFIED) |
| 487 | iter_data->opmode = avf->opmode; |
Ben Greear | e4b0b32 | 2011-03-03 14:39:05 -0800 | [diff] [blame] | 488 | } |
Ben Greear | b1ae1ed | 2010-09-30 12:22:58 -0700 | [diff] [blame] | 489 | } |
| 490 | |
Bruno Randolf | cd2c548 | 2010-12-22 19:20:32 +0900 | [diff] [blame] | 491 | void |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 492 | ath5k_update_bssid_mask_and_opmode(struct ath5k_hw *ah, |
Bruno Randolf | cd2c548 | 2010-12-22 19:20:32 +0900 | [diff] [blame] | 493 | struct ieee80211_vif *vif) |
Ben Greear | b1ae1ed | 2010-09-30 12:22:58 -0700 | [diff] [blame] | 494 | { |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 495 | struct ath_common *common = ath5k_hw_common(ah); |
Ben Greear | e4b0b32 | 2011-03-03 14:39:05 -0800 | [diff] [blame] | 496 | struct ath5k_vif_iter_data iter_data; |
| 497 | u32 rfilt; |
Ben Greear | b1ae1ed | 2010-09-30 12:22:58 -0700 | [diff] [blame] | 498 | |
| 499 | /* |
| 500 | * Use the hardware MAC address as reference, the hardware uses it |
| 501 | * together with the BSSID mask when matching addresses. |
| 502 | */ |
| 503 | iter_data.hw_macaddr = common->macaddr; |
| 504 | memset(&iter_data.mask, 0xff, ETH_ALEN); |
| 505 | iter_data.found_active = false; |
| 506 | iter_data.need_set_hw_addr = true; |
Ben Greear | 62c58fb | 2010-10-08 12:01:15 -0700 | [diff] [blame] | 507 | iter_data.opmode = NL80211_IFTYPE_UNSPECIFIED; |
Ben Greear | e4b0b32 | 2011-03-03 14:39:05 -0800 | [diff] [blame] | 508 | iter_data.n_stas = 0; |
Ben Greear | b1ae1ed | 2010-09-30 12:22:58 -0700 | [diff] [blame] | 509 | |
| 510 | if (vif) |
Ben Greear | e4b0b32 | 2011-03-03 14:39:05 -0800 | [diff] [blame] | 511 | ath5k_vif_iter(&iter_data, vif->addr, vif); |
Ben Greear | b1ae1ed | 2010-09-30 12:22:58 -0700 | [diff] [blame] | 512 | |
| 513 | /* Get list of all active MAC addresses */ |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 514 | ieee80211_iterate_active_interfaces_atomic(ah->hw, ath5k_vif_iter, |
Ben Greear | b1ae1ed | 2010-09-30 12:22:58 -0700 | [diff] [blame] | 515 | &iter_data); |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 516 | memcpy(ah->bssidmask, iter_data.mask, ETH_ALEN); |
Ben Greear | b1ae1ed | 2010-09-30 12:22:58 -0700 | [diff] [blame] | 517 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 518 | ah->opmode = iter_data.opmode; |
| 519 | if (ah->opmode == NL80211_IFTYPE_UNSPECIFIED) |
Ben Greear | 62c58fb | 2010-10-08 12:01:15 -0700 | [diff] [blame] | 520 | /* Nothing active, default to station mode */ |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 521 | ah->opmode = NL80211_IFTYPE_STATION; |
Ben Greear | 62c58fb | 2010-10-08 12:01:15 -0700 | [diff] [blame] | 522 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 523 | ath5k_hw_set_opmode(ah, ah->opmode); |
| 524 | ATH5K_DBG(ah, ATH5K_DEBUG_MODE, "mode setup opmode %d (%s)\n", |
| 525 | ah->opmode, ath_opmode_to_string(ah->opmode)); |
Ben Greear | 62c58fb | 2010-10-08 12:01:15 -0700 | [diff] [blame] | 526 | |
Ben Greear | b1ae1ed | 2010-09-30 12:22:58 -0700 | [diff] [blame] | 527 | if (iter_data.need_set_hw_addr && iter_data.found_active) |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 528 | ath5k_hw_set_lladdr(ah, iter_data.active_mac); |
Ben Greear | b1ae1ed | 2010-09-30 12:22:58 -0700 | [diff] [blame] | 529 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 530 | if (ath5k_hw_hasbssidmask(ah)) |
| 531 | ath5k_hw_set_bssid_mask(ah, ah->bssidmask); |
Ben Greear | b1ae1ed | 2010-09-30 12:22:58 -0700 | [diff] [blame] | 532 | |
Ben Greear | e4b0b32 | 2011-03-03 14:39:05 -0800 | [diff] [blame] | 533 | /* Set up RX Filter */ |
| 534 | if (iter_data.n_stas > 1) { |
| 535 | /* If you have multiple STA interfaces connected to |
| 536 | * different APs, ARPs are not received (most of the time?) |
Pavel Roskin | 6a2a0e7 | 2011-07-09 00:17:51 -0400 | [diff] [blame] | 537 | * Enabling PROMISC appears to fix that problem. |
Ben Greear | e4b0b32 | 2011-03-03 14:39:05 -0800 | [diff] [blame] | 538 | */ |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 539 | ah->filter_flags |= AR5K_RX_FILTER_PROM; |
Ben Greear | e4b0b32 | 2011-03-03 14:39:05 -0800 | [diff] [blame] | 540 | } |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 541 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 542 | rfilt = ah->filter_flags; |
| 543 | ath5k_hw_set_rx_filter(ah, rfilt); |
| 544 | ATH5K_DBG(ah, ATH5K_DEBUG_MODE, "RX filter 0x%x\n", rfilt); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 545 | } |
| 546 | |
Luis R. Rodriguez | d8ee398 | 2008-02-03 21:51:04 -0500 | [diff] [blame] | 547 | static inline int |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 548 | ath5k_hw_to_driver_rix(struct ath5k_hw *ah, int hw_rix) |
Bruno Randolf | 63266a6 | 2008-07-30 17:12:58 +0200 | [diff] [blame] | 549 | { |
Bob Copeland | b726604 | 2009-03-02 21:55:18 -0500 | [diff] [blame] | 550 | int rix; |
| 551 | |
| 552 | /* return base rate on errors */ |
| 553 | if (WARN(hw_rix < 0 || hw_rix >= AR5K_MAX_RATES, |
| 554 | "hw_rix out of bounds: %x\n", hw_rix)) |
| 555 | return 0; |
| 556 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 557 | rix = ah->rate_idx[ah->curchan->band][hw_rix]; |
Bob Copeland | b726604 | 2009-03-02 21:55:18 -0500 | [diff] [blame] | 558 | if (WARN(rix < 0, "invalid hw_rix: %x\n", hw_rix)) |
| 559 | rix = 0; |
| 560 | |
| 561 | return rix; |
Luis R. Rodriguez | d8ee398 | 2008-02-03 21:51:04 -0500 | [diff] [blame] | 562 | } |
| 563 | |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 564 | /***************\ |
| 565 | * Buffers setup * |
| 566 | \***************/ |
| 567 | |
Bob Copeland | b6ea035 | 2009-01-10 14:42:54 -0500 | [diff] [blame] | 568 | static |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 569 | struct sk_buff *ath5k_rx_skb_alloc(struct ath5k_hw *ah, dma_addr_t *skb_addr) |
Bob Copeland | b6ea035 | 2009-01-10 14:42:54 -0500 | [diff] [blame] | 570 | { |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 571 | struct ath_common *common = ath5k_hw_common(ah); |
Bob Copeland | b6ea035 | 2009-01-10 14:42:54 -0500 | [diff] [blame] | 572 | struct sk_buff *skb; |
Bob Copeland | b6ea035 | 2009-01-10 14:42:54 -0500 | [diff] [blame] | 573 | |
| 574 | /* |
| 575 | * Allocate buffer with headroom_needed space for the |
| 576 | * fake physical layer header at the start. |
| 577 | */ |
Luis R. Rodriguez | db71971 | 2009-09-10 11:20:57 -0700 | [diff] [blame] | 578 | skb = ath_rxbuf_alloc(common, |
Luis R. Rodriguez | dd84978 | 2009-11-04 09:44:50 -0800 | [diff] [blame] | 579 | common->rx_bufsize, |
Luis R. Rodriguez | aeb63cf | 2009-08-12 09:57:00 -0700 | [diff] [blame] | 580 | GFP_ATOMIC); |
Bob Copeland | b6ea035 | 2009-01-10 14:42:54 -0500 | [diff] [blame] | 581 | |
| 582 | if (!skb) { |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 583 | ATH5K_ERR(ah, "can't alloc skbuff of size %u\n", |
Luis R. Rodriguez | dd84978 | 2009-11-04 09:44:50 -0800 | [diff] [blame] | 584 | common->rx_bufsize); |
Bob Copeland | b6ea035 | 2009-01-10 14:42:54 -0500 | [diff] [blame] | 585 | return NULL; |
| 586 | } |
Bob Copeland | b6ea035 | 2009-01-10 14:42:54 -0500 | [diff] [blame] | 587 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 588 | *skb_addr = dma_map_single(ah->dev, |
Luis R. Rodriguez | cc861f7 | 2009-11-04 09:11:34 -0800 | [diff] [blame] | 589 | skb->data, common->rx_bufsize, |
Felix Fietkau | aeae4ac | 2010-12-02 10:26:51 +0100 | [diff] [blame] | 590 | DMA_FROM_DEVICE); |
| 591 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 592 | if (unlikely(dma_mapping_error(ah->dev, *skb_addr))) { |
| 593 | ATH5K_ERR(ah, "%s: DMA mapping failed\n", __func__); |
Bob Copeland | b6ea035 | 2009-01-10 14:42:54 -0500 | [diff] [blame] | 594 | dev_kfree_skb(skb); |
| 595 | return NULL; |
| 596 | } |
| 597 | return skb; |
| 598 | } |
| 599 | |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 600 | static int |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 601 | ath5k_rxbuf_setup(struct ath5k_hw *ah, struct ath5k_buf *bf) |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 602 | { |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 603 | struct sk_buff *skb = bf->skb; |
| 604 | struct ath5k_desc *ds; |
Bruno Randolf | b5eae9f | 2010-05-19 10:18:16 +0900 | [diff] [blame] | 605 | int ret; |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 606 | |
Bob Copeland | b6ea035 | 2009-01-10 14:42:54 -0500 | [diff] [blame] | 607 | if (!skb) { |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 608 | skb = ath5k_rx_skb_alloc(ah, &bf->skbaddr); |
Bob Copeland | b6ea035 | 2009-01-10 14:42:54 -0500 | [diff] [blame] | 609 | if (!skb) |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 610 | return -ENOMEM; |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 611 | bf->skb = skb; |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 612 | } |
| 613 | |
| 614 | /* |
| 615 | * Setup descriptors. For receive we always terminate |
| 616 | * the descriptor list with a self-linked entry so we'll |
| 617 | * not get overrun under high load (as can happen with a |
| 618 | * 5212 when ANI processing enables PHY error frames). |
| 619 | * |
Bruno Randolf | beade63 | 2010-06-16 19:11:25 +0900 | [diff] [blame] | 620 | * To ensure the last descriptor is self-linked we create |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 621 | * each descriptor as self-linked and add it to the end. As |
| 622 | * each additional descriptor is added the previous self-linked |
Bruno Randolf | beade63 | 2010-06-16 19:11:25 +0900 | [diff] [blame] | 623 | * entry is "fixed" naturally. This should be safe even |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 624 | * if DMA is happening. When processing RX interrupts we |
| 625 | * never remove/process the last, self-linked, entry on the |
Bruno Randolf | beade63 | 2010-06-16 19:11:25 +0900 | [diff] [blame] | 626 | * descriptor list. This ensures the hardware always has |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 627 | * someplace to write a new frame. |
| 628 | */ |
| 629 | ds = bf->desc; |
| 630 | ds->ds_link = bf->daddr; /* link to self */ |
| 631 | ds->ds_data = bf->skbaddr; |
Bruno Randolf | a666819 | 2010-06-16 19:12:01 +0900 | [diff] [blame] | 632 | ret = ath5k_hw_setup_rx_desc(ah, ds, ah->common.rx_bufsize, 0); |
Bruno Randolf | 0452d4a | 2010-06-16 19:11:35 +0900 | [diff] [blame] | 633 | if (ret) { |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 634 | ATH5K_ERR(ah, "%s: could not setup RX desc\n", __func__); |
Bruno Randolf | b5eae9f | 2010-05-19 10:18:16 +0900 | [diff] [blame] | 635 | return ret; |
Bruno Randolf | 0452d4a | 2010-06-16 19:11:35 +0900 | [diff] [blame] | 636 | } |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 637 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 638 | if (ah->rxlink != NULL) |
| 639 | *ah->rxlink = bf->daddr; |
| 640 | ah->rxlink = &ds->ds_link; |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 641 | return 0; |
| 642 | } |
| 643 | |
Bob Copeland | 2ac2927 | 2010-02-09 13:06:54 -0500 | [diff] [blame] | 644 | static enum ath5k_pkt_type get_hw_packet_type(struct sk_buff *skb) |
| 645 | { |
| 646 | struct ieee80211_hdr *hdr; |
| 647 | enum ath5k_pkt_type htype; |
| 648 | __le16 fc; |
| 649 | |
| 650 | hdr = (struct ieee80211_hdr *)skb->data; |
| 651 | fc = hdr->frame_control; |
| 652 | |
| 653 | if (ieee80211_is_beacon(fc)) |
| 654 | htype = AR5K_PKT_TYPE_BEACON; |
| 655 | else if (ieee80211_is_probe_resp(fc)) |
| 656 | htype = AR5K_PKT_TYPE_PROBE_RESP; |
| 657 | else if (ieee80211_is_atim(fc)) |
| 658 | htype = AR5K_PKT_TYPE_ATIM; |
| 659 | else if (ieee80211_is_pspoll(fc)) |
| 660 | htype = AR5K_PKT_TYPE_PSPOLL; |
| 661 | else |
| 662 | htype = AR5K_PKT_TYPE_NORMAL; |
| 663 | |
| 664 | return htype; |
| 665 | } |
| 666 | |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 667 | static int |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 668 | ath5k_txbuf_setup(struct ath5k_hw *ah, struct ath5k_buf *bf, |
Benoit Papillault | 8127fbd | 2010-02-27 23:05:26 +0100 | [diff] [blame] | 669 | struct ath5k_txq *txq, int padsize) |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 670 | { |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 671 | struct ath5k_desc *ds = bf->desc; |
| 672 | struct sk_buff *skb = bf->skb; |
Johannes Berg | a888d52 | 2008-05-26 16:43:39 +0200 | [diff] [blame] | 673 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 674 | unsigned int pktlen, flags, keyidx = AR5K_TXKEYIX_INVALID; |
Felix Fietkau | 2f7fe87 | 2008-10-05 18:05:48 +0200 | [diff] [blame] | 675 | struct ieee80211_rate *rate; |
| 676 | unsigned int mrr_rate[3], mrr_tries[3]; |
| 677 | int i, ret; |
Bob Copeland | 8902ff4 | 2009-01-22 08:44:20 -0500 | [diff] [blame] | 678 | u16 hw_rate; |
Bob Copeland | 07c1e85 | 2009-01-22 08:44:21 -0500 | [diff] [blame] | 679 | u16 cts_rate = 0; |
| 680 | u16 duration = 0; |
Bob Copeland | 8902ff4 | 2009-01-22 08:44:20 -0500 | [diff] [blame] | 681 | u8 rc_flags; |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 682 | |
| 683 | flags = AR5K_TXDESC_INTREQ | AR5K_TXDESC_CLRDMASK; |
Johannes Berg | e039fa4 | 2008-05-15 12:55:29 +0200 | [diff] [blame] | 684 | |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 685 | /* XXX endianness */ |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 686 | bf->skbaddr = dma_map_single(ah->dev, skb->data, skb->len, |
Felix Fietkau | aeae4ac | 2010-12-02 10:26:51 +0100 | [diff] [blame] | 687 | DMA_TO_DEVICE); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 688 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 689 | rate = ieee80211_get_tx_rate(ah->hw, info); |
John W. Linville | d8e1ba7 | 2010-08-24 15:27:34 -0400 | [diff] [blame] | 690 | if (!rate) { |
| 691 | ret = -EINVAL; |
| 692 | goto err_unmap; |
| 693 | } |
Bob Copeland | 8902ff4 | 2009-01-22 08:44:20 -0500 | [diff] [blame] | 694 | |
Johannes Berg | e039fa4 | 2008-05-15 12:55:29 +0200 | [diff] [blame] | 695 | if (info->flags & IEEE80211_TX_CTL_NO_ACK) |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 696 | flags |= AR5K_TXDESC_NOACK; |
| 697 | |
Bob Copeland | 8902ff4 | 2009-01-22 08:44:20 -0500 | [diff] [blame] | 698 | rc_flags = info->control.rates[0].flags; |
| 699 | hw_rate = (rc_flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE) ? |
| 700 | rate->hw_value_short : rate->hw_value; |
| 701 | |
Bruno Randolf | 281c56d | 2008-02-05 18:44:55 +0900 | [diff] [blame] | 702 | pktlen = skb->len; |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 703 | |
Nick Kossifidis | 8f655dd | 2009-03-15 22:20:35 +0200 | [diff] [blame] | 704 | /* FIXME: If we are in g mode and rate is a CCK rate |
| 705 | * subtract ah->ah_txpower.txp_cck_ofdm_pwr_delta |
| 706 | * from tx power (value is in dB units already) */ |
Bob Copeland | 362695e | 2009-02-15 12:06:12 -0500 | [diff] [blame] | 707 | if (info->control.hw_key) { |
| 708 | keyidx = info->control.hw_key->hw_key_idx; |
| 709 | pktlen += info->control.hw_key->icv_len; |
| 710 | } |
Bob Copeland | 07c1e85 | 2009-01-22 08:44:21 -0500 | [diff] [blame] | 711 | if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) { |
| 712 | flags |= AR5K_TXDESC_RTSENA; |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 713 | cts_rate = ieee80211_get_rts_cts_rate(ah->hw, info)->hw_value; |
| 714 | duration = le16_to_cpu(ieee80211_rts_duration(ah->hw, |
Ben Greear | b1ae1ed | 2010-09-30 12:22:58 -0700 | [diff] [blame] | 715 | info->control.vif, pktlen, info)); |
Bob Copeland | 07c1e85 | 2009-01-22 08:44:21 -0500 | [diff] [blame] | 716 | } |
| 717 | if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) { |
| 718 | flags |= AR5K_TXDESC_CTSENA; |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 719 | cts_rate = ieee80211_get_rts_cts_rate(ah->hw, info)->hw_value; |
| 720 | duration = le16_to_cpu(ieee80211_ctstoself_duration(ah->hw, |
Ben Greear | b1ae1ed | 2010-09-30 12:22:58 -0700 | [diff] [blame] | 721 | info->control.vif, pktlen, info)); |
Bob Copeland | 07c1e85 | 2009-01-22 08:44:21 -0500 | [diff] [blame] | 722 | } |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 723 | ret = ah->ah_setup_tx_desc(ah, ds, pktlen, |
Benoit Papillault | 8127fbd | 2010-02-27 23:05:26 +0100 | [diff] [blame] | 724 | ieee80211_get_hdrlen_from_skb(skb), padsize, |
Bob Copeland | 2ac2927 | 2010-02-09 13:06:54 -0500 | [diff] [blame] | 725 | get_hw_packet_type(skb), |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 726 | (ah->power_level * 2), |
Bob Copeland | 8902ff4 | 2009-01-22 08:44:20 -0500 | [diff] [blame] | 727 | hw_rate, |
Nick Kossifidis | 2bed03e | 2009-04-30 15:55:49 -0400 | [diff] [blame] | 728 | info->control.rates[0].count, keyidx, ah->ah_tx_ant, flags, |
Bob Copeland | 07c1e85 | 2009-01-22 08:44:21 -0500 | [diff] [blame] | 729 | cts_rate, duration); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 730 | if (ret) |
| 731 | goto err_unmap; |
| 732 | |
Nick Kossifidis | 86f62d9 | 2011-11-25 20:40:28 +0200 | [diff] [blame] | 733 | /* Set up MRR descriptor */ |
| 734 | if (ah->ah_capabilities.cap_has_mrr_support) { |
| 735 | memset(mrr_rate, 0, sizeof(mrr_rate)); |
| 736 | memset(mrr_tries, 0, sizeof(mrr_tries)); |
| 737 | for (i = 0; i < 3; i++) { |
| 738 | rate = ieee80211_get_alt_retry_rate(ah->hw, info, i); |
| 739 | if (!rate) |
| 740 | break; |
Felix Fietkau | 2f7fe87 | 2008-10-05 18:05:48 +0200 | [diff] [blame] | 741 | |
Nick Kossifidis | 86f62d9 | 2011-11-25 20:40:28 +0200 | [diff] [blame] | 742 | mrr_rate[i] = rate->hw_value; |
| 743 | mrr_tries[i] = info->control.rates[i + 1].count; |
| 744 | } |
| 745 | |
| 746 | ath5k_hw_setup_mrr_tx_desc(ah, ds, |
| 747 | mrr_rate[0], mrr_tries[0], |
| 748 | mrr_rate[1], mrr_tries[1], |
| 749 | mrr_rate[2], mrr_tries[2]); |
Felix Fietkau | 2f7fe87 | 2008-10-05 18:05:48 +0200 | [diff] [blame] | 750 | } |
| 751 | |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 752 | ds->ds_link = 0; |
| 753 | ds->ds_data = bf->skbaddr; |
| 754 | |
| 755 | spin_lock_bh(&txq->lock); |
| 756 | list_add_tail(&bf->list, &txq->q); |
Bruno Randolf | 925e0b0 | 2010-09-17 11:36:35 +0900 | [diff] [blame] | 757 | txq->txq_len++; |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 758 | if (txq->link == NULL) /* is this first packet? */ |
Nick Kossifidis | c6e387a | 2008-08-29 22:45:39 +0300 | [diff] [blame] | 759 | ath5k_hw_set_txdp(ah, txq->qnum, bf->daddr); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 760 | else /* no, so only link it */ |
| 761 | *txq->link = bf->daddr; |
| 762 | |
| 763 | txq->link = &ds->ds_link; |
Nick Kossifidis | c6e387a | 2008-08-29 22:45:39 +0300 | [diff] [blame] | 764 | ath5k_hw_start_tx_dma(ah, txq->qnum); |
Jiri Slaby | 274c7c3 | 2008-07-15 17:44:20 +0200 | [diff] [blame] | 765 | mmiowb(); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 766 | spin_unlock_bh(&txq->lock); |
| 767 | |
| 768 | return 0; |
| 769 | err_unmap: |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 770 | dma_unmap_single(ah->dev, bf->skbaddr, skb->len, DMA_TO_DEVICE); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 771 | return ret; |
| 772 | } |
| 773 | |
| 774 | /*******************\ |
| 775 | * Descriptors setup * |
| 776 | \*******************/ |
| 777 | |
| 778 | static int |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 779 | ath5k_desc_alloc(struct ath5k_hw *ah) |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 780 | { |
| 781 | struct ath5k_desc *ds; |
| 782 | struct ath5k_buf *bf; |
| 783 | dma_addr_t da; |
| 784 | unsigned int i; |
| 785 | int ret; |
| 786 | |
| 787 | /* allocate descriptors */ |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 788 | ah->desc_len = sizeof(struct ath5k_desc) * |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 789 | (ATH_TXBUF + ATH_RXBUF + ATH_BCBUF + 1); |
Felix Fietkau | aeae4ac | 2010-12-02 10:26:51 +0100 | [diff] [blame] | 790 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 791 | ah->desc = dma_alloc_coherent(ah->dev, ah->desc_len, |
| 792 | &ah->desc_daddr, GFP_KERNEL); |
| 793 | if (ah->desc == NULL) { |
| 794 | ATH5K_ERR(ah, "can't allocate descriptors\n"); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 795 | ret = -ENOMEM; |
| 796 | goto err; |
| 797 | } |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 798 | ds = ah->desc; |
| 799 | da = ah->desc_daddr; |
| 800 | ATH5K_DBG(ah, ATH5K_DEBUG_ANY, "DMA map: %p (%zu) -> %llx\n", |
| 801 | ds, ah->desc_len, (unsigned long long)ah->desc_daddr); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 802 | |
| 803 | bf = kcalloc(1 + ATH_TXBUF + ATH_RXBUF + ATH_BCBUF, |
| 804 | sizeof(struct ath5k_buf), GFP_KERNEL); |
| 805 | if (bf == NULL) { |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 806 | ATH5K_ERR(ah, "can't allocate bufptr\n"); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 807 | ret = -ENOMEM; |
| 808 | goto err_free; |
| 809 | } |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 810 | ah->bufptr = bf; |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 811 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 812 | INIT_LIST_HEAD(&ah->rxbuf); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 813 | for (i = 0; i < ATH_RXBUF; i++, bf++, ds++, da += sizeof(*ds)) { |
| 814 | bf->desc = ds; |
| 815 | bf->daddr = da; |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 816 | list_add_tail(&bf->list, &ah->rxbuf); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 817 | } |
| 818 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 819 | INIT_LIST_HEAD(&ah->txbuf); |
| 820 | ah->txbuf_len = ATH_TXBUF; |
Pavel Roskin | e4bbf2f | 2011-07-07 18:14:13 -0400 | [diff] [blame] | 821 | for (i = 0; i < ATH_TXBUF; i++, bf++, ds++, da += sizeof(*ds)) { |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 822 | bf->desc = ds; |
| 823 | bf->daddr = da; |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 824 | list_add_tail(&bf->list, &ah->txbuf); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 825 | } |
| 826 | |
Ben Greear | b1ae1ed | 2010-09-30 12:22:58 -0700 | [diff] [blame] | 827 | /* beacon buffers */ |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 828 | INIT_LIST_HEAD(&ah->bcbuf); |
Ben Greear | b1ae1ed | 2010-09-30 12:22:58 -0700 | [diff] [blame] | 829 | for (i = 0; i < ATH_BCBUF; i++, bf++, ds++, da += sizeof(*ds)) { |
| 830 | bf->desc = ds; |
| 831 | bf->daddr = da; |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 832 | list_add_tail(&bf->list, &ah->bcbuf); |
Ben Greear | b1ae1ed | 2010-09-30 12:22:58 -0700 | [diff] [blame] | 833 | } |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 834 | |
| 835 | return 0; |
| 836 | err_free: |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 837 | dma_free_coherent(ah->dev, ah->desc_len, ah->desc, ah->desc_daddr); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 838 | err: |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 839 | ah->desc = NULL; |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 840 | return ret; |
| 841 | } |
| 842 | |
Bruno Randolf | cd2c548 | 2010-12-22 19:20:32 +0900 | [diff] [blame] | 843 | void |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 844 | ath5k_txbuf_free_skb(struct ath5k_hw *ah, struct ath5k_buf *bf) |
Bruno Randolf | cd2c548 | 2010-12-22 19:20:32 +0900 | [diff] [blame] | 845 | { |
| 846 | BUG_ON(!bf); |
| 847 | if (!bf->skb) |
| 848 | return; |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 849 | dma_unmap_single(ah->dev, bf->skbaddr, bf->skb->len, |
Bruno Randolf | cd2c548 | 2010-12-22 19:20:32 +0900 | [diff] [blame] | 850 | DMA_TO_DEVICE); |
| 851 | dev_kfree_skb_any(bf->skb); |
| 852 | bf->skb = NULL; |
| 853 | bf->skbaddr = 0; |
| 854 | bf->desc->ds_data = 0; |
| 855 | } |
| 856 | |
| 857 | void |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 858 | ath5k_rxbuf_free_skb(struct ath5k_hw *ah, struct ath5k_buf *bf) |
Bruno Randolf | cd2c548 | 2010-12-22 19:20:32 +0900 | [diff] [blame] | 859 | { |
Bruno Randolf | cd2c548 | 2010-12-22 19:20:32 +0900 | [diff] [blame] | 860 | struct ath_common *common = ath5k_hw_common(ah); |
| 861 | |
| 862 | BUG_ON(!bf); |
| 863 | if (!bf->skb) |
| 864 | return; |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 865 | dma_unmap_single(ah->dev, bf->skbaddr, common->rx_bufsize, |
Bruno Randolf | cd2c548 | 2010-12-22 19:20:32 +0900 | [diff] [blame] | 866 | DMA_FROM_DEVICE); |
| 867 | dev_kfree_skb_any(bf->skb); |
| 868 | bf->skb = NULL; |
| 869 | bf->skbaddr = 0; |
| 870 | bf->desc->ds_data = 0; |
| 871 | } |
| 872 | |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 873 | static void |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 874 | ath5k_desc_free(struct ath5k_hw *ah) |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 875 | { |
| 876 | struct ath5k_buf *bf; |
| 877 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 878 | list_for_each_entry(bf, &ah->txbuf, list) |
| 879 | ath5k_txbuf_free_skb(ah, bf); |
| 880 | list_for_each_entry(bf, &ah->rxbuf, list) |
| 881 | ath5k_rxbuf_free_skb(ah, bf); |
| 882 | list_for_each_entry(bf, &ah->bcbuf, list) |
| 883 | ath5k_txbuf_free_skb(ah, bf); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 884 | |
| 885 | /* Free memory associated with all descriptors */ |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 886 | dma_free_coherent(ah->dev, ah->desc_len, ah->desc, ah->desc_daddr); |
| 887 | ah->desc = NULL; |
| 888 | ah->desc_daddr = 0; |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 889 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 890 | kfree(ah->bufptr); |
| 891 | ah->bufptr = NULL; |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 892 | } |
| 893 | |
| 894 | |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 895 | /**************\ |
| 896 | * Queues setup * |
| 897 | \**************/ |
| 898 | |
| 899 | static struct ath5k_txq * |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 900 | ath5k_txq_setup(struct ath5k_hw *ah, |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 901 | int qtype, int subtype) |
| 902 | { |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 903 | struct ath5k_txq *txq; |
| 904 | struct ath5k_txq_info qi = { |
| 905 | .tqi_subtype = subtype, |
Bruno Randolf | de8af45 | 2010-09-17 11:37:12 +0900 | [diff] [blame] | 906 | /* XXX: default values not correct for B and XR channels, |
| 907 | * but who cares? */ |
| 908 | .tqi_aifs = AR5K_TUNE_AIFS, |
| 909 | .tqi_cw_min = AR5K_TUNE_CWMIN, |
| 910 | .tqi_cw_max = AR5K_TUNE_CWMAX |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 911 | }; |
| 912 | int qnum; |
| 913 | |
| 914 | /* |
| 915 | * Enable interrupts only for EOL and DESC conditions. |
| 916 | * We mark tx descriptors to receive a DESC interrupt |
Bob Copeland | a180a13 | 2010-08-15 13:03:12 -0400 | [diff] [blame] | 917 | * when a tx queue gets deep; otherwise we wait for the |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 918 | * EOL to reap descriptors. Note that this is done to |
| 919 | * reduce interrupt load and this only defers reaping |
| 920 | * descriptors, never transmitting frames. Aside from |
| 921 | * reducing interrupts this also permits more concurrency. |
| 922 | * The only potential downside is if the tx queue backs |
| 923 | * up in which case the top half of the kernel may backup |
| 924 | * due to a lack of tx descriptors. |
| 925 | */ |
| 926 | qi.tqi_flags = AR5K_TXQ_FLAG_TXEOLINT_ENABLE | |
| 927 | AR5K_TXQ_FLAG_TXDESCINT_ENABLE; |
| 928 | qnum = ath5k_hw_setup_tx_queue(ah, qtype, &qi); |
| 929 | if (qnum < 0) { |
| 930 | /* |
| 931 | * NB: don't print a message, this happens |
| 932 | * normally on parts with too few tx queues |
| 933 | */ |
| 934 | return ERR_PTR(qnum); |
| 935 | } |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 936 | txq = &ah->txqs[qnum]; |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 937 | if (!txq->setup) { |
| 938 | txq->qnum = qnum; |
| 939 | txq->link = NULL; |
| 940 | INIT_LIST_HEAD(&txq->q); |
| 941 | spin_lock_init(&txq->lock); |
| 942 | txq->setup = true; |
Bruno Randolf | 925e0b0 | 2010-09-17 11:36:35 +0900 | [diff] [blame] | 943 | txq->txq_len = 0; |
John W. Linville | 81266ba | 2011-03-07 16:32:59 -0500 | [diff] [blame] | 944 | txq->txq_max = ATH5K_TXQ_LEN_MAX; |
Bruno Randolf | 4edd761 | 2010-09-17 11:36:56 +0900 | [diff] [blame] | 945 | txq->txq_poll_mark = false; |
Bruno Randolf | 923e5b3 | 2010-09-17 11:37:02 +0900 | [diff] [blame] | 946 | txq->txq_stuck = 0; |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 947 | } |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 948 | return &ah->txqs[qnum]; |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 949 | } |
| 950 | |
| 951 | static int |
| 952 | ath5k_beaconq_setup(struct ath5k_hw *ah) |
| 953 | { |
| 954 | struct ath5k_txq_info qi = { |
Bruno Randolf | de8af45 | 2010-09-17 11:37:12 +0900 | [diff] [blame] | 955 | /* XXX: default values not correct for B and XR channels, |
| 956 | * but who cares? */ |
| 957 | .tqi_aifs = AR5K_TUNE_AIFS, |
| 958 | .tqi_cw_min = AR5K_TUNE_CWMIN, |
| 959 | .tqi_cw_max = AR5K_TUNE_CWMAX, |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 960 | /* NB: for dynamic turbo, don't enable any other interrupts */ |
| 961 | .tqi_flags = AR5K_TXQ_FLAG_TXDESCINT_ENABLE |
| 962 | }; |
| 963 | |
| 964 | return ath5k_hw_setup_tx_queue(ah, AR5K_TX_QUEUE_BEACON, &qi); |
| 965 | } |
| 966 | |
| 967 | static int |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 968 | ath5k_beaconq_config(struct ath5k_hw *ah) |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 969 | { |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 970 | struct ath5k_txq_info qi; |
| 971 | int ret; |
| 972 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 973 | ret = ath5k_hw_get_tx_queueprops(ah, ah->bhalq, &qi); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 974 | if (ret) |
Bob Copeland | a951ae2 | 2010-01-20 23:51:04 -0500 | [diff] [blame] | 975 | goto err; |
| 976 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 977 | if (ah->opmode == NL80211_IFTYPE_AP || |
| 978 | ah->opmode == NL80211_IFTYPE_MESH_POINT) { |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 979 | /* |
| 980 | * Always burst out beacon and CAB traffic |
| 981 | * (aifs = cwmin = cwmax = 0) |
| 982 | */ |
| 983 | qi.tqi_aifs = 0; |
| 984 | qi.tqi_cw_min = 0; |
| 985 | qi.tqi_cw_max = 0; |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 986 | } else if (ah->opmode == NL80211_IFTYPE_ADHOC) { |
Bruno Randolf | 6d91e1d | 2008-01-19 18:18:41 +0900 | [diff] [blame] | 987 | /* |
| 988 | * Adhoc mode; backoff between 0 and (2 * cw_min). |
| 989 | */ |
| 990 | qi.tqi_aifs = 0; |
| 991 | qi.tqi_cw_min = 0; |
Bruno Randolf | de8af45 | 2010-09-17 11:37:12 +0900 | [diff] [blame] | 992 | qi.tqi_cw_max = 2 * AR5K_TUNE_CWMIN; |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 993 | } |
| 994 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 995 | ATH5K_DBG(ah, ATH5K_DEBUG_BEACON, |
Bruno Randolf | 6d91e1d | 2008-01-19 18:18:41 +0900 | [diff] [blame] | 996 | "beacon queueprops tqi_aifs:%d tqi_cw_min:%d tqi_cw_max:%d\n", |
| 997 | qi.tqi_aifs, qi.tqi_cw_min, qi.tqi_cw_max); |
| 998 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 999 | ret = ath5k_hw_set_tx_queueprops(ah, ah->bhalq, &qi); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1000 | if (ret) { |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1001 | ATH5K_ERR(ah, "%s: unable to update parameters for beacon " |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1002 | "hardware queue!\n", __func__); |
Bob Copeland | a951ae2 | 2010-01-20 23:51:04 -0500 | [diff] [blame] | 1003 | goto err; |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1004 | } |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1005 | ret = ath5k_hw_reset_tx_queue(ah, ah->bhalq); /* push to h/w */ |
Bob Copeland | a951ae2 | 2010-01-20 23:51:04 -0500 | [diff] [blame] | 1006 | if (ret) |
| 1007 | goto err; |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1008 | |
Bob Copeland | a951ae2 | 2010-01-20 23:51:04 -0500 | [diff] [blame] | 1009 | /* reconfigure cabq with ready time to 80% of beacon_interval */ |
| 1010 | ret = ath5k_hw_get_tx_queueprops(ah, AR5K_TX_QUEUE_ID_CAB, &qi); |
| 1011 | if (ret) |
| 1012 | goto err; |
| 1013 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1014 | qi.tqi_ready_time = (ah->bintval * 80) / 100; |
Bob Copeland | a951ae2 | 2010-01-20 23:51:04 -0500 | [diff] [blame] | 1015 | ret = ath5k_hw_set_tx_queueprops(ah, AR5K_TX_QUEUE_ID_CAB, &qi); |
| 1016 | if (ret) |
| 1017 | goto err; |
| 1018 | |
| 1019 | ret = ath5k_hw_reset_tx_queue(ah, AR5K_TX_QUEUE_ID_CAB); |
| 1020 | err: |
| 1021 | return ret; |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1022 | } |
| 1023 | |
Nick Kossifidis | 80dac9e | 2010-11-23 20:45:38 +0200 | [diff] [blame] | 1024 | /** |
| 1025 | * ath5k_drain_tx_buffs - Empty tx buffers |
| 1026 | * |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1027 | * @ah The &struct ath5k_hw |
Nick Kossifidis | 80dac9e | 2010-11-23 20:45:38 +0200 | [diff] [blame] | 1028 | * |
| 1029 | * Empty tx buffers from all queues in preparation |
| 1030 | * of a reset or during shutdown. |
| 1031 | * |
| 1032 | * NB: this assumes output has been stopped and |
| 1033 | * we do not need to block ath5k_tx_tasklet |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1034 | */ |
| 1035 | static void |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1036 | ath5k_drain_tx_buffs(struct ath5k_hw *ah) |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1037 | { |
Nick Kossifidis | 80dac9e | 2010-11-23 20:45:38 +0200 | [diff] [blame] | 1038 | struct ath5k_txq *txq; |
| 1039 | struct ath5k_buf *bf, *bf0; |
| 1040 | int i; |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1041 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1042 | for (i = 0; i < ARRAY_SIZE(ah->txqs); i++) { |
| 1043 | if (ah->txqs[i].setup) { |
| 1044 | txq = &ah->txqs[i]; |
Nick Kossifidis | 80dac9e | 2010-11-23 20:45:38 +0200 | [diff] [blame] | 1045 | spin_lock_bh(&txq->lock); |
| 1046 | list_for_each_entry_safe(bf, bf0, &txq->q, list) { |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1047 | ath5k_debug_printtxbuf(ah, bf); |
Nick Kossifidis | 80dac9e | 2010-11-23 20:45:38 +0200 | [diff] [blame] | 1048 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1049 | ath5k_txbuf_free_skb(ah, bf); |
Nick Kossifidis | 80dac9e | 2010-11-23 20:45:38 +0200 | [diff] [blame] | 1050 | |
Bob Copeland | 6617942 | 2012-06-15 16:03:29 -0400 | [diff] [blame] | 1051 | spin_lock(&ah->txbuflock); |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1052 | list_move_tail(&bf->list, &ah->txbuf); |
| 1053 | ah->txbuf_len++; |
Nick Kossifidis | 80dac9e | 2010-11-23 20:45:38 +0200 | [diff] [blame] | 1054 | txq->txq_len--; |
Bob Copeland | 6617942 | 2012-06-15 16:03:29 -0400 | [diff] [blame] | 1055 | spin_unlock(&ah->txbuflock); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1056 | } |
Nick Kossifidis | 80dac9e | 2010-11-23 20:45:38 +0200 | [diff] [blame] | 1057 | txq->link = NULL; |
| 1058 | txq->txq_poll_mark = false; |
| 1059 | spin_unlock_bh(&txq->lock); |
| 1060 | } |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1061 | } |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1062 | } |
| 1063 | |
| 1064 | static void |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1065 | ath5k_txq_release(struct ath5k_hw *ah) |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1066 | { |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1067 | struct ath5k_txq *txq = ah->txqs; |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1068 | unsigned int i; |
| 1069 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1070 | for (i = 0; i < ARRAY_SIZE(ah->txqs); i++, txq++) |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1071 | if (txq->setup) { |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1072 | ath5k_hw_release_tx_queue(ah, txq->qnum); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1073 | txq->setup = false; |
| 1074 | } |
| 1075 | } |
| 1076 | |
| 1077 | |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1078 | /*************\ |
| 1079 | * RX Handling * |
| 1080 | \*************/ |
| 1081 | |
| 1082 | /* |
| 1083 | * Enable the receive h/w following a reset. |
| 1084 | */ |
| 1085 | static int |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1086 | ath5k_rx_start(struct ath5k_hw *ah) |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1087 | { |
Luis R. Rodriguez | db71971 | 2009-09-10 11:20:57 -0700 | [diff] [blame] | 1088 | struct ath_common *common = ath5k_hw_common(ah); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1089 | struct ath5k_buf *bf; |
| 1090 | int ret; |
| 1091 | |
Nick Kossifidis | b612798 | 2010-08-15 13:03:11 -0400 | [diff] [blame] | 1092 | common->rx_bufsize = roundup(IEEE80211_MAX_FRAME_LEN, common->cachelsz); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1093 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1094 | ATH5K_DBG(ah, ATH5K_DEBUG_RESET, "cachelsz %u rx_bufsize %u\n", |
Luis R. Rodriguez | cc861f7 | 2009-11-04 09:11:34 -0800 | [diff] [blame] | 1095 | common->cachelsz, common->rx_bufsize); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1096 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1097 | spin_lock_bh(&ah->rxbuflock); |
| 1098 | ah->rxlink = NULL; |
| 1099 | list_for_each_entry(bf, &ah->rxbuf, list) { |
| 1100 | ret = ath5k_rxbuf_setup(ah, bf); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1101 | if (ret != 0) { |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1102 | spin_unlock_bh(&ah->rxbuflock); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1103 | goto err; |
| 1104 | } |
| 1105 | } |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1106 | bf = list_first_entry(&ah->rxbuf, struct ath5k_buf, list); |
Bob Copeland | 2692504 | 2009-04-15 07:57:36 -0400 | [diff] [blame] | 1107 | ath5k_hw_set_rxdp(ah, bf->daddr); |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1108 | spin_unlock_bh(&ah->rxbuflock); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1109 | |
Nick Kossifidis | c6e387a | 2008-08-29 22:45:39 +0300 | [diff] [blame] | 1110 | ath5k_hw_start_rx_dma(ah); /* enable recv descriptors */ |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1111 | ath5k_update_bssid_mask_and_opmode(ah, NULL); /* set filters, etc. */ |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1112 | ath5k_hw_start_rx_pcu(ah); /* re-enable PCU/DMA engine */ |
| 1113 | |
| 1114 | return 0; |
| 1115 | err: |
| 1116 | return ret; |
| 1117 | } |
| 1118 | |
| 1119 | /* |
Nick Kossifidis | 80dac9e | 2010-11-23 20:45:38 +0200 | [diff] [blame] | 1120 | * Disable the receive logic on PCU (DRU) |
| 1121 | * In preparation for a shutdown. |
| 1122 | * |
| 1123 | * Note: Doesn't stop rx DMA, ath5k_hw_dma_stop |
| 1124 | * does. |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1125 | */ |
| 1126 | static void |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1127 | ath5k_rx_stop(struct ath5k_hw *ah) |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1128 | { |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1129 | |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1130 | ath5k_hw_set_rx_filter(ah, 0); /* clear recv filter */ |
Nick Kossifidis | 80dac9e | 2010-11-23 20:45:38 +0200 | [diff] [blame] | 1131 | ath5k_hw_stop_rx_pcu(ah); /* disable PCU */ |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1132 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1133 | ath5k_debug_printrxbuffs(ah); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1134 | } |
| 1135 | |
| 1136 | static unsigned int |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1137 | ath5k_rx_decrypted(struct ath5k_hw *ah, struct sk_buff *skb, |
Bruno Randolf | 8a89f06 | 2010-06-16 19:11:51 +0900 | [diff] [blame] | 1138 | struct ath5k_rx_status *rs) |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1139 | { |
Luis R. Rodriguez | dc1e001 | 2009-11-04 17:47:31 -0800 | [diff] [blame] | 1140 | struct ath_common *common = ath5k_hw_common(ah); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1141 | struct ieee80211_hdr *hdr = (void *)skb->data; |
Harvey Harrison | 798ee98 | 2008-07-15 18:44:02 -0700 | [diff] [blame] | 1142 | unsigned int keyix, hlen; |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1143 | |
Bruno Randolf | b47f407 | 2008-03-05 18:35:45 +0900 | [diff] [blame] | 1144 | if (!(rs->rs_status & AR5K_RXERR_DECRYPT) && |
| 1145 | rs->rs_keyix != AR5K_RXKEYIX_INVALID) |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1146 | return RX_FLAG_DECRYPTED; |
| 1147 | |
| 1148 | /* Apparently when a default key is used to decrypt the packet |
| 1149 | the hw does not set the index used to decrypt. In such cases |
| 1150 | get the index from the packet. */ |
Harvey Harrison | 798ee98 | 2008-07-15 18:44:02 -0700 | [diff] [blame] | 1151 | hlen = ieee80211_hdrlen(hdr->frame_control); |
Harvey Harrison | 24b56e7 | 2008-06-14 23:33:38 -0700 | [diff] [blame] | 1152 | if (ieee80211_has_protected(hdr->frame_control) && |
| 1153 | !(rs->rs_status & AR5K_RXERR_DECRYPT) && |
| 1154 | skb->len >= hlen + 4) { |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1155 | keyix = skb->data[hlen + 3] >> 6; |
| 1156 | |
Luis R. Rodriguez | dc1e001 | 2009-11-04 17:47:31 -0800 | [diff] [blame] | 1157 | if (test_bit(keyix, common->keymap)) |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1158 | return RX_FLAG_DECRYPTED; |
| 1159 | } |
| 1160 | |
| 1161 | return 0; |
| 1162 | } |
| 1163 | |
Bruno Randolf | 036cd1e | 2008-01-19 18:18:21 +0900 | [diff] [blame] | 1164 | |
| 1165 | static void |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1166 | ath5k_check_ibss_tsf(struct ath5k_hw *ah, struct sk_buff *skb, |
Bruno Randolf | 6ba81c2 | 2008-03-05 18:36:26 +0900 | [diff] [blame] | 1167 | struct ieee80211_rx_status *rxs) |
Bruno Randolf | 036cd1e | 2008-01-19 18:18:21 +0900 | [diff] [blame] | 1168 | { |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1169 | struct ath_common *common = ath5k_hw_common(ah); |
Bruno Randolf | 6ba81c2 | 2008-03-05 18:36:26 +0900 | [diff] [blame] | 1170 | u64 tsf, bc_tstamp; |
Bruno Randolf | 036cd1e | 2008-01-19 18:18:21 +0900 | [diff] [blame] | 1171 | u32 hw_tu; |
| 1172 | struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data; |
| 1173 | |
Harvey Harrison | 24b56e7 | 2008-06-14 23:33:38 -0700 | [diff] [blame] | 1174 | if (ieee80211_is_beacon(mgmt->frame_control) && |
Pavel Roskin | 38c07b4 | 2008-02-26 17:59:14 -0500 | [diff] [blame] | 1175 | le16_to_cpu(mgmt->u.beacon.capab_info) & WLAN_CAPABILITY_IBSS && |
Joe Perches | 2e42e47 | 2012-05-09 17:17:46 +0000 | [diff] [blame] | 1176 | ether_addr_equal(mgmt->bssid, common->curbssid)) { |
Bruno Randolf | 036cd1e | 2008-01-19 18:18:21 +0900 | [diff] [blame] | 1177 | /* |
Bruno Randolf | 6ba81c2 | 2008-03-05 18:36:26 +0900 | [diff] [blame] | 1178 | * Received an IBSS beacon with the same BSSID. Hardware *must* |
| 1179 | * have updated the local TSF. We have to work around various |
| 1180 | * hardware bugs, though... |
Bruno Randolf | 036cd1e | 2008-01-19 18:18:21 +0900 | [diff] [blame] | 1181 | */ |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1182 | tsf = ath5k_hw_get_tsf64(ah); |
Bruno Randolf | 6ba81c2 | 2008-03-05 18:36:26 +0900 | [diff] [blame] | 1183 | bc_tstamp = le64_to_cpu(mgmt->u.beacon.timestamp); |
| 1184 | hw_tu = TSF_TO_TU(tsf); |
| 1185 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1186 | ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_BEACON, |
Bruno Randolf | 6ba81c2 | 2008-03-05 18:36:26 +0900 | [diff] [blame] | 1187 | "beacon %llx mactime %llx (diff %lld) tsf now %llx\n", |
John W. Linville | 06501d2 | 2008-04-01 17:38:47 -0400 | [diff] [blame] | 1188 | (unsigned long long)bc_tstamp, |
| 1189 | (unsigned long long)rxs->mactime, |
| 1190 | (unsigned long long)(rxs->mactime - bc_tstamp), |
| 1191 | (unsigned long long)tsf); |
Bruno Randolf | 6ba81c2 | 2008-03-05 18:36:26 +0900 | [diff] [blame] | 1192 | |
| 1193 | /* |
| 1194 | * Sometimes the HW will give us a wrong tstamp in the rx |
| 1195 | * status, causing the timestamp extension to go wrong. |
| 1196 | * (This seems to happen especially with beacon frames bigger |
| 1197 | * than 78 byte (incl. FCS)) |
| 1198 | * But we know that the receive timestamp must be later than the |
| 1199 | * timestamp of the beacon since HW must have synced to that. |
| 1200 | * |
| 1201 | * NOTE: here we assume mactime to be after the frame was |
| 1202 | * received, not like mac80211 which defines it at the start. |
| 1203 | */ |
| 1204 | if (bc_tstamp > rxs->mactime) { |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1205 | ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_BEACON, |
Bruno Randolf | 6ba81c2 | 2008-03-05 18:36:26 +0900 | [diff] [blame] | 1206 | "fixing mactime from %llx to %llx\n", |
John W. Linville | 06501d2 | 2008-04-01 17:38:47 -0400 | [diff] [blame] | 1207 | (unsigned long long)rxs->mactime, |
| 1208 | (unsigned long long)tsf); |
Bruno Randolf | 6ba81c2 | 2008-03-05 18:36:26 +0900 | [diff] [blame] | 1209 | rxs->mactime = tsf; |
Bruno Randolf | 036cd1e | 2008-01-19 18:18:21 +0900 | [diff] [blame] | 1210 | } |
Bruno Randolf | 6ba81c2 | 2008-03-05 18:36:26 +0900 | [diff] [blame] | 1211 | |
| 1212 | /* |
| 1213 | * Local TSF might have moved higher than our beacon timers, |
| 1214 | * in that case we have to update them to continue sending |
| 1215 | * beacons. This also takes care of synchronizing beacon sending |
| 1216 | * times with other stations. |
| 1217 | */ |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1218 | if (hw_tu >= ah->nexttbtt) |
| 1219 | ath5k_beacon_update_timers(ah, bc_tstamp); |
Bruno Randolf | 7f89612 | 2010-09-27 12:22:21 +0900 | [diff] [blame] | 1220 | |
| 1221 | /* Check if the beacon timers are still correct, because a TSF |
| 1222 | * update might have created a window between them - for a |
| 1223 | * longer description see the comment of this function: */ |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1224 | if (!ath5k_hw_check_beacon_timers(ah, ah->bintval)) { |
| 1225 | ath5k_beacon_update_timers(ah, bc_tstamp); |
| 1226 | ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_BEACON, |
Bruno Randolf | 7f89612 | 2010-09-27 12:22:21 +0900 | [diff] [blame] | 1227 | "fixed beacon timers after beacon receive\n"); |
| 1228 | } |
Bruno Randolf | 036cd1e | 2008-01-19 18:18:21 +0900 | [diff] [blame] | 1229 | } |
| 1230 | } |
| 1231 | |
Bruno Randolf | b4ea449 | 2010-03-25 14:49:25 +0900 | [diff] [blame] | 1232 | static void |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1233 | ath5k_update_beacon_rssi(struct ath5k_hw *ah, struct sk_buff *skb, int rssi) |
Bruno Randolf | b4ea449 | 2010-03-25 14:49:25 +0900 | [diff] [blame] | 1234 | { |
| 1235 | struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data; |
Bruno Randolf | b4ea449 | 2010-03-25 14:49:25 +0900 | [diff] [blame] | 1236 | struct ath_common *common = ath5k_hw_common(ah); |
| 1237 | |
| 1238 | /* only beacons from our BSSID */ |
| 1239 | if (!ieee80211_is_beacon(mgmt->frame_control) || |
Joe Perches | 2e42e47 | 2012-05-09 17:17:46 +0000 | [diff] [blame] | 1240 | !ether_addr_equal(mgmt->bssid, common->curbssid)) |
Bruno Randolf | b4ea449 | 2010-03-25 14:49:25 +0900 | [diff] [blame] | 1241 | return; |
| 1242 | |
Bruno Randolf | eef39be | 2010-11-16 10:58:43 +0900 | [diff] [blame] | 1243 | ewma_add(&ah->ah_beacon_rssi_avg, rssi); |
Bruno Randolf | b4ea449 | 2010-03-25 14:49:25 +0900 | [diff] [blame] | 1244 | |
| 1245 | /* in IBSS mode we should keep RSSI statistics per neighbour */ |
| 1246 | /* le16_to_cpu(mgmt->u.beacon.capab_info) & WLAN_CAPABILITY_IBSS */ |
| 1247 | } |
| 1248 | |
Benoit Papillault | 8127fbd | 2010-02-27 23:05:26 +0100 | [diff] [blame] | 1249 | /* |
Bob Copeland | a180a13 | 2010-08-15 13:03:12 -0400 | [diff] [blame] | 1250 | * Compute padding position. skb must contain an IEEE 802.11 frame |
Benoit Papillault | 8127fbd | 2010-02-27 23:05:26 +0100 | [diff] [blame] | 1251 | */ |
| 1252 | static int ath5k_common_padpos(struct sk_buff *skb) |
| 1253 | { |
Pavel Roskin | e4bbf2f | 2011-07-07 18:14:13 -0400 | [diff] [blame] | 1254 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; |
Benoit Papillault | 8127fbd | 2010-02-27 23:05:26 +0100 | [diff] [blame] | 1255 | __le16 frame_control = hdr->frame_control; |
| 1256 | int padpos = 24; |
| 1257 | |
Pavel Roskin | d2c7f77 | 2011-07-07 18:14:07 -0400 | [diff] [blame] | 1258 | if (ieee80211_has_a4(frame_control)) |
Benoit Papillault | 8127fbd | 2010-02-27 23:05:26 +0100 | [diff] [blame] | 1259 | padpos += ETH_ALEN; |
Pavel Roskin | d2c7f77 | 2011-07-07 18:14:07 -0400 | [diff] [blame] | 1260 | |
| 1261 | if (ieee80211_is_data_qos(frame_control)) |
Benoit Papillault | 8127fbd | 2010-02-27 23:05:26 +0100 | [diff] [blame] | 1262 | padpos += IEEE80211_QOS_CTL_LEN; |
Benoit Papillault | 8127fbd | 2010-02-27 23:05:26 +0100 | [diff] [blame] | 1263 | |
| 1264 | return padpos; |
| 1265 | } |
| 1266 | |
| 1267 | /* |
Bob Copeland | a180a13 | 2010-08-15 13:03:12 -0400 | [diff] [blame] | 1268 | * This function expects an 802.11 frame and returns the number of |
| 1269 | * bytes added, or -1 if we don't have enough header room. |
Benoit Papillault | 8127fbd | 2010-02-27 23:05:26 +0100 | [diff] [blame] | 1270 | */ |
Benoit Papillault | 8127fbd | 2010-02-27 23:05:26 +0100 | [diff] [blame] | 1271 | static int ath5k_add_padding(struct sk_buff *skb) |
| 1272 | { |
| 1273 | int padpos = ath5k_common_padpos(skb); |
| 1274 | int padsize = padpos & 3; |
| 1275 | |
Pavel Roskin | e4bbf2f | 2011-07-07 18:14:13 -0400 | [diff] [blame] | 1276 | if (padsize && skb->len > padpos) { |
Benoit Papillault | 8127fbd | 2010-02-27 23:05:26 +0100 | [diff] [blame] | 1277 | |
| 1278 | if (skb_headroom(skb) < padsize) |
| 1279 | return -1; |
| 1280 | |
| 1281 | skb_push(skb, padsize); |
Pavel Roskin | e4bbf2f | 2011-07-07 18:14:13 -0400 | [diff] [blame] | 1282 | memmove(skb->data, skb->data + padsize, padpos); |
Benoit Papillault | 8127fbd | 2010-02-27 23:05:26 +0100 | [diff] [blame] | 1283 | return padsize; |
| 1284 | } |
| 1285 | |
| 1286 | return 0; |
| 1287 | } |
| 1288 | |
| 1289 | /* |
Bob Copeland | a180a13 | 2010-08-15 13:03:12 -0400 | [diff] [blame] | 1290 | * The MAC header is padded to have 32-bit boundary if the |
| 1291 | * packet payload is non-zero. The general calculation for |
| 1292 | * padsize would take into account odd header lengths: |
| 1293 | * padsize = 4 - (hdrlen & 3); however, since only |
| 1294 | * even-length headers are used, padding can only be 0 or 2 |
| 1295 | * bytes and we can optimize this a bit. We must not try to |
| 1296 | * remove padding from short control frames that do not have a |
| 1297 | * payload. |
| 1298 | * |
| 1299 | * This function expects an 802.11 frame and returns the number of |
| 1300 | * bytes removed. |
Benoit Papillault | 8127fbd | 2010-02-27 23:05:26 +0100 | [diff] [blame] | 1301 | */ |
Benoit Papillault | 8127fbd | 2010-02-27 23:05:26 +0100 | [diff] [blame] | 1302 | static int ath5k_remove_padding(struct sk_buff *skb) |
| 1303 | { |
| 1304 | int padpos = ath5k_common_padpos(skb); |
| 1305 | int padsize = padpos & 3; |
| 1306 | |
Pavel Roskin | e4bbf2f | 2011-07-07 18:14:13 -0400 | [diff] [blame] | 1307 | if (padsize && skb->len >= padpos + padsize) { |
Benoit Papillault | 8127fbd | 2010-02-27 23:05:26 +0100 | [diff] [blame] | 1308 | memmove(skb->data + padsize, skb->data, padpos); |
| 1309 | skb_pull(skb, padsize); |
| 1310 | return padsize; |
| 1311 | } |
| 1312 | |
| 1313 | return 0; |
| 1314 | } |
| 1315 | |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1316 | static void |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1317 | ath5k_receive_frame(struct ath5k_hw *ah, struct sk_buff *skb, |
Bruno Randolf | 8a89f06 | 2010-06-16 19:11:51 +0900 | [diff] [blame] | 1318 | struct ath5k_rx_status *rs) |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1319 | { |
Bob Copeland | 1c5256b | 2009-08-24 23:00:32 -0400 | [diff] [blame] | 1320 | struct ieee80211_rx_status *rxs; |
Bruno Randolf | 8a89f06 | 2010-06-16 19:11:51 +0900 | [diff] [blame] | 1321 | |
Bruno Randolf | 8a89f06 | 2010-06-16 19:11:51 +0900 | [diff] [blame] | 1322 | ath5k_remove_padding(skb); |
| 1323 | |
| 1324 | rxs = IEEE80211_SKB_RXCB(skb); |
| 1325 | |
| 1326 | rxs->flag = 0; |
| 1327 | if (unlikely(rs->rs_status & AR5K_RXERR_MIC)) |
| 1328 | rxs->flag |= RX_FLAG_MMIC_ERROR; |
| 1329 | |
| 1330 | /* |
| 1331 | * always extend the mac timestamp, since this information is |
| 1332 | * also needed for proper IBSS merging. |
| 1333 | * |
| 1334 | * XXX: it might be too late to do it here, since rs_tstamp is |
| 1335 | * 15bit only. that means TSF extension has to be done within |
| 1336 | * 32768usec (about 32ms). it might be necessary to move this to |
| 1337 | * the interrupt handler, like it is done in madwifi. |
| 1338 | * |
| 1339 | * Unfortunately we don't know when the hardware takes the rx |
| 1340 | * timestamp (beginning of phy frame, data frame, end of rx?). |
| 1341 | * The only thing we know is that it is hardware specific... |
| 1342 | * On AR5213 it seems the rx timestamp is at the end of the |
Pavel Roskin | 6a2a0e7 | 2011-07-09 00:17:51 -0400 | [diff] [blame] | 1343 | * frame, but I'm not sure. |
Bruno Randolf | 8a89f06 | 2010-06-16 19:11:51 +0900 | [diff] [blame] | 1344 | * |
| 1345 | * NOTE: mac80211 defines mactime at the beginning of the first |
| 1346 | * data symbol. Since we don't have any time references it's |
| 1347 | * impossible to comply to that. This affects IBSS merge only |
| 1348 | * right now, so it's not too bad... |
| 1349 | */ |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1350 | rxs->mactime = ath5k_extend_tsf(ah, rs->rs_tstamp); |
Johannes Berg | 6ebacbb | 2011-02-23 15:06:08 +0100 | [diff] [blame] | 1351 | rxs->flag |= RX_FLAG_MACTIME_MPDU; |
Bruno Randolf | 8a89f06 | 2010-06-16 19:11:51 +0900 | [diff] [blame] | 1352 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1353 | rxs->freq = ah->curchan->center_freq; |
| 1354 | rxs->band = ah->curchan->band; |
Bruno Randolf | 8a89f06 | 2010-06-16 19:11:51 +0900 | [diff] [blame] | 1355 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1356 | rxs->signal = ah->ah_noise_floor + rs->rs_rssi; |
Bruno Randolf | 8a89f06 | 2010-06-16 19:11:51 +0900 | [diff] [blame] | 1357 | |
| 1358 | rxs->antenna = rs->rs_antenna; |
| 1359 | |
| 1360 | if (rs->rs_antenna > 0 && rs->rs_antenna < 5) |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1361 | ah->stats.antenna_rx[rs->rs_antenna]++; |
Bruno Randolf | 8a89f06 | 2010-06-16 19:11:51 +0900 | [diff] [blame] | 1362 | else |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1363 | ah->stats.antenna_rx[0]++; /* invalid */ |
Bruno Randolf | 8a89f06 | 2010-06-16 19:11:51 +0900 | [diff] [blame] | 1364 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1365 | rxs->rate_idx = ath5k_hw_to_driver_rix(ah, rs->rs_rate); |
| 1366 | rxs->flag |= ath5k_rx_decrypted(ah, skb, rs); |
Bruno Randolf | 8a89f06 | 2010-06-16 19:11:51 +0900 | [diff] [blame] | 1367 | |
| 1368 | if (rxs->rate_idx >= 0 && rs->rs_rate == |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1369 | ah->sbands[ah->curchan->band].bitrates[rxs->rate_idx].hw_value_short) |
Bruno Randolf | 8a89f06 | 2010-06-16 19:11:51 +0900 | [diff] [blame] | 1370 | rxs->flag |= RX_FLAG_SHORTPRE; |
| 1371 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1372 | trace_ath5k_rx(ah, skb); |
Bruno Randolf | 8a89f06 | 2010-06-16 19:11:51 +0900 | [diff] [blame] | 1373 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1374 | ath5k_update_beacon_rssi(ah, skb, rs->rs_rssi); |
Bruno Randolf | 8a89f06 | 2010-06-16 19:11:51 +0900 | [diff] [blame] | 1375 | |
| 1376 | /* check beacons in IBSS mode */ |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1377 | if (ah->opmode == NL80211_IFTYPE_ADHOC) |
| 1378 | ath5k_check_ibss_tsf(ah, skb, rxs); |
Bruno Randolf | 8a89f06 | 2010-06-16 19:11:51 +0900 | [diff] [blame] | 1379 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1380 | ieee80211_rx(ah->hw, skb); |
Bruno Randolf | 8a89f06 | 2010-06-16 19:11:51 +0900 | [diff] [blame] | 1381 | } |
| 1382 | |
Bruno Randolf | 02a78b4 | 2010-06-16 19:11:56 +0900 | [diff] [blame] | 1383 | /** ath5k_frame_receive_ok() - Do we want to receive this frame or not? |
| 1384 | * |
| 1385 | * Check if we want to further process this frame or not. Also update |
| 1386 | * statistics. Return true if we want this frame, false if not. |
| 1387 | */ |
| 1388 | static bool |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1389 | ath5k_receive_frame_ok(struct ath5k_hw *ah, struct ath5k_rx_status *rs) |
Bruno Randolf | 02a78b4 | 2010-06-16 19:11:56 +0900 | [diff] [blame] | 1390 | { |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1391 | ah->stats.rx_all_count++; |
| 1392 | ah->stats.rx_bytes_count += rs->rs_datalen; |
Bruno Randolf | 02a78b4 | 2010-06-16 19:11:56 +0900 | [diff] [blame] | 1393 | |
| 1394 | if (unlikely(rs->rs_status)) { |
| 1395 | if (rs->rs_status & AR5K_RXERR_CRC) |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1396 | ah->stats.rxerr_crc++; |
Bruno Randolf | 02a78b4 | 2010-06-16 19:11:56 +0900 | [diff] [blame] | 1397 | if (rs->rs_status & AR5K_RXERR_FIFO) |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1398 | ah->stats.rxerr_fifo++; |
Bruno Randolf | 02a78b4 | 2010-06-16 19:11:56 +0900 | [diff] [blame] | 1399 | if (rs->rs_status & AR5K_RXERR_PHY) { |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1400 | ah->stats.rxerr_phy++; |
Bruno Randolf | 02a78b4 | 2010-06-16 19:11:56 +0900 | [diff] [blame] | 1401 | if (rs->rs_phyerr > 0 && rs->rs_phyerr < 32) |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1402 | ah->stats.rxerr_phy_code[rs->rs_phyerr]++; |
Bruno Randolf | 02a78b4 | 2010-06-16 19:11:56 +0900 | [diff] [blame] | 1403 | return false; |
| 1404 | } |
| 1405 | if (rs->rs_status & AR5K_RXERR_DECRYPT) { |
| 1406 | /* |
| 1407 | * Decrypt error. If the error occurred |
| 1408 | * because there was no hardware key, then |
| 1409 | * let the frame through so the upper layers |
| 1410 | * can process it. This is necessary for 5210 |
| 1411 | * parts which have no way to setup a ``clear'' |
| 1412 | * key cache entry. |
| 1413 | * |
| 1414 | * XXX do key cache faulting |
| 1415 | */ |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1416 | ah->stats.rxerr_decrypt++; |
Bruno Randolf | 02a78b4 | 2010-06-16 19:11:56 +0900 | [diff] [blame] | 1417 | if (rs->rs_keyix == AR5K_RXKEYIX_INVALID && |
| 1418 | !(rs->rs_status & AR5K_RXERR_CRC)) |
| 1419 | return true; |
| 1420 | } |
| 1421 | if (rs->rs_status & AR5K_RXERR_MIC) { |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1422 | ah->stats.rxerr_mic++; |
Bruno Randolf | 02a78b4 | 2010-06-16 19:11:56 +0900 | [diff] [blame] | 1423 | return true; |
| 1424 | } |
| 1425 | |
Bob Copeland | 23538c2 | 2010-08-15 13:03:13 -0400 | [diff] [blame] | 1426 | /* reject any frames with non-crypto errors */ |
| 1427 | if (rs->rs_status & ~(AR5K_RXERR_DECRYPT)) |
Bruno Randolf | 02a78b4 | 2010-06-16 19:11:56 +0900 | [diff] [blame] | 1428 | return false; |
| 1429 | } |
| 1430 | |
| 1431 | if (unlikely(rs->rs_more)) { |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1432 | ah->stats.rxerr_jumbo++; |
Bruno Randolf | 02a78b4 | 2010-06-16 19:11:56 +0900 | [diff] [blame] | 1433 | return false; |
| 1434 | } |
| 1435 | return true; |
| 1436 | } |
| 1437 | |
Bruno Randolf | 8a89f06 | 2010-06-16 19:11:51 +0900 | [diff] [blame] | 1438 | static void |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1439 | ath5k_set_current_imask(struct ath5k_hw *ah) |
Felix Fietkau | c266c71 | 2011-04-10 18:32:19 +0200 | [diff] [blame] | 1440 | { |
Pavel Roskin | 4fc5401 | 2011-07-07 18:14:25 -0400 | [diff] [blame] | 1441 | enum ath5k_int imask; |
Felix Fietkau | c266c71 | 2011-04-10 18:32:19 +0200 | [diff] [blame] | 1442 | unsigned long flags; |
| 1443 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1444 | spin_lock_irqsave(&ah->irqlock, flags); |
| 1445 | imask = ah->imask; |
| 1446 | if (ah->rx_pending) |
Felix Fietkau | c266c71 | 2011-04-10 18:32:19 +0200 | [diff] [blame] | 1447 | imask &= ~AR5K_INT_RX_ALL; |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1448 | if (ah->tx_pending) |
Felix Fietkau | c266c71 | 2011-04-10 18:32:19 +0200 | [diff] [blame] | 1449 | imask &= ~AR5K_INT_TX_ALL; |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1450 | ath5k_hw_set_imr(ah, imask); |
| 1451 | spin_unlock_irqrestore(&ah->irqlock, flags); |
Felix Fietkau | c266c71 | 2011-04-10 18:32:19 +0200 | [diff] [blame] | 1452 | } |
| 1453 | |
| 1454 | static void |
Bruno Randolf | 8a89f06 | 2010-06-16 19:11:51 +0900 | [diff] [blame] | 1455 | ath5k_tasklet_rx(unsigned long data) |
| 1456 | { |
Bruno Randolf | b47f407 | 2008-03-05 18:35:45 +0900 | [diff] [blame] | 1457 | struct ath5k_rx_status rs = {}; |
Bob Copeland | b6ea035 | 2009-01-10 14:42:54 -0500 | [diff] [blame] | 1458 | struct sk_buff *skb, *next_skb; |
| 1459 | dma_addr_t next_skb_addr; |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1460 | struct ath5k_hw *ah = (void *)data; |
Luis R. Rodriguez | cc861f7 | 2009-11-04 09:11:34 -0800 | [diff] [blame] | 1461 | struct ath_common *common = ath5k_hw_common(ah); |
Bob Copeland | c57ca81 | 2009-04-15 07:57:35 -0400 | [diff] [blame] | 1462 | struct ath5k_buf *bf; |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1463 | struct ath5k_desc *ds; |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1464 | int ret; |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1465 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1466 | spin_lock(&ah->rxbuflock); |
| 1467 | if (list_empty(&ah->rxbuf)) { |
| 1468 | ATH5K_WARN(ah, "empty rx buf pool\n"); |
Jiri Slaby | 3a0f2c8 | 2008-07-15 17:44:18 +0200 | [diff] [blame] | 1469 | goto unlock; |
| 1470 | } |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1471 | do { |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1472 | bf = list_first_entry(&ah->rxbuf, struct ath5k_buf, list); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1473 | BUG_ON(bf->skb == NULL); |
| 1474 | skb = bf->skb; |
| 1475 | ds = bf->desc; |
| 1476 | |
Bob Copeland | c57ca81 | 2009-04-15 07:57:35 -0400 | [diff] [blame] | 1477 | /* bail if HW is still using self-linked descriptor */ |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1478 | if (ath5k_hw_get_rxdp(ah) == bf->daddr) |
Bob Copeland | c57ca81 | 2009-04-15 07:57:35 -0400 | [diff] [blame] | 1479 | break; |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1480 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1481 | ret = ah->ah_proc_rx_desc(ah, ds, &rs); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1482 | if (unlikely(ret == -EINPROGRESS)) |
| 1483 | break; |
| 1484 | else if (unlikely(ret)) { |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1485 | ATH5K_ERR(ah, "error in processing rx descriptor\n"); |
| 1486 | ah->stats.rxerr_proc++; |
Bruno Randolf | b16062f | 2010-06-16 19:11:46 +0900 | [diff] [blame] | 1487 | break; |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1488 | } |
| 1489 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1490 | if (ath5k_receive_frame_ok(ah, &rs)) { |
| 1491 | next_skb = ath5k_rx_skb_alloc(ah, &next_skb_addr); |
Bruno Randolf | 7644395 | 2010-03-09 16:56:00 +0900 | [diff] [blame] | 1492 | |
Bruno Randolf | 02a78b4 | 2010-06-16 19:11:56 +0900 | [diff] [blame] | 1493 | /* |
| 1494 | * If we can't replace bf->skb with a new skb under |
| 1495 | * memory pressure, just skip this packet |
| 1496 | */ |
| 1497 | if (!next_skb) |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1498 | goto next; |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1499 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1500 | dma_unmap_single(ah->dev, bf->skbaddr, |
Bruno Randolf | 02a78b4 | 2010-06-16 19:11:56 +0900 | [diff] [blame] | 1501 | common->rx_bufsize, |
Felix Fietkau | aeae4ac | 2010-12-02 10:26:51 +0100 | [diff] [blame] | 1502 | DMA_FROM_DEVICE); |
Bruno Randolf | 02a78b4 | 2010-06-16 19:11:56 +0900 | [diff] [blame] | 1503 | |
| 1504 | skb_put(skb, rs.rs_datalen); |
| 1505 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1506 | ath5k_receive_frame(ah, skb, &rs); |
Bruno Randolf | 02a78b4 | 2010-06-16 19:11:56 +0900 | [diff] [blame] | 1507 | |
| 1508 | bf->skb = next_skb; |
| 1509 | bf->skbaddr = next_skb_addr; |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1510 | } |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1511 | next: |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1512 | list_move_tail(&bf->list, &ah->rxbuf); |
| 1513 | } while (ath5k_rxbuf_setup(ah, bf) == 0); |
Jiri Slaby | 3a0f2c8 | 2008-07-15 17:44:18 +0200 | [diff] [blame] | 1514 | unlock: |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1515 | spin_unlock(&ah->rxbuflock); |
| 1516 | ah->rx_pending = false; |
| 1517 | ath5k_set_current_imask(ah); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1518 | } |
| 1519 | |
| 1520 | |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1521 | /*************\ |
| 1522 | * TX Handling * |
| 1523 | \*************/ |
| 1524 | |
Johannes Berg | 7bb4568 | 2011-02-24 14:42:06 +0100 | [diff] [blame] | 1525 | void |
Bruno Randolf | cd2c548 | 2010-12-22 19:20:32 +0900 | [diff] [blame] | 1526 | ath5k_tx_queue(struct ieee80211_hw *hw, struct sk_buff *skb, |
| 1527 | struct ath5k_txq *txq) |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 1528 | { |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1529 | struct ath5k_hw *ah = hw->priv; |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 1530 | struct ath5k_buf *bf; |
| 1531 | unsigned long flags; |
| 1532 | int padsize; |
| 1533 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1534 | trace_ath5k_tx(ah, skb, txq); |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 1535 | |
| 1536 | /* |
| 1537 | * The hardware expects the header padded to 4 byte boundaries. |
| 1538 | * If this is not the case, we add the padding after the header. |
| 1539 | */ |
| 1540 | padsize = ath5k_add_padding(skb); |
| 1541 | if (padsize < 0) { |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1542 | ATH5K_ERR(ah, "tx hdrlen not %%4: not enough" |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 1543 | " headroom to pad"); |
| 1544 | goto drop_packet; |
| 1545 | } |
| 1546 | |
Felix Fietkau | 4e86879 | 2011-07-12 09:02:05 +0800 | [diff] [blame] | 1547 | if (txq->txq_len >= txq->txq_max && |
| 1548 | txq->qnum <= AR5K_TX_QUEUE_ID_DATA_MAX) |
Bruno Randolf | 925e0b0 | 2010-09-17 11:36:35 +0900 | [diff] [blame] | 1549 | ieee80211_stop_queue(hw, txq->qnum); |
| 1550 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1551 | spin_lock_irqsave(&ah->txbuflock, flags); |
| 1552 | if (list_empty(&ah->txbuf)) { |
| 1553 | ATH5K_ERR(ah, "no further txbuf available, dropping packet\n"); |
| 1554 | spin_unlock_irqrestore(&ah->txbuflock, flags); |
Bruno Randolf | 651d937 | 2010-09-17 11:36:46 +0900 | [diff] [blame] | 1555 | ieee80211_stop_queues(hw); |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 1556 | goto drop_packet; |
| 1557 | } |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1558 | bf = list_first_entry(&ah->txbuf, struct ath5k_buf, list); |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 1559 | list_del(&bf->list); |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1560 | ah->txbuf_len--; |
| 1561 | if (list_empty(&ah->txbuf)) |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 1562 | ieee80211_stop_queues(hw); |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1563 | spin_unlock_irqrestore(&ah->txbuflock, flags); |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 1564 | |
| 1565 | bf->skb = skb; |
| 1566 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1567 | if (ath5k_txbuf_setup(ah, bf, txq, padsize)) { |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 1568 | bf->skb = NULL; |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1569 | spin_lock_irqsave(&ah->txbuflock, flags); |
| 1570 | list_add_tail(&bf->list, &ah->txbuf); |
| 1571 | ah->txbuf_len++; |
| 1572 | spin_unlock_irqrestore(&ah->txbuflock, flags); |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 1573 | goto drop_packet; |
| 1574 | } |
Johannes Berg | 7bb4568 | 2011-02-24 14:42:06 +0100 | [diff] [blame] | 1575 | return; |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 1576 | |
| 1577 | drop_packet: |
| 1578 | dev_kfree_skb_any(skb); |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 1579 | } |
| 1580 | |
Bruno Randolf | 1440401 | 2010-09-17 11:36:51 +0900 | [diff] [blame] | 1581 | static void |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1582 | ath5k_tx_frame_completed(struct ath5k_hw *ah, struct sk_buff *skb, |
Bob Copeland | 0e47225 | 2011-01-24 23:32:55 -0500 | [diff] [blame] | 1583 | struct ath5k_txq *txq, struct ath5k_tx_status *ts) |
Bruno Randolf | 1440401 | 2010-09-17 11:36:51 +0900 | [diff] [blame] | 1584 | { |
| 1585 | struct ieee80211_tx_info *info; |
Felix Fietkau | ed89508 | 2011-04-10 18:32:17 +0200 | [diff] [blame] | 1586 | u8 tries[3]; |
Bruno Randolf | 1440401 | 2010-09-17 11:36:51 +0900 | [diff] [blame] | 1587 | int i; |
| 1588 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1589 | ah->stats.tx_all_count++; |
| 1590 | ah->stats.tx_bytes_count += skb->len; |
Bruno Randolf | 1440401 | 2010-09-17 11:36:51 +0900 | [diff] [blame] | 1591 | info = IEEE80211_SKB_CB(skb); |
| 1592 | |
Felix Fietkau | ed89508 | 2011-04-10 18:32:17 +0200 | [diff] [blame] | 1593 | tries[0] = info->status.rates[0].count; |
| 1594 | tries[1] = info->status.rates[1].count; |
| 1595 | tries[2] = info->status.rates[2].count; |
| 1596 | |
Bruno Randolf | 1440401 | 2010-09-17 11:36:51 +0900 | [diff] [blame] | 1597 | ieee80211_tx_info_clear_status(info); |
Felix Fietkau | ed89508 | 2011-04-10 18:32:17 +0200 | [diff] [blame] | 1598 | |
| 1599 | for (i = 0; i < ts->ts_final_idx; i++) { |
Bruno Randolf | 1440401 | 2010-09-17 11:36:51 +0900 | [diff] [blame] | 1600 | struct ieee80211_tx_rate *r = |
| 1601 | &info->status.rates[i]; |
| 1602 | |
Felix Fietkau | ed89508 | 2011-04-10 18:32:17 +0200 | [diff] [blame] | 1603 | r->count = tries[i]; |
Bruno Randolf | 1440401 | 2010-09-17 11:36:51 +0900 | [diff] [blame] | 1604 | } |
| 1605 | |
Felix Fietkau | ed89508 | 2011-04-10 18:32:17 +0200 | [diff] [blame] | 1606 | info->status.rates[ts->ts_final_idx].count = ts->ts_final_retry; |
Felix Fietkau | 6d7b97b | 2011-04-09 21:37:14 +0200 | [diff] [blame] | 1607 | info->status.rates[ts->ts_final_idx + 1].idx = -1; |
Bruno Randolf | 1440401 | 2010-09-17 11:36:51 +0900 | [diff] [blame] | 1608 | |
| 1609 | if (unlikely(ts->ts_status)) { |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1610 | ah->stats.ack_fail++; |
Bruno Randolf | 1440401 | 2010-09-17 11:36:51 +0900 | [diff] [blame] | 1611 | if (ts->ts_status & AR5K_TXERR_FILT) { |
| 1612 | info->flags |= IEEE80211_TX_STAT_TX_FILTERED; |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1613 | ah->stats.txerr_filt++; |
Bruno Randolf | 1440401 | 2010-09-17 11:36:51 +0900 | [diff] [blame] | 1614 | } |
| 1615 | if (ts->ts_status & AR5K_TXERR_XRETRY) |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1616 | ah->stats.txerr_retry++; |
Bruno Randolf | 1440401 | 2010-09-17 11:36:51 +0900 | [diff] [blame] | 1617 | if (ts->ts_status & AR5K_TXERR_FIFO) |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1618 | ah->stats.txerr_fifo++; |
Bruno Randolf | 1440401 | 2010-09-17 11:36:51 +0900 | [diff] [blame] | 1619 | } else { |
| 1620 | info->flags |= IEEE80211_TX_STAT_ACK; |
| 1621 | info->status.ack_signal = ts->ts_rssi; |
Felix Fietkau | 6d7b97b | 2011-04-09 21:37:14 +0200 | [diff] [blame] | 1622 | |
| 1623 | /* count the successful attempt as well */ |
| 1624 | info->status.rates[ts->ts_final_idx].count++; |
Bruno Randolf | 1440401 | 2010-09-17 11:36:51 +0900 | [diff] [blame] | 1625 | } |
| 1626 | |
| 1627 | /* |
| 1628 | * Remove MAC header padding before giving the frame |
| 1629 | * back to mac80211. |
| 1630 | */ |
| 1631 | ath5k_remove_padding(skb); |
| 1632 | |
| 1633 | if (ts->ts_antenna > 0 && ts->ts_antenna < 5) |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1634 | ah->stats.antenna_tx[ts->ts_antenna]++; |
Bruno Randolf | 1440401 | 2010-09-17 11:36:51 +0900 | [diff] [blame] | 1635 | else |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1636 | ah->stats.antenna_tx[0]++; /* invalid */ |
Bruno Randolf | 1440401 | 2010-09-17 11:36:51 +0900 | [diff] [blame] | 1637 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1638 | trace_ath5k_tx_complete(ah, skb, txq, ts); |
| 1639 | ieee80211_tx_status(ah->hw, skb); |
Bruno Randolf | 1440401 | 2010-09-17 11:36:51 +0900 | [diff] [blame] | 1640 | } |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 1641 | |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1642 | static void |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1643 | ath5k_tx_processq(struct ath5k_hw *ah, struct ath5k_txq *txq) |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1644 | { |
Bruno Randolf | b47f407 | 2008-03-05 18:35:45 +0900 | [diff] [blame] | 1645 | struct ath5k_tx_status ts = {}; |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1646 | struct ath5k_buf *bf, *bf0; |
| 1647 | struct ath5k_desc *ds; |
| 1648 | struct sk_buff *skb; |
Bruno Randolf | 1440401 | 2010-09-17 11:36:51 +0900 | [diff] [blame] | 1649 | int ret; |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1650 | |
| 1651 | spin_lock(&txq->lock); |
| 1652 | list_for_each_entry_safe(bf, bf0, &txq->q, list) { |
Bruno Randolf | 2341329 | 2010-09-17 11:37:07 +0900 | [diff] [blame] | 1653 | |
| 1654 | txq->txq_poll_mark = false; |
| 1655 | |
| 1656 | /* skb might already have been processed last time. */ |
| 1657 | if (bf->skb != NULL) { |
| 1658 | ds = bf->desc; |
| 1659 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1660 | ret = ah->ah_proc_tx_desc(ah, ds, &ts); |
Bruno Randolf | 2341329 | 2010-09-17 11:37:07 +0900 | [diff] [blame] | 1661 | if (unlikely(ret == -EINPROGRESS)) |
| 1662 | break; |
| 1663 | else if (unlikely(ret)) { |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1664 | ATH5K_ERR(ah, |
Bruno Randolf | 2341329 | 2010-09-17 11:37:07 +0900 | [diff] [blame] | 1665 | "error %d while processing " |
| 1666 | "queue %u\n", ret, txq->qnum); |
| 1667 | break; |
| 1668 | } |
| 1669 | |
| 1670 | skb = bf->skb; |
| 1671 | bf->skb = NULL; |
Felix Fietkau | aeae4ac | 2010-12-02 10:26:51 +0100 | [diff] [blame] | 1672 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1673 | dma_unmap_single(ah->dev, bf->skbaddr, skb->len, |
Felix Fietkau | aeae4ac | 2010-12-02 10:26:51 +0100 | [diff] [blame] | 1674 | DMA_TO_DEVICE); |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1675 | ath5k_tx_frame_completed(ah, skb, txq, &ts); |
Bruno Randolf | 2341329 | 2010-09-17 11:37:07 +0900 | [diff] [blame] | 1676 | } |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1677 | |
Bob Copeland | a05988b | 2010-04-07 23:55:58 -0400 | [diff] [blame] | 1678 | /* |
| 1679 | * It's possible that the hardware can say the buffer is |
| 1680 | * completed when it hasn't yet loaded the ds_link from |
Bruno Randolf | 2341329 | 2010-09-17 11:37:07 +0900 | [diff] [blame] | 1681 | * host memory and moved on. |
| 1682 | * Always keep the last descriptor to avoid HW races... |
Bob Copeland | a05988b | 2010-04-07 23:55:58 -0400 | [diff] [blame] | 1683 | */ |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1684 | if (ath5k_hw_get_txdp(ah, txq->qnum) != bf->daddr) { |
| 1685 | spin_lock(&ah->txbuflock); |
| 1686 | list_move_tail(&bf->list, &ah->txbuf); |
| 1687 | ah->txbuf_len++; |
Bruno Randolf | 2341329 | 2010-09-17 11:37:07 +0900 | [diff] [blame] | 1688 | txq->txq_len--; |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1689 | spin_unlock(&ah->txbuflock); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1690 | } |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1691 | } |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1692 | spin_unlock(&txq->lock); |
Bruno Randolf | 4198a8d | 2010-10-05 13:27:17 +0900 | [diff] [blame] | 1693 | if (txq->txq_len < ATH5K_TXQ_LEN_LOW && txq->qnum < 4) |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1694 | ieee80211_wake_queue(ah->hw, txq->qnum); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1695 | } |
| 1696 | |
| 1697 | static void |
| 1698 | ath5k_tasklet_tx(unsigned long data) |
| 1699 | { |
Bob Copeland | 8784d2e | 2009-07-29 17:32:28 -0400 | [diff] [blame] | 1700 | int i; |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1701 | struct ath5k_hw *ah = (void *)data; |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1702 | |
Pavel Roskin | e4bbf2f | 2011-07-07 18:14:13 -0400 | [diff] [blame] | 1703 | for (i = 0; i < AR5K_NUM_TX_QUEUES; i++) |
Nick Kossifidis | 7ff7c82 | 2011-11-25 20:40:20 +0200 | [diff] [blame] | 1704 | if (ah->txqs[i].setup && (ah->ah_txq_isr_txok_all & BIT(i))) |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1705 | ath5k_tx_processq(ah, &ah->txqs[i]); |
Felix Fietkau | c266c71 | 2011-04-10 18:32:19 +0200 | [diff] [blame] | 1706 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1707 | ah->tx_pending = false; |
| 1708 | ath5k_set_current_imask(ah); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1709 | } |
| 1710 | |
| 1711 | |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1712 | /*****************\ |
| 1713 | * Beacon handling * |
| 1714 | \*****************/ |
| 1715 | |
| 1716 | /* |
| 1717 | * Setup the beacon frame for transmit. |
| 1718 | */ |
| 1719 | static int |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1720 | ath5k_beacon_setup(struct ath5k_hw *ah, struct ath5k_buf *bf) |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1721 | { |
| 1722 | struct sk_buff *skb = bf->skb; |
Johannes Berg | a888d52 | 2008-05-26 16:43:39 +0200 | [diff] [blame] | 1723 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1724 | struct ath5k_desc *ds; |
Nick Kossifidis | 2bed03e | 2009-04-30 15:55:49 -0400 | [diff] [blame] | 1725 | int ret = 0; |
| 1726 | u8 antenna; |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1727 | u32 flags; |
Benoit Papillault | 8127fbd | 2010-02-27 23:05:26 +0100 | [diff] [blame] | 1728 | const int padsize = 0; |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1729 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1730 | bf->skbaddr = dma_map_single(ah->dev, skb->data, skb->len, |
Felix Fietkau | aeae4ac | 2010-12-02 10:26:51 +0100 | [diff] [blame] | 1731 | DMA_TO_DEVICE); |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1732 | ATH5K_DBG(ah, ATH5K_DEBUG_BEACON, "skb %p [data %p len %u] " |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1733 | "skbaddr %llx\n", skb, skb->data, skb->len, |
| 1734 | (unsigned long long)bf->skbaddr); |
Felix Fietkau | aeae4ac | 2010-12-02 10:26:51 +0100 | [diff] [blame] | 1735 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1736 | if (dma_mapping_error(ah->dev, bf->skbaddr)) { |
| 1737 | ATH5K_ERR(ah, "beacon DMA mapping failed\n"); |
Bob Copeland | bdc71bc | 2011-08-07 19:36:07 -0400 | [diff] [blame] | 1738 | dev_kfree_skb_any(skb); |
| 1739 | bf->skb = NULL; |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1740 | return -EIO; |
| 1741 | } |
| 1742 | |
| 1743 | ds = bf->desc; |
Nick Kossifidis | 2bed03e | 2009-04-30 15:55:49 -0400 | [diff] [blame] | 1744 | antenna = ah->ah_tx_ant; |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1745 | |
| 1746 | flags = AR5K_TXDESC_NOACK; |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1747 | if (ah->opmode == NL80211_IFTYPE_ADHOC && ath5k_hw_hasveol(ah)) { |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1748 | ds->ds_link = bf->daddr; /* self-linked */ |
| 1749 | flags |= AR5K_TXDESC_VEOL; |
Nick Kossifidis | 2bed03e | 2009-04-30 15:55:49 -0400 | [diff] [blame] | 1750 | } else |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1751 | ds->ds_link = 0; |
Nick Kossifidis | 2bed03e | 2009-04-30 15:55:49 -0400 | [diff] [blame] | 1752 | |
| 1753 | /* |
| 1754 | * If we use multiple antennas on AP and use |
| 1755 | * the Sectored AP scenario, switch antenna every |
| 1756 | * 4 beacons to make sure everybody hears our AP. |
| 1757 | * When a client tries to associate, hw will keep |
| 1758 | * track of the tx antenna to be used for this client |
Pavel Roskin | 6a2a0e7 | 2011-07-09 00:17:51 -0400 | [diff] [blame] | 1759 | * automatically, based on ACKed packets. |
Nick Kossifidis | 2bed03e | 2009-04-30 15:55:49 -0400 | [diff] [blame] | 1760 | * |
| 1761 | * Note: AP still listens and transmits RTS on the |
| 1762 | * default antenna which is supposed to be an omni. |
| 1763 | * |
| 1764 | * Note2: On sectored scenarios it's possible to have |
Bob Copeland | a180a13 | 2010-08-15 13:03:12 -0400 | [diff] [blame] | 1765 | * multiple antennas (1 omni -- the default -- and 14 |
| 1766 | * sectors), so if we choose to actually support this |
| 1767 | * mode, we need to allow the user to set how many antennas |
| 1768 | * we have and tweak the code below to send beacons |
| 1769 | * on all of them. |
Nick Kossifidis | 2bed03e | 2009-04-30 15:55:49 -0400 | [diff] [blame] | 1770 | */ |
| 1771 | if (ah->ah_ant_mode == AR5K_ANTMODE_SECTOR_AP) |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1772 | antenna = ah->bsent & 4 ? 2 : 1; |
Nick Kossifidis | 2bed03e | 2009-04-30 15:55:49 -0400 | [diff] [blame] | 1773 | |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1774 | |
Nick Kossifidis | 8f655dd | 2009-03-15 22:20:35 +0200 | [diff] [blame] | 1775 | /* FIXME: If we are in g mode and rate is a CCK rate |
| 1776 | * subtract ah->ah_txpower.txp_cck_ofdm_pwr_delta |
| 1777 | * from tx power (value is in dB units already) */ |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1778 | ds->ds_data = bf->skbaddr; |
Bruno Randolf | 281c56d | 2008-02-05 18:44:55 +0900 | [diff] [blame] | 1779 | ret = ah->ah_setup_tx_desc(ah, ds, skb->len, |
Benoit Papillault | 8127fbd | 2010-02-27 23:05:26 +0100 | [diff] [blame] | 1780 | ieee80211_get_hdrlen_from_skb(skb), padsize, |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1781 | AR5K_PKT_TYPE_BEACON, (ah->power_level * 2), |
| 1782 | ieee80211_get_tx_rate(ah->hw, info)->hw_value, |
Johannes Berg | 2e92e6f | 2008-05-15 12:55:27 +0200 | [diff] [blame] | 1783 | 1, AR5K_TXKEYIX_INVALID, |
Luis R. Rodriguez | 400ec45 | 2008-02-03 21:51:49 -0500 | [diff] [blame] | 1784 | antenna, flags, 0, 0); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1785 | if (ret) |
| 1786 | goto err_unmap; |
| 1787 | |
| 1788 | return 0; |
| 1789 | err_unmap: |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1790 | dma_unmap_single(ah->dev, bf->skbaddr, skb->len, DMA_TO_DEVICE); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1791 | return ret; |
| 1792 | } |
| 1793 | |
| 1794 | /* |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 1795 | * Updates the beacon that is sent by ath5k_beacon_send. For adhoc, |
| 1796 | * this is called only once at config_bss time, for AP we do it every |
| 1797 | * SWBA interrupt so that the TIM will reflect buffered frames. |
| 1798 | * |
| 1799 | * Called with the beacon lock. |
| 1800 | */ |
Bruno Randolf | cd2c548 | 2010-12-22 19:20:32 +0900 | [diff] [blame] | 1801 | int |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 1802 | ath5k_beacon_update(struct ieee80211_hw *hw, struct ieee80211_vif *vif) |
| 1803 | { |
| 1804 | int ret; |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1805 | struct ath5k_hw *ah = hw->priv; |
Ben Greear | b1ae1ed | 2010-09-30 12:22:58 -0700 | [diff] [blame] | 1806 | struct ath5k_vif *avf = (void *)vif->drv_priv; |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 1807 | struct sk_buff *skb; |
| 1808 | |
| 1809 | if (WARN_ON(!vif)) { |
| 1810 | ret = -EINVAL; |
| 1811 | goto out; |
| 1812 | } |
| 1813 | |
| 1814 | skb = ieee80211_beacon_get(hw, vif); |
| 1815 | |
| 1816 | if (!skb) { |
| 1817 | ret = -ENOMEM; |
| 1818 | goto out; |
| 1819 | } |
| 1820 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1821 | ath5k_txbuf_free_skb(ah, avf->bbuf); |
Ben Greear | b1ae1ed | 2010-09-30 12:22:58 -0700 | [diff] [blame] | 1822 | avf->bbuf->skb = skb; |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1823 | ret = ath5k_beacon_setup(ah, avf->bbuf); |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 1824 | out: |
| 1825 | return ret; |
| 1826 | } |
| 1827 | |
| 1828 | /* |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1829 | * Transmit a beacon frame at SWBA. Dynamic updates to the |
| 1830 | * frame contents are done as needed and the slot time is |
| 1831 | * also adjusted based on current state. |
| 1832 | * |
Bob Copeland | 5faaff7 | 2010-07-13 11:32:40 -0400 | [diff] [blame] | 1833 | * This is called from software irq context (beacontq tasklets) |
| 1834 | * or user context from ath5k_beacon_config. |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1835 | */ |
| 1836 | static void |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1837 | ath5k_beacon_send(struct ath5k_hw *ah) |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1838 | { |
Ben Greear | b1ae1ed | 2010-09-30 12:22:58 -0700 | [diff] [blame] | 1839 | struct ieee80211_vif *vif; |
| 1840 | struct ath5k_vif *avf; |
| 1841 | struct ath5k_buf *bf; |
Bob Copeland | cec8db2 | 2009-07-04 12:59:51 -0400 | [diff] [blame] | 1842 | struct sk_buff *skb; |
Bob Copeland | bdc71bc | 2011-08-07 19:36:07 -0400 | [diff] [blame] | 1843 | int err; |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1844 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1845 | ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_BEACON, "in beacon_send\n"); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1846 | |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1847 | /* |
| 1848 | * Check if the previous beacon has gone out. If |
Bob Copeland | a180a13 | 2010-08-15 13:03:12 -0400 | [diff] [blame] | 1849 | * not, don't don't try to post another: skip this |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1850 | * period and wait for the next. Missed beacons |
| 1851 | * indicate a problem and should not occur. If we |
| 1852 | * miss too many consecutive beacons reset the device. |
| 1853 | */ |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1854 | if (unlikely(ath5k_hw_num_tx_pending(ah, ah->bhalq) != 0)) { |
| 1855 | ah->bmisscount++; |
| 1856 | ATH5K_DBG(ah, ATH5K_DEBUG_BEACON, |
| 1857 | "missed %u consecutive beacons\n", ah->bmisscount); |
| 1858 | if (ah->bmisscount > 10) { /* NB: 10 is a guess */ |
| 1859 | ATH5K_DBG(ah, ATH5K_DEBUG_BEACON, |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1860 | "stuck beacon time (%u missed)\n", |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1861 | ah->bmisscount); |
| 1862 | ATH5K_DBG(ah, ATH5K_DEBUG_RESET, |
Bruno Randolf | 8d67a03 | 2010-06-16 19:11:12 +0900 | [diff] [blame] | 1863 | "stuck beacon, resetting\n"); |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1864 | ieee80211_queue_work(ah->hw, &ah->reset_work); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1865 | } |
| 1866 | return; |
| 1867 | } |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1868 | if (unlikely(ah->bmisscount != 0)) { |
| 1869 | ATH5K_DBG(ah, ATH5K_DEBUG_BEACON, |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1870 | "resume beacon xmit after %u misses\n", |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1871 | ah->bmisscount); |
| 1872 | ah->bmisscount = 0; |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1873 | } |
| 1874 | |
Chun-Yeow Yeoh | da473b6 | 2012-03-03 09:48:56 +0800 | [diff] [blame] | 1875 | if ((ah->opmode == NL80211_IFTYPE_AP && ah->num_ap_vifs + |
| 1876 | ah->num_mesh_vifs > 1) || |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1877 | ah->opmode == NL80211_IFTYPE_MESH_POINT) { |
Ben Greear | b1ae1ed | 2010-09-30 12:22:58 -0700 | [diff] [blame] | 1878 | u64 tsf = ath5k_hw_get_tsf64(ah); |
| 1879 | u32 tsftu = TSF_TO_TU(tsf); |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1880 | int slot = ((tsftu % ah->bintval) * ATH_BCBUF) / ah->bintval; |
| 1881 | vif = ah->bslot[(slot + 1) % ATH_BCBUF]; |
| 1882 | ATH5K_DBG(ah, ATH5K_DEBUG_BEACON, |
Ben Greear | b1ae1ed | 2010-09-30 12:22:58 -0700 | [diff] [blame] | 1883 | "tsf %llx tsftu %x intval %u slot %u vif %p\n", |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1884 | (unsigned long long)tsf, tsftu, ah->bintval, slot, vif); |
Ben Greear | b1ae1ed | 2010-09-30 12:22:58 -0700 | [diff] [blame] | 1885 | } else /* only one interface */ |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1886 | vif = ah->bslot[0]; |
Ben Greear | b1ae1ed | 2010-09-30 12:22:58 -0700 | [diff] [blame] | 1887 | |
| 1888 | if (!vif) |
| 1889 | return; |
| 1890 | |
| 1891 | avf = (void *)vif->drv_priv; |
| 1892 | bf = avf->bbuf; |
Ben Greear | b1ae1ed | 2010-09-30 12:22:58 -0700 | [diff] [blame] | 1893 | |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1894 | /* |
| 1895 | * Stop any current dma and put the new frame on the queue. |
| 1896 | * This should never fail since we check above that no frames |
| 1897 | * are still pending on the queue. |
| 1898 | */ |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1899 | if (unlikely(ath5k_hw_stop_beacon_queue(ah, ah->bhalq))) { |
| 1900 | ATH5K_WARN(ah, "beacon queue %u didn't start/stop ?\n", ah->bhalq); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1901 | /* NB: hw still stops DMA, so proceed */ |
| 1902 | } |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1903 | |
Javier Cardona | d82b577 | 2010-12-07 13:35:55 -0800 | [diff] [blame] | 1904 | /* refresh the beacon for AP or MESH mode */ |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1905 | if (ah->opmode == NL80211_IFTYPE_AP || |
Bob Copeland | bdc71bc | 2011-08-07 19:36:07 -0400 | [diff] [blame] | 1906 | ah->opmode == NL80211_IFTYPE_MESH_POINT) { |
| 1907 | err = ath5k_beacon_update(ah->hw, vif); |
| 1908 | if (err) |
| 1909 | return; |
| 1910 | } |
| 1911 | |
| 1912 | if (unlikely(bf->skb == NULL || ah->opmode == NL80211_IFTYPE_STATION || |
| 1913 | ah->opmode == NL80211_IFTYPE_MONITOR)) { |
| 1914 | ATH5K_WARN(ah, "bf=%p bf_skb=%p\n", bf, bf->skb); |
| 1915 | return; |
| 1916 | } |
Bob Copeland | 1071db8 | 2009-05-18 10:59:52 -0400 | [diff] [blame] | 1917 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1918 | trace_ath5k_tx(ah, bf->skb, &ah->txqs[ah->bhalq]); |
Bob Copeland | 0e47225 | 2011-01-24 23:32:55 -0500 | [diff] [blame] | 1919 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1920 | ath5k_hw_set_txdp(ah, ah->bhalq, bf->daddr); |
| 1921 | ath5k_hw_start_tx_dma(ah, ah->bhalq); |
| 1922 | ATH5K_DBG(ah, ATH5K_DEBUG_BEACON, "TXDP[%u] = %llx (%p)\n", |
| 1923 | ah->bhalq, (unsigned long long)bf->daddr, bf->desc); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1924 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1925 | skb = ieee80211_get_buffered_bc(ah->hw, vif); |
Bob Copeland | cec8db2 | 2009-07-04 12:59:51 -0400 | [diff] [blame] | 1926 | while (skb) { |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1927 | ath5k_tx_queue(ah->hw, skb, ah->cabq); |
Felix Fietkau | 4e86879 | 2011-07-12 09:02:05 +0800 | [diff] [blame] | 1928 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1929 | if (ah->cabq->txq_len >= ah->cabq->txq_max) |
Felix Fietkau | 4e86879 | 2011-07-12 09:02:05 +0800 | [diff] [blame] | 1930 | break; |
| 1931 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1932 | skb = ieee80211_get_buffered_bc(ah->hw, vif); |
Bob Copeland | cec8db2 | 2009-07-04 12:59:51 -0400 | [diff] [blame] | 1933 | } |
| 1934 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1935 | ah->bsent++; |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1936 | } |
| 1937 | |
Bruno Randolf | 9804b98 | 2008-01-19 18:17:59 +0900 | [diff] [blame] | 1938 | /** |
| 1939 | * ath5k_beacon_update_timers - update beacon timers |
| 1940 | * |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1941 | * @ah: struct ath5k_hw pointer we are operating on |
Bruno Randolf | 9804b98 | 2008-01-19 18:17:59 +0900 | [diff] [blame] | 1942 | * @bc_tsf: the timestamp of the beacon. 0 to reset the TSF. -1 to perform a |
| 1943 | * beacon timer update based on the current HW TSF. |
| 1944 | * |
| 1945 | * Calculate the next target beacon transmit time (TBTT) based on the timestamp |
| 1946 | * of a received beacon or the current local hardware TSF and write it to the |
| 1947 | * beacon timer registers. |
| 1948 | * |
| 1949 | * This is called in a variety of situations, e.g. when a beacon is received, |
Bruno Randolf | 6ba81c2 | 2008-03-05 18:36:26 +0900 | [diff] [blame] | 1950 | * when a TSF update has been detected, but also when an new IBSS is created or |
Bruno Randolf | 9804b98 | 2008-01-19 18:17:59 +0900 | [diff] [blame] | 1951 | * when we otherwise know we have to update the timers, but we keep it in this |
| 1952 | * function to have it all together in one place. |
| 1953 | */ |
Bruno Randolf | cd2c548 | 2010-12-22 19:20:32 +0900 | [diff] [blame] | 1954 | void |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1955 | ath5k_beacon_update_timers(struct ath5k_hw *ah, u64 bc_tsf) |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1956 | { |
Bruno Randolf | 9804b98 | 2008-01-19 18:17:59 +0900 | [diff] [blame] | 1957 | u32 nexttbtt, intval, hw_tu, bc_tu; |
| 1958 | u64 hw_tsf; |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1959 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1960 | intval = ah->bintval & AR5K_BEACON_PERIOD; |
Chun-Yeow Yeoh | da473b6 | 2012-03-03 09:48:56 +0800 | [diff] [blame] | 1961 | if (ah->opmode == NL80211_IFTYPE_AP && ah->num_ap_vifs |
| 1962 | + ah->num_mesh_vifs > 1) { |
Ben Greear | b1ae1ed | 2010-09-30 12:22:58 -0700 | [diff] [blame] | 1963 | intval /= ATH_BCBUF; /* staggered multi-bss beacons */ |
| 1964 | if (intval < 15) |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 1965 | ATH5K_WARN(ah, "intval %u is too low, min 15\n", |
Ben Greear | b1ae1ed | 2010-09-30 12:22:58 -0700 | [diff] [blame] | 1966 | intval); |
| 1967 | } |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1968 | if (WARN_ON(!intval)) |
| 1969 | return; |
| 1970 | |
Bruno Randolf | 9804b98 | 2008-01-19 18:17:59 +0900 | [diff] [blame] | 1971 | /* beacon TSF converted to TU */ |
| 1972 | bc_tu = TSF_TO_TU(bc_tsf); |
| 1973 | |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1974 | /* current TSF converted to TU */ |
Bruno Randolf | 9804b98 | 2008-01-19 18:17:59 +0900 | [diff] [blame] | 1975 | hw_tsf = ath5k_hw_get_tsf64(ah); |
| 1976 | hw_tu = TSF_TO_TU(hw_tsf); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 1977 | |
Pavel Roskin | 633d006 | 2011-07-07 18:14:01 -0400 | [diff] [blame] | 1978 | #define FUDGE (AR5K_TUNE_SW_BEACON_RESP + 3) |
Bruno Randolf | 11f21df | 2010-09-27 12:22:26 +0900 | [diff] [blame] | 1979 | /* We use FUDGE to make sure the next TBTT is ahead of the current TU. |
Lucas De Marchi | 25985ed | 2011-03-30 22:57:33 -0300 | [diff] [blame] | 1980 | * Since we later subtract AR5K_TUNE_SW_BEACON_RESP (10) in the timer |
Bruno Randolf | 11f21df | 2010-09-27 12:22:26 +0900 | [diff] [blame] | 1981 | * configuration we need to make sure it is bigger than that. */ |
| 1982 | |
Bruno Randolf | 9804b98 | 2008-01-19 18:17:59 +0900 | [diff] [blame] | 1983 | if (bc_tsf == -1) { |
| 1984 | /* |
| 1985 | * no beacons received, called internally. |
| 1986 | * just need to refresh timers based on HW TSF. |
| 1987 | */ |
| 1988 | nexttbtt = roundup(hw_tu + FUDGE, intval); |
| 1989 | } else if (bc_tsf == 0) { |
| 1990 | /* |
| 1991 | * no beacon received, probably called by ath5k_reset_tsf(). |
| 1992 | * reset TSF to start with 0. |
| 1993 | */ |
| 1994 | nexttbtt = intval; |
| 1995 | intval |= AR5K_BEACON_RESET_TSF; |
| 1996 | } else if (bc_tsf > hw_tsf) { |
| 1997 | /* |
Lucas De Marchi | 25985ed | 2011-03-30 22:57:33 -0300 | [diff] [blame] | 1998 | * beacon received, SW merge happened but HW TSF not yet updated. |
Bruno Randolf | 9804b98 | 2008-01-19 18:17:59 +0900 | [diff] [blame] | 1999 | * not possible to reconfigure timers yet, but next time we |
| 2000 | * receive a beacon with the same BSSID, the hardware will |
| 2001 | * automatically update the TSF and then we need to reconfigure |
| 2002 | * the timers. |
| 2003 | */ |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2004 | ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_BEACON, |
Bruno Randolf | 9804b98 | 2008-01-19 18:17:59 +0900 | [diff] [blame] | 2005 | "need to wait for HW TSF sync\n"); |
| 2006 | return; |
| 2007 | } else { |
| 2008 | /* |
| 2009 | * most important case for beacon synchronization between STA. |
| 2010 | * |
| 2011 | * beacon received and HW TSF has been already updated by HW. |
| 2012 | * update next TBTT based on the TSF of the beacon, but make |
| 2013 | * sure it is ahead of our local TSF timer. |
| 2014 | */ |
| 2015 | nexttbtt = bc_tu + roundup(hw_tu + FUDGE - bc_tu, intval); |
| 2016 | } |
| 2017 | #undef FUDGE |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 2018 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2019 | ah->nexttbtt = nexttbtt; |
Bruno Randolf | 036cd1e | 2008-01-19 18:18:21 +0900 | [diff] [blame] | 2020 | |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 2021 | intval |= AR5K_BEACON_ENA; |
Nick Kossifidis | c47faa3 | 2011-11-25 20:40:25 +0200 | [diff] [blame] | 2022 | ath5k_hw_init_beacon_timers(ah, nexttbtt, intval); |
Bruno Randolf | 9804b98 | 2008-01-19 18:17:59 +0900 | [diff] [blame] | 2023 | |
| 2024 | /* |
| 2025 | * debugging output last in order to preserve the time critical aspect |
| 2026 | * of this function |
| 2027 | */ |
| 2028 | if (bc_tsf == -1) |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2029 | ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_BEACON, |
Bruno Randolf | 9804b98 | 2008-01-19 18:17:59 +0900 | [diff] [blame] | 2030 | "reconfigured timers based on HW TSF\n"); |
| 2031 | else if (bc_tsf == 0) |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2032 | ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_BEACON, |
Bruno Randolf | 9804b98 | 2008-01-19 18:17:59 +0900 | [diff] [blame] | 2033 | "reset HW TSF and timers\n"); |
| 2034 | else |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2035 | ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_BEACON, |
Bruno Randolf | 9804b98 | 2008-01-19 18:17:59 +0900 | [diff] [blame] | 2036 | "updated timers based on beacon TSF\n"); |
| 2037 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2038 | ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_BEACON, |
David Miller | 04f93a8 | 2008-02-15 16:08:59 -0800 | [diff] [blame] | 2039 | "bc_tsf %llx hw_tsf %llx bc_tu %u hw_tu %u nexttbtt %u\n", |
| 2040 | (unsigned long long) bc_tsf, |
| 2041 | (unsigned long long) hw_tsf, bc_tu, hw_tu, nexttbtt); |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2042 | ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_BEACON, "intval %u %s %s\n", |
Bruno Randolf | 9804b98 | 2008-01-19 18:17:59 +0900 | [diff] [blame] | 2043 | intval & AR5K_BEACON_PERIOD, |
| 2044 | intval & AR5K_BEACON_ENA ? "AR5K_BEACON_ENA" : "", |
| 2045 | intval & AR5K_BEACON_RESET_TSF ? "AR5K_BEACON_RESET_TSF" : ""); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 2046 | } |
| 2047 | |
Bruno Randolf | 036cd1e | 2008-01-19 18:18:21 +0900 | [diff] [blame] | 2048 | /** |
| 2049 | * ath5k_beacon_config - Configure the beacon queues and interrupts |
| 2050 | * |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2051 | * @ah: struct ath5k_hw pointer we are operating on |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 2052 | * |
Bruno Randolf | 036cd1e | 2008-01-19 18:18:21 +0900 | [diff] [blame] | 2053 | * In IBSS mode we use a self-linked tx descriptor if possible. We enable SWBA |
Bruno Randolf | 6ba81c2 | 2008-03-05 18:36:26 +0900 | [diff] [blame] | 2054 | * interrupts to detect TSF updates only. |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 2055 | */ |
Bruno Randolf | cd2c548 | 2010-12-22 19:20:32 +0900 | [diff] [blame] | 2056 | void |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2057 | ath5k_beacon_config(struct ath5k_hw *ah) |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 2058 | { |
Bob Copeland | b5f0395 | 2009-02-15 12:06:10 -0500 | [diff] [blame] | 2059 | unsigned long flags; |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 2060 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2061 | spin_lock_irqsave(&ah->block, flags); |
| 2062 | ah->bmisscount = 0; |
| 2063 | ah->imask &= ~(AR5K_INT_BMISS | AR5K_INT_SWBA); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 2064 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2065 | if (ah->enable_beacon) { |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 2066 | /* |
Bruno Randolf | 036cd1e | 2008-01-19 18:18:21 +0900 | [diff] [blame] | 2067 | * In IBSS mode we use a self-linked tx descriptor and let the |
| 2068 | * hardware send the beacons automatically. We have to load it |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 2069 | * only once here. |
Bruno Randolf | 036cd1e | 2008-01-19 18:18:21 +0900 | [diff] [blame] | 2070 | * We use the SWBA interrupt only to keep track of the beacon |
Bruno Randolf | 6ba81c2 | 2008-03-05 18:36:26 +0900 | [diff] [blame] | 2071 | * timers in order to detect automatic TSF updates. |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 2072 | */ |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2073 | ath5k_beaconq_config(ah); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 2074 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2075 | ah->imask |= AR5K_INT_SWBA; |
Bruno Randolf | 036cd1e | 2008-01-19 18:18:21 +0900 | [diff] [blame] | 2076 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2077 | if (ah->opmode == NL80211_IFTYPE_ADHOC) { |
Bob Copeland | 2180049 | 2009-07-04 12:59:52 -0400 | [diff] [blame] | 2078 | if (ath5k_hw_hasveol(ah)) |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2079 | ath5k_beacon_send(ah); |
Jiri Slaby | da966bc | 2008-10-12 22:54:10 +0200 | [diff] [blame] | 2080 | } else |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2081 | ath5k_beacon_update_timers(ah, -1); |
Bob Copeland | 2180049 | 2009-07-04 12:59:52 -0400 | [diff] [blame] | 2082 | } else { |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2083 | ath5k_hw_stop_beacon_queue(ah, ah->bhalq); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 2084 | } |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 2085 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2086 | ath5k_hw_set_imr(ah, ah->imask); |
Bob Copeland | 2180049 | 2009-07-04 12:59:52 -0400 | [diff] [blame] | 2087 | mmiowb(); |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2088 | spin_unlock_irqrestore(&ah->block, flags); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 2089 | } |
| 2090 | |
Nick Kossifidis | 428cbd4 | 2009-04-30 15:55:47 -0400 | [diff] [blame] | 2091 | static void ath5k_tasklet_beacon(unsigned long data) |
| 2092 | { |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2093 | struct ath5k_hw *ah = (struct ath5k_hw *) data; |
Nick Kossifidis | 428cbd4 | 2009-04-30 15:55:47 -0400 | [diff] [blame] | 2094 | |
| 2095 | /* |
| 2096 | * Software beacon alert--time to send a beacon. |
| 2097 | * |
| 2098 | * In IBSS mode we use this interrupt just to |
| 2099 | * keep track of the next TBTT (target beacon |
Pavel Roskin | 6a2a0e7 | 2011-07-09 00:17:51 -0400 | [diff] [blame] | 2100 | * transmission time) in order to detect whether |
Nick Kossifidis | 428cbd4 | 2009-04-30 15:55:47 -0400 | [diff] [blame] | 2101 | * automatic TSF updates happened. |
| 2102 | */ |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2103 | if (ah->opmode == NL80211_IFTYPE_ADHOC) { |
Pavel Roskin | 6a2a0e7 | 2011-07-09 00:17:51 -0400 | [diff] [blame] | 2104 | /* XXX: only if VEOL supported */ |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2105 | u64 tsf = ath5k_hw_get_tsf64(ah); |
| 2106 | ah->nexttbtt += ah->bintval; |
| 2107 | ATH5K_DBG(ah, ATH5K_DEBUG_BEACON, |
Nick Kossifidis | 428cbd4 | 2009-04-30 15:55:47 -0400 | [diff] [blame] | 2108 | "SWBA nexttbtt: %x hw_tu: %x " |
| 2109 | "TSF: %llx\n", |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2110 | ah->nexttbtt, |
Nick Kossifidis | 428cbd4 | 2009-04-30 15:55:47 -0400 | [diff] [blame] | 2111 | TSF_TO_TU(tsf), |
| 2112 | (unsigned long long) tsf); |
| 2113 | } else { |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2114 | spin_lock(&ah->block); |
| 2115 | ath5k_beacon_send(ah); |
| 2116 | spin_unlock(&ah->block); |
Nick Kossifidis | 428cbd4 | 2009-04-30 15:55:47 -0400 | [diff] [blame] | 2117 | } |
| 2118 | } |
| 2119 | |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 2120 | |
| 2121 | /********************\ |
| 2122 | * Interrupt handling * |
| 2123 | \********************/ |
| 2124 | |
Bruno Randolf | 6a8a3f6 | 2010-03-25 14:49:19 +0900 | [diff] [blame] | 2125 | static void |
| 2126 | ath5k_intr_calibration_poll(struct ath5k_hw *ah) |
| 2127 | { |
Bruno Randolf | 2111ac0 | 2010-04-02 18:44:08 +0900 | [diff] [blame] | 2128 | if (time_is_before_eq_jiffies(ah->ah_cal_next_ani) && |
Nick Kossifidis | ce169ac | 2011-11-25 20:40:23 +0200 | [diff] [blame] | 2129 | !(ah->ah_cal_mask & AR5K_CALIBRATION_FULL) && |
| 2130 | !(ah->ah_cal_mask & AR5K_CALIBRATION_SHORT)) { |
| 2131 | |
| 2132 | /* Run ANI only when calibration is not active */ |
| 2133 | |
Bruno Randolf | 2111ac0 | 2010-04-02 18:44:08 +0900 | [diff] [blame] | 2134 | ah->ah_cal_next_ani = jiffies + |
| 2135 | msecs_to_jiffies(ATH5K_TUNE_CALIBRATION_INTERVAL_ANI); |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2136 | tasklet_schedule(&ah->ani_tasklet); |
Bruno Randolf | 2111ac0 | 2010-04-02 18:44:08 +0900 | [diff] [blame] | 2137 | |
Nick Kossifidis | ce169ac | 2011-11-25 20:40:23 +0200 | [diff] [blame] | 2138 | } else if (time_is_before_eq_jiffies(ah->ah_cal_next_short) && |
| 2139 | !(ah->ah_cal_mask & AR5K_CALIBRATION_FULL) && |
| 2140 | !(ah->ah_cal_mask & AR5K_CALIBRATION_SHORT)) { |
| 2141 | |
| 2142 | /* Run calibration only when another calibration |
| 2143 | * is not running. |
| 2144 | * |
| 2145 | * Note: This is for both full/short calibration, |
| 2146 | * if it's time for a full one, ath5k_calibrate_work will deal |
| 2147 | * with it. */ |
| 2148 | |
| 2149 | ah->ah_cal_next_short = jiffies + |
| 2150 | msecs_to_jiffies(ATH5K_TUNE_CALIBRATION_INTERVAL_SHORT); |
| 2151 | ieee80211_queue_work(ah->hw, &ah->calib_work); |
Bruno Randolf | 6a8a3f6 | 2010-03-25 14:49:19 +0900 | [diff] [blame] | 2152 | } |
| 2153 | /* we could use SWI to generate enough interrupts to meet our |
| 2154 | * calibration interval requirements, if necessary: |
| 2155 | * AR5K_REG_ENABLE_BITS(ah, AR5K_CR, AR5K_CR_SWI); */ |
| 2156 | } |
| 2157 | |
Felix Fietkau | c266c71 | 2011-04-10 18:32:19 +0200 | [diff] [blame] | 2158 | static void |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2159 | ath5k_schedule_rx(struct ath5k_hw *ah) |
Felix Fietkau | c266c71 | 2011-04-10 18:32:19 +0200 | [diff] [blame] | 2160 | { |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2161 | ah->rx_pending = true; |
| 2162 | tasklet_schedule(&ah->rxtq); |
Felix Fietkau | c266c71 | 2011-04-10 18:32:19 +0200 | [diff] [blame] | 2163 | } |
| 2164 | |
| 2165 | static void |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2166 | ath5k_schedule_tx(struct ath5k_hw *ah) |
Felix Fietkau | c266c71 | 2011-04-10 18:32:19 +0200 | [diff] [blame] | 2167 | { |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2168 | ah->tx_pending = true; |
| 2169 | tasklet_schedule(&ah->txtq); |
Felix Fietkau | c266c71 | 2011-04-10 18:32:19 +0200 | [diff] [blame] | 2170 | } |
| 2171 | |
Pavel Roskin | f5cbc8b | 2011-06-15 18:03:22 -0400 | [diff] [blame] | 2172 | static irqreturn_t |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 2173 | ath5k_intr(int irq, void *dev_id) |
| 2174 | { |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2175 | struct ath5k_hw *ah = dev_id; |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 2176 | enum ath5k_int status; |
| 2177 | unsigned int counter = 1000; |
| 2178 | |
Nick Kossifidis | 34ce644 | 2011-11-25 20:40:22 +0200 | [diff] [blame] | 2179 | |
| 2180 | /* |
| 2181 | * If hw is not ready (or detached) and we get an |
| 2182 | * interrupt, or if we have no interrupts pending |
| 2183 | * (that means it's not for us) skip it. |
| 2184 | * |
| 2185 | * NOTE: Group 0/1 PCI interface registers are not |
| 2186 | * supported on WiSOCs, so we can't check for pending |
| 2187 | * interrupts (ISR belongs to another register group |
| 2188 | * so we are ok). |
| 2189 | */ |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2190 | if (unlikely(test_bit(ATH_STAT_INVALID, ah->status) || |
Nick Kossifidis | 34ce644 | 2011-11-25 20:40:22 +0200 | [diff] [blame] | 2191 | ((ath5k_get_bus_type(ah) != ATH_AHB) && |
| 2192 | !ath5k_hw_is_intr_pending(ah)))) |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 2193 | return IRQ_NONE; |
| 2194 | |
Nick Kossifidis | 34ce644 | 2011-11-25 20:40:22 +0200 | [diff] [blame] | 2195 | /** Main loop **/ |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 2196 | do { |
Nick Kossifidis | 34ce644 | 2011-11-25 20:40:22 +0200 | [diff] [blame] | 2197 | ath5k_hw_get_isr(ah, &status); /* NB: clears IRQ too */ |
| 2198 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2199 | ATH5K_DBG(ah, ATH5K_DEBUG_INTR, "status 0x%x/0x%x\n", |
| 2200 | status, ah->imask); |
Nick Kossifidis | 34ce644 | 2011-11-25 20:40:22 +0200 | [diff] [blame] | 2201 | |
| 2202 | /* |
| 2203 | * Fatal hw error -> Log and reset |
| 2204 | * |
| 2205 | * Fatal errors are unrecoverable so we have to |
| 2206 | * reset the card. These errors include bus and |
| 2207 | * dma errors. |
| 2208 | */ |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 2209 | if (unlikely(status & AR5K_INT_FATAL)) { |
Nick Kossifidis | 34ce644 | 2011-11-25 20:40:22 +0200 | [diff] [blame] | 2210 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2211 | ATH5K_DBG(ah, ATH5K_DEBUG_RESET, |
Bruno Randolf | 8d67a03 | 2010-06-16 19:11:12 +0900 | [diff] [blame] | 2212 | "fatal int, resetting\n"); |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2213 | ieee80211_queue_work(ah->hw, &ah->reset_work); |
Nick Kossifidis | 34ce644 | 2011-11-25 20:40:22 +0200 | [diff] [blame] | 2214 | |
| 2215 | /* |
| 2216 | * RX Overrun -> Count and reset if needed |
| 2217 | * |
| 2218 | * Receive buffers are full. Either the bus is busy or |
| 2219 | * the CPU is not fast enough to process all received |
| 2220 | * frames. |
| 2221 | */ |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 2222 | } else if (unlikely(status & AR5K_INT_RXORN)) { |
Nick Kossifidis | 34ce644 | 2011-11-25 20:40:22 +0200 | [diff] [blame] | 2223 | |
Bruno Randolf | 87d77c4 | 2010-04-12 16:38:52 +0900 | [diff] [blame] | 2224 | /* |
Bruno Randolf | 87d77c4 | 2010-04-12 16:38:52 +0900 | [diff] [blame] | 2225 | * Older chipsets need a reset to come out of this |
| 2226 | * condition, but we treat it as RX for newer chips. |
Nick Kossifidis | 34ce644 | 2011-11-25 20:40:22 +0200 | [diff] [blame] | 2227 | * We don't know exactly which versions need a reset |
Bruno Randolf | 87d77c4 | 2010-04-12 16:38:52 +0900 | [diff] [blame] | 2228 | * this guess is copied from the HAL. |
| 2229 | */ |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2230 | ah->stats.rxorn_intr++; |
Nick Kossifidis | 34ce644 | 2011-11-25 20:40:22 +0200 | [diff] [blame] | 2231 | |
Bruno Randolf | 8d67a03 | 2010-06-16 19:11:12 +0900 | [diff] [blame] | 2232 | if (ah->ah_mac_srev < AR5K_SREV_AR5212) { |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2233 | ATH5K_DBG(ah, ATH5K_DEBUG_RESET, |
Bruno Randolf | 8d67a03 | 2010-06-16 19:11:12 +0900 | [diff] [blame] | 2234 | "rx overrun, resetting\n"); |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2235 | ieee80211_queue_work(ah->hw, &ah->reset_work); |
Pavel Roskin | d2c7f77 | 2011-07-07 18:14:07 -0400 | [diff] [blame] | 2236 | } else |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2237 | ath5k_schedule_rx(ah); |
Nick Kossifidis | 34ce644 | 2011-11-25 20:40:22 +0200 | [diff] [blame] | 2238 | |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 2239 | } else { |
Nick Kossifidis | 34ce644 | 2011-11-25 20:40:22 +0200 | [diff] [blame] | 2240 | |
| 2241 | /* Software Beacon Alert -> Schedule beacon tasklet */ |
Pavel Roskin | d2c7f77 | 2011-07-07 18:14:07 -0400 | [diff] [blame] | 2242 | if (status & AR5K_INT_SWBA) |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2243 | tasklet_hi_schedule(&ah->beacontq); |
Pavel Roskin | d2c7f77 | 2011-07-07 18:14:07 -0400 | [diff] [blame] | 2244 | |
Nick Kossifidis | 34ce644 | 2011-11-25 20:40:22 +0200 | [diff] [blame] | 2245 | /* |
| 2246 | * No more RX descriptors -> Just count |
| 2247 | * |
| 2248 | * NB: the hardware should re-read the link when |
| 2249 | * RXE bit is written, but it doesn't work at |
| 2250 | * least on older hardware revs. |
| 2251 | */ |
| 2252 | if (status & AR5K_INT_RXEOL) |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2253 | ah->stats.rxeol_intr++; |
Nick Kossifidis | 34ce644 | 2011-11-25 20:40:22 +0200 | [diff] [blame] | 2254 | |
| 2255 | |
| 2256 | /* TX Underrun -> Bump tx trigger level */ |
| 2257 | if (status & AR5K_INT_TXURN) |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 2258 | ath5k_hw_update_tx_triglevel(ah, true); |
Nick Kossifidis | 34ce644 | 2011-11-25 20:40:22 +0200 | [diff] [blame] | 2259 | |
| 2260 | /* RX -> Schedule rx tasklet */ |
Nick Kossifidis | 4c674c6 | 2008-10-26 20:40:25 +0200 | [diff] [blame] | 2261 | if (status & (AR5K_INT_RXOK | AR5K_INT_RXERR)) |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2262 | ath5k_schedule_rx(ah); |
Nick Kossifidis | 34ce644 | 2011-11-25 20:40:22 +0200 | [diff] [blame] | 2263 | |
| 2264 | /* TX -> Schedule tx tasklet */ |
| 2265 | if (status & (AR5K_INT_TXOK |
| 2266 | | AR5K_INT_TXDESC |
| 2267 | | AR5K_INT_TXERR |
| 2268 | | AR5K_INT_TXEOL)) |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2269 | ath5k_schedule_tx(ah); |
Nick Kossifidis | 34ce644 | 2011-11-25 20:40:22 +0200 | [diff] [blame] | 2270 | |
| 2271 | /* Missed beacon -> TODO |
| 2272 | if (status & AR5K_INT_BMISS) |
| 2273 | */ |
| 2274 | |
| 2275 | /* MIB event -> Update counters and notify ANI */ |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 2276 | if (status & AR5K_INT_MIB) { |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2277 | ah->stats.mib_intr++; |
Bruno Randolf | 495391d | 2010-03-25 14:49:36 +0900 | [diff] [blame] | 2278 | ath5k_hw_update_mib_counters(ah); |
Bruno Randolf | 2111ac0 | 2010-04-02 18:44:08 +0900 | [diff] [blame] | 2279 | ath5k_ani_mib_intr(ah); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 2280 | } |
Nick Kossifidis | 34ce644 | 2011-11-25 20:40:22 +0200 | [diff] [blame] | 2281 | |
| 2282 | /* GPIO -> Notify RFKill layer */ |
Tobias Doerffel | e6a3b61 | 2009-06-09 17:33:27 +0200 | [diff] [blame] | 2283 | if (status & AR5K_INT_GPIO) |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2284 | tasklet_schedule(&ah->rf_kill.toggleq); |
Bob Copeland | a6ae071 | 2009-06-09 23:43:11 -0400 | [diff] [blame] | 2285 | |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 2286 | } |
Felix Fietkau | 4cebb34 | 2010-12-02 10:27:21 +0100 | [diff] [blame] | 2287 | |
| 2288 | if (ath5k_get_bus_type(ah) == ATH_AHB) |
| 2289 | break; |
| 2290 | |
Bob Copeland | 2516baa | 2009-04-27 22:18:10 -0400 | [diff] [blame] | 2291 | } while (ath5k_hw_is_intr_pending(ah) && --counter > 0); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 2292 | |
Nick Kossifidis | 34ce644 | 2011-11-25 20:40:22 +0200 | [diff] [blame] | 2293 | /* |
| 2294 | * Until we handle rx/tx interrupts mask them on IMR |
| 2295 | * |
| 2296 | * NOTE: ah->(rx/tx)_pending are set when scheduling the tasklets |
| 2297 | * and unset after we 've handled the interrupts. |
| 2298 | */ |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2299 | if (ah->rx_pending || ah->tx_pending) |
| 2300 | ath5k_set_current_imask(ah); |
Felix Fietkau | c266c71 | 2011-04-10 18:32:19 +0200 | [diff] [blame] | 2301 | |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 2302 | if (unlikely(!counter)) |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2303 | ATH5K_WARN(ah, "too many interrupts, giving up for now\n"); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 2304 | |
Nick Kossifidis | 34ce644 | 2011-11-25 20:40:22 +0200 | [diff] [blame] | 2305 | /* Fire up calibration poll */ |
Bruno Randolf | 6a8a3f6 | 2010-03-25 14:49:19 +0900 | [diff] [blame] | 2306 | ath5k_intr_calibration_poll(ah); |
Nick Kossifidis | 6e220662 | 2009-08-10 03:31:31 +0300 | [diff] [blame] | 2307 | |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 2308 | return IRQ_HANDLED; |
| 2309 | } |
| 2310 | |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 2311 | /* |
| 2312 | * Periodically recalibrate the PHY to account |
| 2313 | * for temperature/environment changes. |
| 2314 | */ |
| 2315 | static void |
Nick Kossifidis | ce169ac | 2011-11-25 20:40:23 +0200 | [diff] [blame] | 2316 | ath5k_calibrate_work(struct work_struct *work) |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 2317 | { |
Nick Kossifidis | ce169ac | 2011-11-25 20:40:23 +0200 | [diff] [blame] | 2318 | struct ath5k_hw *ah = container_of(work, struct ath5k_hw, |
| 2319 | calib_work); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 2320 | |
Nick Kossifidis | ce169ac | 2011-11-25 20:40:23 +0200 | [diff] [blame] | 2321 | /* Should we run a full calibration ? */ |
| 2322 | if (time_is_before_eq_jiffies(ah->ah_cal_next_full)) { |
| 2323 | |
| 2324 | ah->ah_cal_next_full = jiffies + |
| 2325 | msecs_to_jiffies(ATH5K_TUNE_CALIBRATION_INTERVAL_FULL); |
| 2326 | ah->ah_cal_mask |= AR5K_CALIBRATION_FULL; |
| 2327 | |
| 2328 | ATH5K_DBG(ah, ATH5K_DEBUG_CALIBRATE, |
| 2329 | "running full calibration\n"); |
| 2330 | |
| 2331 | if (ath5k_hw_gainf_calibrate(ah) == AR5K_RFGAIN_NEED_CHANGE) { |
| 2332 | /* |
| 2333 | * Rfgain is out of bounds, reset the chip |
| 2334 | * to load new gain values. |
| 2335 | */ |
| 2336 | ATH5K_DBG(ah, ATH5K_DEBUG_RESET, |
| 2337 | "got new rfgain, resetting\n"); |
| 2338 | ieee80211_queue_work(ah->hw, &ah->reset_work); |
| 2339 | } |
Nick Kossifidis | ce169ac | 2011-11-25 20:40:23 +0200 | [diff] [blame] | 2340 | } else |
| 2341 | ah->ah_cal_mask |= AR5K_CALIBRATION_SHORT; |
| 2342 | |
Nick Kossifidis | 6e220662 | 2009-08-10 03:31:31 +0300 | [diff] [blame] | 2343 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2344 | ATH5K_DBG(ah, ATH5K_DEBUG_CALIBRATE, "channel %u/%x\n", |
| 2345 | ieee80211_frequency_to_channel(ah->curchan->center_freq), |
| 2346 | ah->curchan->hw_value); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 2347 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2348 | if (ath5k_hw_phy_calibrate(ah, ah->curchan)) |
| 2349 | ATH5K_ERR(ah, "calibration of channel %u failed\n", |
Luis R. Rodriguez | 400ec45 | 2008-02-03 21:51:49 -0500 | [diff] [blame] | 2350 | ieee80211_frequency_to_channel( |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2351 | ah->curchan->center_freq)); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 2352 | |
Nick Kossifidis | ce169ac | 2011-11-25 20:40:23 +0200 | [diff] [blame] | 2353 | /* Clear calibration flags */ |
Felix Fietkau | 62e2c10 | 2012-03-06 11:06:37 +0100 | [diff] [blame] | 2354 | if (ah->ah_cal_mask & AR5K_CALIBRATION_FULL) |
Nick Kossifidis | ce169ac | 2011-11-25 20:40:23 +0200 | [diff] [blame] | 2355 | ah->ah_cal_mask &= ~AR5K_CALIBRATION_FULL; |
Felix Fietkau | 62e2c10 | 2012-03-06 11:06:37 +0100 | [diff] [blame] | 2356 | else if (ah->ah_cal_mask & AR5K_CALIBRATION_SHORT) |
Nick Kossifidis | ce169ac | 2011-11-25 20:40:23 +0200 | [diff] [blame] | 2357 | ah->ah_cal_mask &= ~AR5K_CALIBRATION_SHORT; |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 2358 | } |
| 2359 | |
| 2360 | |
Bruno Randolf | 2111ac0 | 2010-04-02 18:44:08 +0900 | [diff] [blame] | 2361 | static void |
| 2362 | ath5k_tasklet_ani(unsigned long data) |
| 2363 | { |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2364 | struct ath5k_hw *ah = (void *)data; |
Bruno Randolf | 2111ac0 | 2010-04-02 18:44:08 +0900 | [diff] [blame] | 2365 | |
| 2366 | ah->ah_cal_mask |= AR5K_CALIBRATION_ANI; |
| 2367 | ath5k_ani_calibration(ah); |
| 2368 | ah->ah_cal_mask &= ~AR5K_CALIBRATION_ANI; |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 2369 | } |
| 2370 | |
| 2371 | |
Bruno Randolf | 4edd761 | 2010-09-17 11:36:56 +0900 | [diff] [blame] | 2372 | static void |
| 2373 | ath5k_tx_complete_poll_work(struct work_struct *work) |
| 2374 | { |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2375 | struct ath5k_hw *ah = container_of(work, struct ath5k_hw, |
Bruno Randolf | 4edd761 | 2010-09-17 11:36:56 +0900 | [diff] [blame] | 2376 | tx_complete_work.work); |
| 2377 | struct ath5k_txq *txq; |
| 2378 | int i; |
| 2379 | bool needreset = false; |
| 2380 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2381 | mutex_lock(&ah->lock); |
Bob Copeland | 599b13a | 2011-01-18 08:06:43 -0500 | [diff] [blame] | 2382 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2383 | for (i = 0; i < ARRAY_SIZE(ah->txqs); i++) { |
| 2384 | if (ah->txqs[i].setup) { |
| 2385 | txq = &ah->txqs[i]; |
Bruno Randolf | 4edd761 | 2010-09-17 11:36:56 +0900 | [diff] [blame] | 2386 | spin_lock_bh(&txq->lock); |
Bruno Randolf | 2341329 | 2010-09-17 11:37:07 +0900 | [diff] [blame] | 2387 | if (txq->txq_len > 1) { |
Bruno Randolf | 4edd761 | 2010-09-17 11:36:56 +0900 | [diff] [blame] | 2388 | if (txq->txq_poll_mark) { |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2389 | ATH5K_DBG(ah, ATH5K_DEBUG_XMIT, |
Bruno Randolf | 4edd761 | 2010-09-17 11:36:56 +0900 | [diff] [blame] | 2390 | "TX queue stuck %d\n", |
| 2391 | txq->qnum); |
| 2392 | needreset = true; |
Bruno Randolf | 923e5b3 | 2010-09-17 11:37:02 +0900 | [diff] [blame] | 2393 | txq->txq_stuck++; |
Bruno Randolf | 4edd761 | 2010-09-17 11:36:56 +0900 | [diff] [blame] | 2394 | spin_unlock_bh(&txq->lock); |
| 2395 | break; |
| 2396 | } else { |
| 2397 | txq->txq_poll_mark = true; |
| 2398 | } |
| 2399 | } |
| 2400 | spin_unlock_bh(&txq->lock); |
| 2401 | } |
| 2402 | } |
| 2403 | |
| 2404 | if (needreset) { |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2405 | ATH5K_DBG(ah, ATH5K_DEBUG_RESET, |
Bruno Randolf | 4edd761 | 2010-09-17 11:36:56 +0900 | [diff] [blame] | 2406 | "TX queues stuck, resetting\n"); |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2407 | ath5k_reset(ah, NULL, true); |
Bruno Randolf | 4edd761 | 2010-09-17 11:36:56 +0900 | [diff] [blame] | 2408 | } |
| 2409 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2410 | mutex_unlock(&ah->lock); |
Bob Copeland | 599b13a | 2011-01-18 08:06:43 -0500 | [diff] [blame] | 2411 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2412 | ieee80211_queue_delayed_work(ah->hw, &ah->tx_complete_work, |
Bruno Randolf | 4edd761 | 2010-09-17 11:36:56 +0900 | [diff] [blame] | 2413 | msecs_to_jiffies(ATH5K_TX_COMPLETE_POLL_INT)); |
| 2414 | } |
| 2415 | |
| 2416 | |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 2417 | /*************************\ |
| 2418 | * Initialization routines * |
| 2419 | \*************************/ |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 2420 | |
Felix Fietkau | 9b4760e | 2012-04-17 00:39:27 -0400 | [diff] [blame] | 2421 | static const struct ieee80211_iface_limit if_limits[] = { |
| 2422 | { .max = 2048, .types = BIT(NL80211_IFTYPE_STATION) }, |
| 2423 | { .max = 4, .types = |
| 2424 | #ifdef CONFIG_MAC80211_MESH |
| 2425 | BIT(NL80211_IFTYPE_MESH_POINT) | |
| 2426 | #endif |
| 2427 | BIT(NL80211_IFTYPE_AP) }, |
| 2428 | }; |
| 2429 | |
| 2430 | static const struct ieee80211_iface_combination if_comb = { |
| 2431 | .limits = if_limits, |
| 2432 | .n_limits = ARRAY_SIZE(if_limits), |
| 2433 | .max_interfaces = 2048, |
| 2434 | .num_different_channels = 1, |
| 2435 | }; |
| 2436 | |
Pavel Roskin | 25380d8 | 2011-07-07 18:13:42 -0400 | [diff] [blame] | 2437 | int __devinit |
Pavel Roskin | bb1f3ad | 2011-07-26 22:27:05 -0400 | [diff] [blame] | 2438 | ath5k_init_ah(struct ath5k_hw *ah, const struct ath_bus_ops *bus_ops) |
Felix Fietkau | 132b1c3 | 2010-12-02 10:26:56 +0100 | [diff] [blame] | 2439 | { |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2440 | struct ieee80211_hw *hw = ah->hw; |
Felix Fietkau | 132b1c3 | 2010-12-02 10:26:56 +0100 | [diff] [blame] | 2441 | struct ath_common *common; |
| 2442 | int ret; |
| 2443 | int csz; |
| 2444 | |
| 2445 | /* Initialize driver private data */ |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2446 | SET_IEEE80211_DEV(hw, ah->dev); |
Felix Fietkau | 132b1c3 | 2010-12-02 10:26:56 +0100 | [diff] [blame] | 2447 | hw->flags = IEEE80211_HW_RX_INCLUDES_FCS | |
Nick Kossifidis | b9e61f1 | 2010-12-03 06:12:39 +0200 | [diff] [blame] | 2448 | IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING | |
| 2449 | IEEE80211_HW_SIGNAL_DBM | |
| 2450 | IEEE80211_HW_REPORTS_TX_ACK_STATUS; |
Felix Fietkau | 132b1c3 | 2010-12-02 10:26:56 +0100 | [diff] [blame] | 2451 | |
| 2452 | hw->wiphy->interface_modes = |
| 2453 | BIT(NL80211_IFTYPE_AP) | |
| 2454 | BIT(NL80211_IFTYPE_STATION) | |
| 2455 | BIT(NL80211_IFTYPE_ADHOC) | |
| 2456 | BIT(NL80211_IFTYPE_MESH_POINT); |
| 2457 | |
Felix Fietkau | 9b4760e | 2012-04-17 00:39:27 -0400 | [diff] [blame] | 2458 | hw->wiphy->iface_combinations = &if_comb; |
| 2459 | hw->wiphy->n_iface_combinations = 1; |
| 2460 | |
Antonio Quartulli | f997257 | 2012-01-14 11:42:43 +0100 | [diff] [blame] | 2461 | /* SW support for IBSS_RSN is provided by mac80211 */ |
| 2462 | hw->wiphy->flags |= WIPHY_FLAG_IBSS_RSN; |
| 2463 | |
Bruno Randolf | 3de135d | 2010-12-16 11:30:33 +0900 | [diff] [blame] | 2464 | /* both antennas can be configured as RX or TX */ |
| 2465 | hw->wiphy->available_antennas_tx = 0x3; |
| 2466 | hw->wiphy->available_antennas_rx = 0x3; |
| 2467 | |
Felix Fietkau | 132b1c3 | 2010-12-02 10:26:56 +0100 | [diff] [blame] | 2468 | hw->extra_tx_headroom = 2; |
| 2469 | hw->channel_change_time = 5000; |
| 2470 | |
| 2471 | /* |
| 2472 | * Mark the device as detached to avoid processing |
| 2473 | * interrupts until setup is complete. |
| 2474 | */ |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2475 | __set_bit(ATH_STAT_INVALID, ah->status); |
Felix Fietkau | 132b1c3 | 2010-12-02 10:26:56 +0100 | [diff] [blame] | 2476 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2477 | ah->opmode = NL80211_IFTYPE_STATION; |
| 2478 | ah->bintval = 1000; |
| 2479 | mutex_init(&ah->lock); |
| 2480 | spin_lock_init(&ah->rxbuflock); |
| 2481 | spin_lock_init(&ah->txbuflock); |
| 2482 | spin_lock_init(&ah->block); |
| 2483 | spin_lock_init(&ah->irqlock); |
Felix Fietkau | 132b1c3 | 2010-12-02 10:26:56 +0100 | [diff] [blame] | 2484 | |
| 2485 | /* Setup interrupt handler */ |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2486 | ret = request_irq(ah->irq, ath5k_intr, IRQF_SHARED, "ath", ah); |
Felix Fietkau | 132b1c3 | 2010-12-02 10:26:56 +0100 | [diff] [blame] | 2487 | if (ret) { |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2488 | ATH5K_ERR(ah, "request_irq failed\n"); |
Felix Fietkau | 132b1c3 | 2010-12-02 10:26:56 +0100 | [diff] [blame] | 2489 | goto err; |
| 2490 | } |
| 2491 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2492 | common = ath5k_hw_common(ah); |
Felix Fietkau | 132b1c3 | 2010-12-02 10:26:56 +0100 | [diff] [blame] | 2493 | common->ops = &ath5k_common_ops; |
| 2494 | common->bus_ops = bus_ops; |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2495 | common->ah = ah; |
Felix Fietkau | 132b1c3 | 2010-12-02 10:26:56 +0100 | [diff] [blame] | 2496 | common->hw = hw; |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2497 | common->priv = ah; |
Felix Fietkau | 26d16d2 | 2011-07-12 09:02:01 +0800 | [diff] [blame] | 2498 | common->clockrate = 40; |
Felix Fietkau | 132b1c3 | 2010-12-02 10:26:56 +0100 | [diff] [blame] | 2499 | |
| 2500 | /* |
| 2501 | * Cache line size is used to size and align various |
| 2502 | * structures used to communicate with the hardware. |
| 2503 | */ |
| 2504 | ath5k_read_cachesize(common, &csz); |
| 2505 | common->cachelsz = csz << 2; /* convert to bytes */ |
| 2506 | |
| 2507 | spin_lock_init(&common->cc_lock); |
| 2508 | |
| 2509 | /* Initialize device */ |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2510 | ret = ath5k_hw_init(ah); |
Felix Fietkau | 132b1c3 | 2010-12-02 10:26:56 +0100 | [diff] [blame] | 2511 | if (ret) |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2512 | goto err_irq; |
Felix Fietkau | 132b1c3 | 2010-12-02 10:26:56 +0100 | [diff] [blame] | 2513 | |
Nick Kossifidis | 86f62d9 | 2011-11-25 20:40:28 +0200 | [diff] [blame] | 2514 | /* Set up multi-rate retry capabilities */ |
| 2515 | if (ah->ah_capabilities.cap_has_mrr_support) { |
Felix Fietkau | 132b1c3 | 2010-12-02 10:26:56 +0100 | [diff] [blame] | 2516 | hw->max_rates = 4; |
Bruno Randolf | 76a9f6f | 2011-01-28 16:52:11 +0900 | [diff] [blame] | 2517 | hw->max_rate_tries = max(AR5K_INIT_RETRY_SHORT, |
| 2518 | AR5K_INIT_RETRY_LONG); |
Felix Fietkau | 132b1c3 | 2010-12-02 10:26:56 +0100 | [diff] [blame] | 2519 | } |
| 2520 | |
| 2521 | hw->vif_data_size = sizeof(struct ath5k_vif); |
| 2522 | |
| 2523 | /* Finish private driver data initialization */ |
| 2524 | ret = ath5k_init(hw); |
| 2525 | if (ret) |
| 2526 | goto err_ah; |
| 2527 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2528 | ATH5K_INFO(ah, "Atheros AR%s chip found (MAC: 0x%x, PHY: 0x%x)\n", |
| 2529 | ath5k_chip_name(AR5K_VERSION_MAC, ah->ah_mac_srev), |
| 2530 | ah->ah_mac_srev, |
| 2531 | ah->ah_phy_revision); |
Felix Fietkau | 132b1c3 | 2010-12-02 10:26:56 +0100 | [diff] [blame] | 2532 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2533 | if (!ah->ah_single_chip) { |
Felix Fietkau | 132b1c3 | 2010-12-02 10:26:56 +0100 | [diff] [blame] | 2534 | /* Single chip radio (!RF5111) */ |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2535 | if (ah->ah_radio_5ghz_revision && |
| 2536 | !ah->ah_radio_2ghz_revision) { |
Felix Fietkau | 132b1c3 | 2010-12-02 10:26:56 +0100 | [diff] [blame] | 2537 | /* No 5GHz support -> report 2GHz radio */ |
| 2538 | if (!test_bit(AR5K_MODE_11A, |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2539 | ah->ah_capabilities.cap_mode)) { |
| 2540 | ATH5K_INFO(ah, "RF%s 2GHz radio found (0x%x)\n", |
Felix Fietkau | 132b1c3 | 2010-12-02 10:26:56 +0100 | [diff] [blame] | 2541 | ath5k_chip_name(AR5K_VERSION_RAD, |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2542 | ah->ah_radio_5ghz_revision), |
| 2543 | ah->ah_radio_5ghz_revision); |
Felix Fietkau | 132b1c3 | 2010-12-02 10:26:56 +0100 | [diff] [blame] | 2544 | /* No 2GHz support (5110 and some |
Pavel Roskin | 6a2a0e7 | 2011-07-09 00:17:51 -0400 | [diff] [blame] | 2545 | * 5GHz only cards) -> report 5GHz radio */ |
Felix Fietkau | 132b1c3 | 2010-12-02 10:26:56 +0100 | [diff] [blame] | 2546 | } else if (!test_bit(AR5K_MODE_11B, |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2547 | ah->ah_capabilities.cap_mode)) { |
| 2548 | ATH5K_INFO(ah, "RF%s 5GHz radio found (0x%x)\n", |
Felix Fietkau | 132b1c3 | 2010-12-02 10:26:56 +0100 | [diff] [blame] | 2549 | ath5k_chip_name(AR5K_VERSION_RAD, |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2550 | ah->ah_radio_5ghz_revision), |
| 2551 | ah->ah_radio_5ghz_revision); |
Felix Fietkau | 132b1c3 | 2010-12-02 10:26:56 +0100 | [diff] [blame] | 2552 | /* Multiband radio */ |
| 2553 | } else { |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2554 | ATH5K_INFO(ah, "RF%s multiband radio found" |
Felix Fietkau | 132b1c3 | 2010-12-02 10:26:56 +0100 | [diff] [blame] | 2555 | " (0x%x)\n", |
| 2556 | ath5k_chip_name(AR5K_VERSION_RAD, |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2557 | ah->ah_radio_5ghz_revision), |
| 2558 | ah->ah_radio_5ghz_revision); |
Felix Fietkau | 132b1c3 | 2010-12-02 10:26:56 +0100 | [diff] [blame] | 2559 | } |
| 2560 | } |
| 2561 | /* Multi chip radio (RF5111 - RF2111) -> |
| 2562 | * report both 2GHz/5GHz radios */ |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2563 | else if (ah->ah_radio_5ghz_revision && |
| 2564 | ah->ah_radio_2ghz_revision) { |
| 2565 | ATH5K_INFO(ah, "RF%s 5GHz radio found (0x%x)\n", |
Felix Fietkau | 132b1c3 | 2010-12-02 10:26:56 +0100 | [diff] [blame] | 2566 | ath5k_chip_name(AR5K_VERSION_RAD, |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2567 | ah->ah_radio_5ghz_revision), |
| 2568 | ah->ah_radio_5ghz_revision); |
| 2569 | ATH5K_INFO(ah, "RF%s 2GHz radio found (0x%x)\n", |
Felix Fietkau | 132b1c3 | 2010-12-02 10:26:56 +0100 | [diff] [blame] | 2570 | ath5k_chip_name(AR5K_VERSION_RAD, |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2571 | ah->ah_radio_2ghz_revision), |
| 2572 | ah->ah_radio_2ghz_revision); |
Felix Fietkau | 132b1c3 | 2010-12-02 10:26:56 +0100 | [diff] [blame] | 2573 | } |
| 2574 | } |
| 2575 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2576 | ath5k_debug_init_device(ah); |
Felix Fietkau | 132b1c3 | 2010-12-02 10:26:56 +0100 | [diff] [blame] | 2577 | |
| 2578 | /* ready to process interrupts */ |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2579 | __clear_bit(ATH_STAT_INVALID, ah->status); |
Felix Fietkau | 132b1c3 | 2010-12-02 10:26:56 +0100 | [diff] [blame] | 2580 | |
| 2581 | return 0; |
| 2582 | err_ah: |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2583 | ath5k_hw_deinit(ah); |
Felix Fietkau | 132b1c3 | 2010-12-02 10:26:56 +0100 | [diff] [blame] | 2584 | err_irq: |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2585 | free_irq(ah->irq, ah); |
Felix Fietkau | 132b1c3 | 2010-12-02 10:26:56 +0100 | [diff] [blame] | 2586 | err: |
| 2587 | return ret; |
| 2588 | } |
| 2589 | |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 2590 | static int |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2591 | ath5k_stop_locked(struct ath5k_hw *ah) |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 2592 | { |
Bob Copeland | cec8db2 | 2009-07-04 12:59:51 -0400 | [diff] [blame] | 2593 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2594 | ATH5K_DBG(ah, ATH5K_DEBUG_RESET, "invalid %u\n", |
| 2595 | test_bit(ATH_STAT_INVALID, ah->status)); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 2596 | |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 2597 | /* |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 2598 | * Shutdown the hardware and driver: |
| 2599 | * stop output from above |
| 2600 | * disable interrupts |
| 2601 | * turn off timers |
| 2602 | * turn off the radio |
| 2603 | * clear transmit machinery |
| 2604 | * clear receive machinery |
| 2605 | * drain and release tx queues |
| 2606 | * reclaim beacon resources |
| 2607 | * power down hardware |
| 2608 | * |
| 2609 | * Note that some of this work is not possible if the |
| 2610 | * hardware is gone (invalid). |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 2611 | */ |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2612 | ieee80211_stop_queues(ah->hw); |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 2613 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2614 | if (!test_bit(ATH_STAT_INVALID, ah->status)) { |
| 2615 | ath5k_led_off(ah); |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 2616 | ath5k_hw_set_imr(ah, 0); |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2617 | synchronize_irq(ah->irq); |
| 2618 | ath5k_rx_stop(ah); |
Nick Kossifidis | 80dac9e | 2010-11-23 20:45:38 +0200 | [diff] [blame] | 2619 | ath5k_hw_dma_stop(ah); |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2620 | ath5k_drain_tx_buffs(ah); |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 2621 | ath5k_hw_phy_disable(ah); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 2622 | } |
| 2623 | |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 2624 | return 0; |
| 2625 | } |
| 2626 | |
Pavel Roskin | fabba04 | 2011-07-21 13:36:28 -0400 | [diff] [blame] | 2627 | int ath5k_start(struct ieee80211_hw *hw) |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 2628 | { |
Pavel Roskin | fabba04 | 2011-07-21 13:36:28 -0400 | [diff] [blame] | 2629 | struct ath5k_hw *ah = hw->priv; |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 2630 | struct ath_common *common = ath5k_hw_common(ah); |
| 2631 | int ret, i; |
| 2632 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2633 | mutex_lock(&ah->lock); |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 2634 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2635 | ATH5K_DBG(ah, ATH5K_DEBUG_RESET, "mode %d\n", ah->opmode); |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 2636 | |
| 2637 | /* |
| 2638 | * Stop anything previously setup. This is safe |
| 2639 | * no matter this is the first time through or not. |
| 2640 | */ |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2641 | ath5k_stop_locked(ah); |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 2642 | |
| 2643 | /* |
| 2644 | * The basic interface to setting the hardware in a good |
| 2645 | * state is ``reset''. On return the hardware is known to |
| 2646 | * be powered up and with interrupts disabled. This must |
| 2647 | * be followed by initialization of the appropriate bits |
| 2648 | * and then setup of the interrupt mask. |
| 2649 | */ |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2650 | ah->curchan = ah->hw->conf.channel; |
Nick Kossifidis | 34ce644 | 2011-11-25 20:40:22 +0200 | [diff] [blame] | 2651 | ah->imask = AR5K_INT_RXOK |
| 2652 | | AR5K_INT_RXERR |
| 2653 | | AR5K_INT_RXEOL |
| 2654 | | AR5K_INT_RXORN |
| 2655 | | AR5K_INT_TXDESC |
| 2656 | | AR5K_INT_TXEOL |
| 2657 | | AR5K_INT_FATAL |
| 2658 | | AR5K_INT_GLOBAL |
| 2659 | | AR5K_INT_MIB; |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 2660 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2661 | ret = ath5k_reset(ah, NULL, false); |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 2662 | if (ret) |
| 2663 | goto done; |
| 2664 | |
Nick Kossifidis | 84e1e73 | 2011-11-25 20:40:27 +0200 | [diff] [blame] | 2665 | if (!ath5k_modparam_no_hw_rfkill_switch) |
| 2666 | ath5k_rfkill_hw_start(ah); |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 2667 | |
| 2668 | /* |
| 2669 | * Reset the key cache since some parts do not reset the |
| 2670 | * contents on initial power up or resume from suspend. |
| 2671 | */ |
| 2672 | for (i = 0; i < common->keymax; i++) |
| 2673 | ath_hw_keyreset(common, (u16) i); |
| 2674 | |
Nick Kossifidis | 61cde03 | 2010-11-23 21:12:23 +0200 | [diff] [blame] | 2675 | /* Use higher rates for acks instead of base |
| 2676 | * rate */ |
| 2677 | ah->ah_ack_bitrate_high = true; |
Ben Greear | b1ae1ed | 2010-09-30 12:22:58 -0700 | [diff] [blame] | 2678 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2679 | for (i = 0; i < ARRAY_SIZE(ah->bslot); i++) |
| 2680 | ah->bslot[i] = NULL; |
Ben Greear | b1ae1ed | 2010-09-30 12:22:58 -0700 | [diff] [blame] | 2681 | |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 2682 | ret = 0; |
| 2683 | done: |
| 2684 | mmiowb(); |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2685 | mutex_unlock(&ah->lock); |
Bruno Randolf | 4edd761 | 2010-09-17 11:36:56 +0900 | [diff] [blame] | 2686 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2687 | ieee80211_queue_delayed_work(ah->hw, &ah->tx_complete_work, |
Bruno Randolf | 4edd761 | 2010-09-17 11:36:56 +0900 | [diff] [blame] | 2688 | msecs_to_jiffies(ATH5K_TX_COMPLETE_POLL_INT)); |
| 2689 | |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 2690 | return ret; |
| 2691 | } |
| 2692 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2693 | static void ath5k_stop_tasklets(struct ath5k_hw *ah) |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 2694 | { |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2695 | ah->rx_pending = false; |
| 2696 | ah->tx_pending = false; |
| 2697 | tasklet_kill(&ah->rxtq); |
| 2698 | tasklet_kill(&ah->txtq); |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2699 | tasklet_kill(&ah->beacontq); |
| 2700 | tasklet_kill(&ah->ani_tasklet); |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 2701 | } |
| 2702 | |
| 2703 | /* |
| 2704 | * Stop the device, grabbing the top-level lock to protect |
| 2705 | * against concurrent entry through ath5k_init (which can happen |
| 2706 | * if another thread does a system call and the thread doing the |
| 2707 | * stop is preempted). |
| 2708 | */ |
Pavel Roskin | fabba04 | 2011-07-21 13:36:28 -0400 | [diff] [blame] | 2709 | void ath5k_stop(struct ieee80211_hw *hw) |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 2710 | { |
Pavel Roskin | fabba04 | 2011-07-21 13:36:28 -0400 | [diff] [blame] | 2711 | struct ath5k_hw *ah = hw->priv; |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 2712 | int ret; |
| 2713 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2714 | mutex_lock(&ah->lock); |
| 2715 | ret = ath5k_stop_locked(ah); |
| 2716 | if (ret == 0 && !test_bit(ATH_STAT_INVALID, ah->status)) { |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 2717 | /* |
| 2718 | * Don't set the card in full sleep mode! |
| 2719 | * |
| 2720 | * a) When the device is in this state it must be carefully |
| 2721 | * woken up or references to registers in the PCI clock |
| 2722 | * domain may freeze the bus (and system). This varies |
| 2723 | * by chip and is mostly an issue with newer parts |
| 2724 | * (madwifi sources mentioned srev >= 0x78) that go to |
| 2725 | * sleep more quickly. |
| 2726 | * |
| 2727 | * b) On older chips full sleep results a weird behaviour |
| 2728 | * during wakeup. I tested various cards with srev < 0x78 |
| 2729 | * and they don't wake up after module reload, a second |
| 2730 | * module reload is needed to bring the card up again. |
| 2731 | * |
| 2732 | * Until we figure out what's going on don't enable |
| 2733 | * full chip reset on any chip (this is what Legacy HAL |
| 2734 | * and Sam's HAL do anyway). Instead Perform a full reset |
| 2735 | * on the device (same as initial state after attach) and |
| 2736 | * leave it idle (keep MAC/BB on warm reset) */ |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2737 | ret = ath5k_hw_on_hold(ah); |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 2738 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2739 | ATH5K_DBG(ah, ATH5K_DEBUG_RESET, |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 2740 | "putting device to sleep\n"); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 2741 | } |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 2742 | |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 2743 | mmiowb(); |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2744 | mutex_unlock(&ah->lock); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 2745 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2746 | ath5k_stop_tasklets(ah); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 2747 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2748 | cancel_delayed_work_sync(&ah->tx_complete_work); |
Bruno Randolf | 4edd761 | 2010-09-17 11:36:56 +0900 | [diff] [blame] | 2749 | |
Nick Kossifidis | 84e1e73 | 2011-11-25 20:40:27 +0200 | [diff] [blame] | 2750 | if (!ath5k_modparam_no_hw_rfkill_switch) |
| 2751 | ath5k_rfkill_hw_stop(ah); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 2752 | } |
| 2753 | |
Bob Copeland | 209d889 | 2009-05-07 08:09:08 -0400 | [diff] [blame] | 2754 | /* |
| 2755 | * Reset the hardware. If chan is not NULL, then also pause rx/tx |
| 2756 | * and change to the given channel. |
Bob Copeland | 5faaff7 | 2010-07-13 11:32:40 -0400 | [diff] [blame] | 2757 | * |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2758 | * This should be called with ah->lock. |
Bob Copeland | 209d889 | 2009-05-07 08:09:08 -0400 | [diff] [blame] | 2759 | */ |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 2760 | static int |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2761 | ath5k_reset(struct ath5k_hw *ah, struct ieee80211_channel *chan, |
Nick Kossifidis | 8aec7af | 2010-11-23 21:39:28 +0200 | [diff] [blame] | 2762 | bool skip_pcu) |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 2763 | { |
Bruno Randolf | f15a4bb | 2010-12-16 16:22:20 +0900 | [diff] [blame] | 2764 | struct ath_common *common = ath5k_hw_common(ah); |
Nick Kossifidis | 344b54b | 2010-12-03 06:07:13 +0200 | [diff] [blame] | 2765 | int ret, ani_mode; |
Nick Kossifidis | a99168e | 2011-06-02 03:09:48 +0300 | [diff] [blame] | 2766 | bool fast; |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 2767 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2768 | ATH5K_DBG(ah, ATH5K_DEBUG_RESET, "resetting\n"); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 2769 | |
Bob Copeland | 450464d | 2010-07-13 11:32:41 -0400 | [diff] [blame] | 2770 | ath5k_hw_set_imr(ah, 0); |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2771 | synchronize_irq(ah->irq); |
| 2772 | ath5k_stop_tasklets(ah); |
Bob Copeland | 450464d | 2010-07-13 11:32:41 -0400 | [diff] [blame] | 2773 | |
Lucas De Marchi | 25985ed | 2011-03-30 22:57:33 -0300 | [diff] [blame] | 2774 | /* Save ani mode and disable ANI during |
Nick Kossifidis | 344b54b | 2010-12-03 06:07:13 +0200 | [diff] [blame] | 2775 | * reset. If we don't we might get false |
| 2776 | * PHY error interrupts. */ |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2777 | ani_mode = ah->ani_state.ani_mode; |
Nick Kossifidis | 344b54b | 2010-12-03 06:07:13 +0200 | [diff] [blame] | 2778 | ath5k_ani_init(ah, ATH5K_ANI_MODE_OFF); |
| 2779 | |
Nick Kossifidis | 19252ec | 2010-12-03 06:05:19 +0200 | [diff] [blame] | 2780 | /* We are going to empty hw queues |
| 2781 | * so we should also free any remaining |
| 2782 | * tx buffers */ |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2783 | ath5k_drain_tx_buffs(ah); |
Bruno Randolf | 930a762 | 2011-01-19 18:21:13 +0900 | [diff] [blame] | 2784 | if (chan) |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2785 | ah->curchan = chan; |
Nick Kossifidis | a99168e | 2011-06-02 03:09:48 +0300 | [diff] [blame] | 2786 | |
| 2787 | fast = ((chan != NULL) && modparam_fastchanswitch) ? 1 : 0; |
| 2788 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2789 | ret = ath5k_hw_reset(ah, ah->opmode, ah->curchan, fast, skip_pcu); |
Jiri Slaby | d7dc100 | 2008-07-23 13:17:35 +0200 | [diff] [blame] | 2790 | if (ret) { |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2791 | ATH5K_ERR(ah, "can't reset hardware (%d)\n", ret); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 2792 | goto err; |
| 2793 | } |
Jiri Slaby | d7dc100 | 2008-07-23 13:17:35 +0200 | [diff] [blame] | 2794 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2795 | ret = ath5k_rx_start(ah); |
Jiri Slaby | d7dc100 | 2008-07-23 13:17:35 +0200 | [diff] [blame] | 2796 | if (ret) { |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2797 | ATH5K_ERR(ah, "can't start recv logic\n"); |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 2798 | goto err; |
| 2799 | } |
Jiri Slaby | d7dc100 | 2008-07-23 13:17:35 +0200 | [diff] [blame] | 2800 | |
Nick Kossifidis | 344b54b | 2010-12-03 06:07:13 +0200 | [diff] [blame] | 2801 | ath5k_ani_init(ah, ani_mode); |
Bruno Randolf | 2111ac0 | 2010-04-02 18:44:08 +0900 | [diff] [blame] | 2802 | |
Nick Kossifidis | ce169ac | 2011-11-25 20:40:23 +0200 | [diff] [blame] | 2803 | /* |
| 2804 | * Set calibration intervals |
| 2805 | * |
| 2806 | * Note: We don't need to run calibration imediately |
| 2807 | * since some initial calibration is done on reset |
| 2808 | * even for fast channel switching. Also on scanning |
| 2809 | * this will get set again and again and it won't get |
| 2810 | * executed unless we connect somewhere and spend some |
| 2811 | * time on the channel (that's what calibration needs |
| 2812 | * anyway to be accurate). |
| 2813 | */ |
| 2814 | ah->ah_cal_next_full = jiffies + |
| 2815 | msecs_to_jiffies(ATH5K_TUNE_CALIBRATION_INTERVAL_FULL); |
| 2816 | ah->ah_cal_next_ani = jiffies + |
| 2817 | msecs_to_jiffies(ATH5K_TUNE_CALIBRATION_INTERVAL_ANI); |
| 2818 | ah->ah_cal_next_short = jiffies + |
| 2819 | msecs_to_jiffies(ATH5K_TUNE_CALIBRATION_INTERVAL_SHORT); |
| 2820 | |
Bruno Randolf | 5dcc03f | 2010-12-02 19:12:31 +0900 | [diff] [blame] | 2821 | ewma_init(&ah->ah_beacon_rssi_avg, 1024, 8); |
Bruno Randolf | afe8628 | 2010-05-19 10:31:10 +0900 | [diff] [blame] | 2822 | |
Bruno Randolf | f15a4bb | 2010-12-16 16:22:20 +0900 | [diff] [blame] | 2823 | /* clear survey data and cycle counters */ |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2824 | memset(&ah->survey, 0, sizeof(ah->survey)); |
Bob Copeland | bb00755 | 2010-12-26 12:10:05 -0500 | [diff] [blame] | 2825 | spin_lock_bh(&common->cc_lock); |
Bruno Randolf | f15a4bb | 2010-12-16 16:22:20 +0900 | [diff] [blame] | 2826 | ath_hw_cycle_counters_update(common); |
| 2827 | memset(&common->cc_survey, 0, sizeof(common->cc_survey)); |
| 2828 | memset(&common->cc_ani, 0, sizeof(common->cc_ani)); |
Bob Copeland | bb00755 | 2010-12-26 12:10:05 -0500 | [diff] [blame] | 2829 | spin_unlock_bh(&common->cc_lock); |
Bruno Randolf | f15a4bb | 2010-12-16 16:22:20 +0900 | [diff] [blame] | 2830 | |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 2831 | /* |
Jiri Slaby | d7dc100 | 2008-07-23 13:17:35 +0200 | [diff] [blame] | 2832 | * Change channels and update the h/w rate map if we're switching; |
| 2833 | * e.g. 11a to 11b/g. |
| 2834 | * |
| 2835 | * We may be doing a reset in response to an ioctl that changes the |
| 2836 | * channel so update any state that might change as a result. |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 2837 | * |
| 2838 | * XXX needed? |
| 2839 | */ |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2840 | /* ath5k_chan_change(ah, c); */ |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 2841 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2842 | ath5k_beacon_config(ah); |
Jiri Slaby | d7dc100 | 2008-07-23 13:17:35 +0200 | [diff] [blame] | 2843 | /* intrs are enabled by ath5k_beacon_config */ |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 2844 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2845 | ieee80211_wake_queues(ah->hw); |
Bruno Randolf | 397f385 | 2010-05-19 10:30:49 +0900 | [diff] [blame] | 2846 | |
Jiri Slaby | fa1c114 | 2007-08-12 17:33:16 +0200 | [diff] [blame] | 2847 | return 0; |
| 2848 | err: |
| 2849 | return ret; |
| 2850 | } |
| 2851 | |
Bob Copeland | 5faaff7 | 2010-07-13 11:32:40 -0400 | [diff] [blame] | 2852 | static void ath5k_reset_work(struct work_struct *work) |
| 2853 | { |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2854 | struct ath5k_hw *ah = container_of(work, struct ath5k_hw, |
Bob Copeland | 5faaff7 | 2010-07-13 11:32:40 -0400 | [diff] [blame] | 2855 | reset_work); |
| 2856 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2857 | mutex_lock(&ah->lock); |
| 2858 | ath5k_reset(ah, NULL, true); |
| 2859 | mutex_unlock(&ah->lock); |
Bob Copeland | 5faaff7 | 2010-07-13 11:32:40 -0400 | [diff] [blame] | 2860 | } |
| 2861 | |
Pavel Roskin | 25380d8 | 2011-07-07 18:13:42 -0400 | [diff] [blame] | 2862 | static int __devinit |
Felix Fietkau | 132b1c3 | 2010-12-02 10:26:56 +0100 | [diff] [blame] | 2863 | ath5k_init(struct ieee80211_hw *hw) |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 2864 | { |
Felix Fietkau | 132b1c3 | 2010-12-02 10:26:56 +0100 | [diff] [blame] | 2865 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2866 | struct ath5k_hw *ah = hw->priv; |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 2867 | struct ath_regulatory *regulatory = ath5k_hw_regulatory(ah); |
Bruno Randolf | 925e0b0 | 2010-09-17 11:36:35 +0900 | [diff] [blame] | 2868 | struct ath5k_txq *txq; |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 2869 | u8 mac[ETH_ALEN] = {}; |
| 2870 | int ret; |
| 2871 | |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 2872 | |
| 2873 | /* |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 2874 | * Collect the channel list. The 802.11 layer |
Pavel Roskin | 6a2a0e7 | 2011-07-09 00:17:51 -0400 | [diff] [blame] | 2875 | * is responsible for filtering this list based |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 2876 | * on settings like the phy mode and regulatory |
| 2877 | * domain restrictions. |
| 2878 | */ |
| 2879 | ret = ath5k_setup_bands(hw); |
| 2880 | if (ret) { |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2881 | ATH5K_ERR(ah, "can't get channels\n"); |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 2882 | goto err; |
| 2883 | } |
| 2884 | |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 2885 | /* |
| 2886 | * Allocate tx+rx descriptors and populate the lists. |
| 2887 | */ |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2888 | ret = ath5k_desc_alloc(ah); |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 2889 | if (ret) { |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2890 | ATH5K_ERR(ah, "can't allocate descriptors\n"); |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 2891 | goto err; |
| 2892 | } |
| 2893 | |
| 2894 | /* |
| 2895 | * Allocate hardware transmit queues: one queue for |
| 2896 | * beacon frames and one data queue for each QoS |
| 2897 | * priority. Note that hw functions handle resetting |
| 2898 | * these queues at the needed time. |
| 2899 | */ |
| 2900 | ret = ath5k_beaconq_setup(ah); |
| 2901 | if (ret < 0) { |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2902 | ATH5K_ERR(ah, "can't setup a beacon xmit queue\n"); |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 2903 | goto err_desc; |
| 2904 | } |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2905 | ah->bhalq = ret; |
| 2906 | ah->cabq = ath5k_txq_setup(ah, AR5K_TX_QUEUE_CAB, 0); |
| 2907 | if (IS_ERR(ah->cabq)) { |
| 2908 | ATH5K_ERR(ah, "can't setup cab queue\n"); |
| 2909 | ret = PTR_ERR(ah->cabq); |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 2910 | goto err_bhal; |
| 2911 | } |
| 2912 | |
Bruno Randolf | 22d8d9f | 2010-12-07 11:08:12 +0900 | [diff] [blame] | 2913 | /* 5211 and 5212 usually support 10 queues but we better rely on the |
| 2914 | * capability information */ |
| 2915 | if (ah->ah_capabilities.cap_queues.q_tx_num >= 6) { |
| 2916 | /* This order matches mac80211's queue priority, so we can |
| 2917 | * directly use the mac80211 queue number without any mapping */ |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2918 | txq = ath5k_txq_setup(ah, AR5K_TX_QUEUE_DATA, AR5K_WME_AC_VO); |
Bruno Randolf | 22d8d9f | 2010-12-07 11:08:12 +0900 | [diff] [blame] | 2919 | if (IS_ERR(txq)) { |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2920 | ATH5K_ERR(ah, "can't setup xmit queue\n"); |
Bruno Randolf | 22d8d9f | 2010-12-07 11:08:12 +0900 | [diff] [blame] | 2921 | ret = PTR_ERR(txq); |
| 2922 | goto err_queues; |
| 2923 | } |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2924 | txq = ath5k_txq_setup(ah, AR5K_TX_QUEUE_DATA, AR5K_WME_AC_VI); |
Bruno Randolf | 22d8d9f | 2010-12-07 11:08:12 +0900 | [diff] [blame] | 2925 | if (IS_ERR(txq)) { |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2926 | ATH5K_ERR(ah, "can't setup xmit queue\n"); |
Bruno Randolf | 22d8d9f | 2010-12-07 11:08:12 +0900 | [diff] [blame] | 2927 | ret = PTR_ERR(txq); |
| 2928 | goto err_queues; |
| 2929 | } |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2930 | txq = ath5k_txq_setup(ah, AR5K_TX_QUEUE_DATA, AR5K_WME_AC_BE); |
Bruno Randolf | 22d8d9f | 2010-12-07 11:08:12 +0900 | [diff] [blame] | 2931 | if (IS_ERR(txq)) { |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2932 | ATH5K_ERR(ah, "can't setup xmit queue\n"); |
Bruno Randolf | 22d8d9f | 2010-12-07 11:08:12 +0900 | [diff] [blame] | 2933 | ret = PTR_ERR(txq); |
| 2934 | goto err_queues; |
| 2935 | } |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2936 | txq = ath5k_txq_setup(ah, AR5K_TX_QUEUE_DATA, AR5K_WME_AC_BK); |
Bruno Randolf | 22d8d9f | 2010-12-07 11:08:12 +0900 | [diff] [blame] | 2937 | if (IS_ERR(txq)) { |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2938 | ATH5K_ERR(ah, "can't setup xmit queue\n"); |
Bruno Randolf | 22d8d9f | 2010-12-07 11:08:12 +0900 | [diff] [blame] | 2939 | ret = PTR_ERR(txq); |
| 2940 | goto err_queues; |
| 2941 | } |
| 2942 | hw->queues = 4; |
| 2943 | } else { |
| 2944 | /* older hardware (5210) can only support one data queue */ |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2945 | txq = ath5k_txq_setup(ah, AR5K_TX_QUEUE_DATA, AR5K_WME_AC_BE); |
Bruno Randolf | 22d8d9f | 2010-12-07 11:08:12 +0900 | [diff] [blame] | 2946 | if (IS_ERR(txq)) { |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2947 | ATH5K_ERR(ah, "can't setup xmit queue\n"); |
Bruno Randolf | 22d8d9f | 2010-12-07 11:08:12 +0900 | [diff] [blame] | 2948 | ret = PTR_ERR(txq); |
| 2949 | goto err_queues; |
| 2950 | } |
| 2951 | hw->queues = 1; |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 2952 | } |
| 2953 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2954 | tasklet_init(&ah->rxtq, ath5k_tasklet_rx, (unsigned long)ah); |
| 2955 | tasklet_init(&ah->txtq, ath5k_tasklet_tx, (unsigned long)ah); |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2956 | tasklet_init(&ah->beacontq, ath5k_tasklet_beacon, (unsigned long)ah); |
| 2957 | tasklet_init(&ah->ani_tasklet, ath5k_tasklet_ani, (unsigned long)ah); |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 2958 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2959 | INIT_WORK(&ah->reset_work, ath5k_reset_work); |
Nick Kossifidis | ce169ac | 2011-11-25 20:40:23 +0200 | [diff] [blame] | 2960 | INIT_WORK(&ah->calib_work, ath5k_calibrate_work); |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2961 | INIT_DELAYED_WORK(&ah->tx_complete_work, ath5k_tx_complete_poll_work); |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 2962 | |
Felix Fietkau | fa9bfd6 | 2011-04-13 21:56:44 +0200 | [diff] [blame] | 2963 | ret = ath5k_hw_common(ah)->bus_ops->eeprom_read_mac(ah, mac); |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 2964 | if (ret) { |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2965 | ATH5K_ERR(ah, "unable to read address from EEPROM\n"); |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 2966 | goto err_queues; |
| 2967 | } |
| 2968 | |
| 2969 | SET_IEEE80211_PERM_ADDR(hw, mac); |
| 2970 | /* All MAC address bits matter for ACKs */ |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2971 | ath5k_update_bssid_mask_and_opmode(ah, NULL); |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 2972 | |
| 2973 | regulatory->current_rd = ah->ah_capabilities.cap_eeprom.ee_regdomain; |
| 2974 | ret = ath_regd_init(regulatory, hw->wiphy, ath5k_reg_notifier); |
| 2975 | if (ret) { |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2976 | ATH5K_ERR(ah, "can't initialize regulatory system\n"); |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 2977 | goto err_queues; |
| 2978 | } |
| 2979 | |
| 2980 | ret = ieee80211_register_hw(hw); |
| 2981 | if (ret) { |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2982 | ATH5K_ERR(ah, "can't register ieee80211 hw\n"); |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 2983 | goto err_queues; |
| 2984 | } |
| 2985 | |
| 2986 | if (!ath_is_world_regd(regulatory)) |
| 2987 | regulatory_hint(hw->wiphy, regulatory->alpha2); |
| 2988 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2989 | ath5k_init_leds(ah); |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 2990 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2991 | ath5k_sysfs_register(ah); |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 2992 | |
| 2993 | return 0; |
| 2994 | err_queues: |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2995 | ath5k_txq_release(ah); |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 2996 | err_bhal: |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2997 | ath5k_hw_release_tx_queue(ah, ah->bhalq); |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 2998 | err_desc: |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 2999 | ath5k_desc_free(ah); |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 3000 | err: |
| 3001 | return ret; |
| 3002 | } |
| 3003 | |
Felix Fietkau | 132b1c3 | 2010-12-02 10:26:56 +0100 | [diff] [blame] | 3004 | void |
Pavel Roskin | bb1f3ad | 2011-07-26 22:27:05 -0400 | [diff] [blame] | 3005 | ath5k_deinit_ah(struct ath5k_hw *ah) |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 3006 | { |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 3007 | struct ieee80211_hw *hw = ah->hw; |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 3008 | |
| 3009 | /* |
| 3010 | * NB: the order of these is important: |
| 3011 | * o call the 802.11 layer before detaching ath5k_hw to |
| 3012 | * ensure callbacks into the driver to delete global |
| 3013 | * key cache entries can be handled |
| 3014 | * o reclaim the tx queue data structures after calling |
| 3015 | * the 802.11 layer as we'll get called back to reclaim |
| 3016 | * node state and potentially want to use them |
| 3017 | * o to cleanup the tx queues the hal is called, so detach |
| 3018 | * it last |
| 3019 | * XXX: ??? detach ath5k_hw ??? |
| 3020 | * Other than that, it's straightforward... |
| 3021 | */ |
| 3022 | ieee80211_unregister_hw(hw); |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 3023 | ath5k_desc_free(ah); |
| 3024 | ath5k_txq_release(ah); |
| 3025 | ath5k_hw_release_tx_queue(ah, ah->bhalq); |
| 3026 | ath5k_unregister_leds(ah); |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 3027 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 3028 | ath5k_sysfs_unregister(ah); |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 3029 | /* |
| 3030 | * NB: can't reclaim these until after ieee80211_ifdetach |
| 3031 | * returns because we'll get called back to reclaim node |
| 3032 | * state and potentially want to use them. |
| 3033 | */ |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 3034 | ath5k_hw_deinit(ah); |
| 3035 | free_irq(ah->irq, ah); |
Bob Copeland | 8a63fac | 2010-09-17 12:45:07 +0900 | [diff] [blame] | 3036 | } |
| 3037 | |
Bruno Randolf | cd2c548 | 2010-12-22 19:20:32 +0900 | [diff] [blame] | 3038 | bool |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 3039 | ath5k_any_vif_assoc(struct ath5k_hw *ah) |
Ben Greear | b1ae1ed | 2010-09-30 12:22:58 -0700 | [diff] [blame] | 3040 | { |
Ben Greear | e4b0b32 | 2011-03-03 14:39:05 -0800 | [diff] [blame] | 3041 | struct ath5k_vif_iter_data iter_data; |
Ben Greear | b1ae1ed | 2010-09-30 12:22:58 -0700 | [diff] [blame] | 3042 | iter_data.hw_macaddr = NULL; |
| 3043 | iter_data.any_assoc = false; |
| 3044 | iter_data.need_set_hw_addr = false; |
| 3045 | iter_data.found_active = true; |
| 3046 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 3047 | ieee80211_iterate_active_interfaces_atomic(ah->hw, ath5k_vif_iter, |
Ben Greear | b1ae1ed | 2010-09-30 12:22:58 -0700 | [diff] [blame] | 3048 | &iter_data); |
| 3049 | return iter_data.any_assoc; |
| 3050 | } |
| 3051 | |
Bruno Randolf | cd2c548 | 2010-12-22 19:20:32 +0900 | [diff] [blame] | 3052 | void |
Pavel Roskin | f5cbc8b | 2011-06-15 18:03:22 -0400 | [diff] [blame] | 3053 | ath5k_set_beacon_filter(struct ieee80211_hw *hw, bool enable) |
Martin Xu | 02969b3 | 2008-11-24 10:49:27 +0800 | [diff] [blame] | 3054 | { |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 3055 | struct ath5k_hw *ah = hw->priv; |
Martin Xu | 02969b3 | 2008-11-24 10:49:27 +0800 | [diff] [blame] | 3056 | u32 rfilt; |
| 3057 | rfilt = ath5k_hw_get_rx_filter(ah); |
| 3058 | if (enable) |
| 3059 | rfilt |= AR5K_RX_FILTER_BEACON; |
| 3060 | else |
| 3061 | rfilt &= ~AR5K_RX_FILTER_BEACON; |
| 3062 | ath5k_hw_set_rx_filter(ah, rfilt); |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 3063 | ah->filter_flags = rfilt; |
Martin Xu | 02969b3 | 2008-11-24 10:49:27 +0800 | [diff] [blame] | 3064 | } |
Joe Perches | 227842d | 2012-03-18 17:30:53 -0700 | [diff] [blame] | 3065 | |
| 3066 | void _ath5k_printk(const struct ath5k_hw *ah, const char *level, |
| 3067 | const char *fmt, ...) |
| 3068 | { |
| 3069 | struct va_format vaf; |
| 3070 | va_list args; |
| 3071 | |
| 3072 | va_start(args, fmt); |
| 3073 | |
| 3074 | vaf.fmt = fmt; |
| 3075 | vaf.va = &args; |
| 3076 | |
| 3077 | if (ah && ah->hw) |
| 3078 | printk("%s" pr_fmt("%s: %pV"), |
| 3079 | level, wiphy_name(ah->hw->wiphy), &vaf); |
| 3080 | else |
| 3081 | printk("%s" pr_fmt("%pV"), level, &vaf); |
| 3082 | |
| 3083 | va_end(args); |
| 3084 | } |