| /* |
| * Synopsys DesignWare 8250 driver. |
| * |
| * Copyright 2011 Picochip, Jamie Iles. |
| * |
| * This program is free software; you can redistribute it and/or modify |
| * it under the terms of the GNU General Public License as published by |
| * the Free Software Foundation; either version 2 of the License, or |
| * (at your option) any later version. |
| * |
| * The Synopsys DesignWare 8250 has an extra feature whereby it detects if the |
| * LCR is written whilst busy. If it is, then a busy detect interrupt is |
| * raised, the LCR needs to be rewritten and the uart status register read. |
| */ |
| #include <linux/device.h> |
| #include <linux/init.h> |
| #include <linux/io.h> |
| #include <linux/module.h> |
| #include <linux/serial_8250.h> |
| #include <linux/serial_core.h> |
| #include <linux/serial_reg.h> |
| #include <linux/of.h> |
| #include <linux/of_irq.h> |
| #include <linux/of_platform.h> |
| #include <linux/platform_device.h> |
| #include <linux/slab.h> |
| |
| struct dw8250_data { |
| int last_lcr; |
| int line; |
| }; |
| |
| static void dw8250_serial_out(struct uart_port *p, int offset, int value) |
| { |
| struct dw8250_data *d = p->private_data; |
| |
| if (offset == UART_LCR) |
| d->last_lcr = value; |
| |
| offset <<= p->regshift; |
| writeb(value, p->membase + offset); |
| } |
| |
| static unsigned int dw8250_serial_in(struct uart_port *p, int offset) |
| { |
| offset <<= p->regshift; |
| |
| return readb(p->membase + offset); |
| } |
| |
| static void dw8250_serial_out32(struct uart_port *p, int offset, int value) |
| { |
| struct dw8250_data *d = p->private_data; |
| |
| if (offset == UART_LCR) |
| d->last_lcr = value; |
| |
| offset <<= p->regshift; |
| writel(value, p->membase + offset); |
| } |
| |
| static unsigned int dw8250_serial_in32(struct uart_port *p, int offset) |
| { |
| offset <<= p->regshift; |
| |
| return readl(p->membase + offset); |
| } |
| |
| /* Offset for the DesignWare's UART Status Register. */ |
| #define UART_USR 0x1f |
| |
| static int dw8250_handle_irq(struct uart_port *p) |
| { |
| struct dw8250_data *d = p->private_data; |
| unsigned int iir = p->serial_in(p, UART_IIR); |
| |
| if (serial8250_handle_irq(p, iir)) { |
| return 1; |
| } else if ((iir & UART_IIR_BUSY) == UART_IIR_BUSY) { |
| /* Clear the USR and write the LCR again. */ |
| (void)p->serial_in(p, UART_USR); |
| p->serial_out(p, UART_LCR, d->last_lcr); |
| |
| return 1; |
| } |
| |
| return 0; |
| } |
| |
| static int dw8250_probe(struct platform_device *pdev) |
| { |
| struct uart_8250_port uart = {}; |
| struct resource *regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| struct resource *irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); |
| struct device_node *np = pdev->dev.of_node; |
| u32 val; |
| struct dw8250_data *data; |
| |
| if (!regs || !irq) { |
| dev_err(&pdev->dev, "no registers/irq defined\n"); |
| return -EINVAL; |
| } |
| |
| data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); |
| if (!data) |
| return -ENOMEM; |
| uart.port.private_data = data; |
| |
| spin_lock_init(&uart.port.lock); |
| uart.port.mapbase = regs->start; |
| uart.port.irq = irq->start; |
| uart.port.handle_irq = dw8250_handle_irq; |
| uart.port.type = PORT_8250; |
| uart.port.flags = UPF_SHARE_IRQ | UPF_BOOT_AUTOCONF | UPF_IOREMAP | |
| UPF_FIXED_PORT | UPF_FIXED_TYPE; |
| uart.port.dev = &pdev->dev; |
| |
| uart.port.iotype = UPIO_MEM; |
| uart.port.serial_in = dw8250_serial_in; |
| uart.port.serial_out = dw8250_serial_out; |
| if (!of_property_read_u32(np, "reg-io-width", &val)) { |
| switch (val) { |
| case 1: |
| break; |
| case 4: |
| uart.port.iotype = UPIO_MEM32; |
| uart.port.serial_in = dw8250_serial_in32; |
| uart.port.serial_out = dw8250_serial_out32; |
| break; |
| default: |
| dev_err(&pdev->dev, "unsupported reg-io-width (%u)\n", |
| val); |
| return -EINVAL; |
| } |
| } |
| |
| if (!of_property_read_u32(np, "reg-shift", &val)) |
| uart.port.regshift = val; |
| |
| if (of_property_read_u32(np, "clock-frequency", &val)) { |
| dev_err(&pdev->dev, "no clock-frequency property set\n"); |
| return -EINVAL; |
| } |
| uart.port.uartclk = val; |
| |
| data->line = serial8250_register_8250_port(&uart); |
| if (data->line < 0) |
| return data->line; |
| |
| platform_set_drvdata(pdev, data); |
| |
| return 0; |
| } |
| |
| static int dw8250_remove(struct platform_device *pdev) |
| { |
| struct dw8250_data *data = platform_get_drvdata(pdev); |
| |
| serial8250_unregister_port(data->line); |
| |
| return 0; |
| } |
| |
| #ifdef CONFIG_PM |
| static int dw8250_suspend(struct platform_device *pdev, pm_message_t state) |
| { |
| struct dw8250_data *data = platform_get_drvdata(pdev); |
| |
| serial8250_suspend_port(data->line); |
| |
| return 0; |
| } |
| |
| static int dw8250_resume(struct platform_device *pdev) |
| { |
| struct dw8250_data *data = platform_get_drvdata(pdev); |
| |
| serial8250_resume_port(data->line); |
| |
| return 0; |
| } |
| #else |
| #define dw8250_suspend NULL |
| #define dw8250_resume NULL |
| #endif /* CONFIG_PM */ |
| |
| static const struct of_device_id dw8250_match[] = { |
| { .compatible = "snps,dw-apb-uart" }, |
| { /* Sentinel */ } |
| }; |
| MODULE_DEVICE_TABLE(of, dw8250_match); |
| |
| static struct platform_driver dw8250_platform_driver = { |
| .driver = { |
| .name = "dw-apb-uart", |
| .owner = THIS_MODULE, |
| .of_match_table = dw8250_match, |
| }, |
| .probe = dw8250_probe, |
| .remove = dw8250_remove, |
| .suspend = dw8250_suspend, |
| .resume = dw8250_resume, |
| }; |
| |
| module_platform_driver(dw8250_platform_driver); |
| |
| MODULE_AUTHOR("Jamie Iles"); |
| MODULE_LICENSE("GPL"); |
| MODULE_DESCRIPTION("Synopsys DesignWare 8250 serial port driver"); |