| #ifndef _ASM_POWERPC_CACHE_H |
| #define _ASM_POWERPC_CACHE_H |
| /* bytes per L1 cache line */ |
| #if defined(CONFIG_8xx) || defined(CONFIG_403GCX) |
| #define MAX_COPY_PREFETCH 1 |
| #elif defined(CONFIG_PPC32) |
| #define MAX_COPY_PREFETCH 4 |
| #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) |
| #define SMP_CACHE_BYTES L1_CACHE_BYTES |
| #if defined(__powerpc64__) && !defined(__ASSEMBLY__) |
| u32 dsize; /* L1 d-cache size */ |
| u32 dline_size; /* L1 d-cache line size */ |
| u32 isize; /* L1 i-cache size */ |
| u32 iline_size; /* L1 i-cache line size */ |
| extern struct ppc64_caches ppc64_caches; |
| #endif /* __powerpc64__ && ! __ASSEMBLY__ */ |
| #endif /* _ASM_POWERPC_CACHE_H */ |