1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
|
/*
* Copyright (C) 2015 The Android Open Source Project
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef ART_COMPILER_OPTIMIZING_NODES_ARM64_H_
#define ART_COMPILER_OPTIMIZING_NODES_ARM64_H_
#include "nodes.h"
namespace art {
class HArm64DataProcWithShifterOp : public HExpression<2> {
public:
enum OpKind {
kLSL, // Logical shift left.
kLSR, // Logical shift right.
kASR, // Arithmetic shift right.
kUXTB, // Unsigned extend byte.
kUXTH, // Unsigned extend half-word.
kUXTW, // Unsigned extend word.
kSXTB, // Signed extend byte.
kSXTH, // Signed extend half-word.
kSXTW, // Signed extend word.
// Aliases.
kFirstShiftOp = kLSL,
kLastShiftOp = kASR,
kFirstExtensionOp = kUXTB,
kLastExtensionOp = kSXTW
};
HArm64DataProcWithShifterOp(HInstruction* instr,
HInstruction* left,
HInstruction* right,
OpKind op,
// The shift argument is unused if the operation
// is an extension.
int shift = 0,
uint32_t dex_pc = kNoDexPc)
: HExpression(instr->GetType(), SideEffects::None(), dex_pc),
instr_kind_(instr->GetKind()), op_kind_(op), shift_amount_(shift) {
DCHECK(!instr->HasSideEffects());
SetRawInputAt(0, left);
SetRawInputAt(1, right);
}
bool CanBeMoved() const OVERRIDE { return true; }
bool InstructionDataEquals(HInstruction* other_instr) const OVERRIDE {
HArm64DataProcWithShifterOp* other = other_instr->AsArm64DataProcWithShifterOp();
return instr_kind_ == other->instr_kind_ &&
op_kind_ == other->op_kind_ &&
shift_amount_ == other->shift_amount_;
}
static bool IsShiftOp(OpKind op_kind) {
return kFirstShiftOp <= op_kind && op_kind <= kLastShiftOp;
}
static bool IsExtensionOp(OpKind op_kind) {
return kFirstExtensionOp <= op_kind && op_kind <= kLastExtensionOp;
}
// Find the operation kind and shift amount from a bitfield move instruction.
static void GetOpInfoFromInstruction(HInstruction* bitfield_op,
/*out*/OpKind* op_kind,
/*out*/int* shift_amount);
InstructionKind GetInstrKind() const { return instr_kind_; }
OpKind GetOpKind() const { return op_kind_; }
int GetShiftAmount() const { return shift_amount_; }
DECLARE_INSTRUCTION(Arm64DataProcWithShifterOp);
private:
InstructionKind instr_kind_;
OpKind op_kind_;
int shift_amount_;
friend std::ostream& operator<<(std::ostream& os, OpKind op);
DISALLOW_COPY_AND_ASSIGN(HArm64DataProcWithShifterOp);
};
std::ostream& operator<<(std::ostream& os, const HArm64DataProcWithShifterOp::OpKind op);
// This instruction computes an intermediate address pointing in the 'middle' of an object. The
// result pointer cannot be handled by GC, so extra care is taken to make sure that this value is
// never used across anything that can trigger GC.
class HArm64IntermediateAddress : public HExpression<2> {
public:
HArm64IntermediateAddress(HInstruction* base_address, HInstruction* offset, uint32_t dex_pc)
: HExpression(Primitive::kPrimNot, SideEffects::DependsOnGC(), dex_pc) {
SetRawInputAt(0, base_address);
SetRawInputAt(1, offset);
}
bool CanBeMoved() const OVERRIDE { return true; }
bool InstructionDataEquals(HInstruction* other ATTRIBUTE_UNUSED) const OVERRIDE { return true; }
bool IsActualObject() const OVERRIDE { return false; }
HInstruction* GetBaseAddress() const { return InputAt(0); }
HInstruction* GetOffset() const { return InputAt(1); }
DECLARE_INSTRUCTION(Arm64IntermediateAddress);
private:
DISALLOW_COPY_AND_ASSIGN(HArm64IntermediateAddress);
};
class HArm64MultiplyAccumulate : public HExpression<3> {
public:
HArm64MultiplyAccumulate(Primitive::Type type,
InstructionKind op,
HInstruction* accumulator,
HInstruction* mul_left,
HInstruction* mul_right,
uint32_t dex_pc = kNoDexPc)
: HExpression(type, SideEffects::None(), dex_pc), op_kind_(op) {
SetRawInputAt(kInputAccumulatorIndex, accumulator);
SetRawInputAt(kInputMulLeftIndex, mul_left);
SetRawInputAt(kInputMulRightIndex, mul_right);
}
static constexpr int kInputAccumulatorIndex = 0;
static constexpr int kInputMulLeftIndex = 1;
static constexpr int kInputMulRightIndex = 2;
bool CanBeMoved() const OVERRIDE { return true; }
bool InstructionDataEquals(HInstruction* other) const OVERRIDE {
return op_kind_ == other->AsArm64MultiplyAccumulate()->op_kind_;
}
InstructionKind GetOpKind() const { return op_kind_; }
DECLARE_INSTRUCTION(Arm64MultiplyAccumulate);
private:
// Indicates if this is a MADD or MSUB.
InstructionKind op_kind_;
DISALLOW_COPY_AND_ASSIGN(HArm64MultiplyAccumulate);
};
} // namespace art
#endif // ART_COMPILER_OPTIMIZING_NODES_ARM64_H_
|