From 16b5c294c37460b51dc1f5296000cc80bbd33419 Mon Sep 17 00:00:00 2001
From: Elliott Hughes <enh@google.com>
Date: Mon, 16 Apr 2012 20:37:16 -0700
Subject: Disassemble x86 0xd0 and 0xd1 shifts.

Change-Id: Id061e1971e7a829f57bb83e5299d999d1da8d21e
---
 src/disassembler_x86.cc | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

(limited to 'src')

diff --git a/src/disassembler_x86.cc b/src/disassembler_x86.cc
index eb52d5a952..d2c860b84d 100644
--- a/src/disassembler_x86.cc
+++ b/src/disassembler_x86.cc
@@ -383,13 +383,14 @@ DISASSEMBLER_ENTRY(cmp,
     reg_in_opcode = true;
     break;
   case 0xC0: case 0xC1:
+  case 0xD0: case 0xD1:
     static const char* shift_opcodes[] =
         {"rol", "ror", "rcl", "rcr", "shl", "shr", "unknown-shift", "sar"};
     modrm_opcodes = shift_opcodes;
     has_modrm = true;
     reg_is_opcode = true;
     store = true;
-    immediate_bytes = 1;
+    immediate_bytes = ((*instr & 0xf0) == 0xc0) ? 1 : 0;
     byte_operand = *instr == 0xC0;
     break;
   case 0xC3: opcode << "ret"; break;
-- 
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