From c7d1f91e024c5c560810376340aecb39d4e47fdc Mon Sep 17 00:00:00 2001 From: buzbee Date: Thu, 7 Feb 2013 15:22:39 -0800 Subject: Codegen tweaks Minor codegen cleanup. Most significant part of change is fixing dalvik register use counting to correctly record cost of high word of register pair. Significant boost to Reversi benchmark; modest gain for Caffeinemark. Change-Id: I41819e6d7be93e62d259240269339a94a934f312 --- src/compiler/codegen/gen_common.cc | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) (limited to 'src/compiler/codegen/gen_common.cc') diff --git a/src/compiler/codegen/gen_common.cc b/src/compiler/codegen/gen_common.cc index 0a46593159..2eaa6b0343 100644 --- a/src/compiler/codegen/gen_common.cc +++ b/src/compiler/codegen/gen_common.cc @@ -1419,13 +1419,14 @@ void Codegen::GenArithOpIntLit(CompilationUnit* cu, Instruction::Code opcode, switch (opcode) { case Instruction::RSUB_INT_LIT8: case Instruction::RSUB_INT: { - int t_reg; - //TUNING: add support for use of Arm rsub op rl_src = LoadValue(cu, rl_src, kCoreReg); - t_reg = AllocTemp(cu); - LoadConstant(cu, t_reg, lit); rl_result = EvalLoc(cu, rl_dest, kCoreReg, true); - OpRegRegReg(cu, kOpSub, rl_result.low_reg, t_reg, rl_src.low_reg); + if (cu->instruction_set == kThumb2) { + OpRegRegImm(cu, kOpRsub, rl_result.low_reg, rl_src.low_reg, lit); + } else { + OpRegReg(cu, kOpNeg, rl_result.low_reg, rl_src.low_reg); + OpRegImm(cu, kOpAdd, rl_result.low_reg, lit); + } StoreValue(cu, rl_dest, rl_result); return; } -- cgit v1.2.3-59-g8ed1b