From a114add0300b95eeaae7465493f39144e07324e8 Mon Sep 17 00:00:00 2001 From: Bill Buzbee Date: Thu, 3 May 2012 15:00:40 -0700 Subject: [Compiler] use Art indentation standard First of several CLs to bring code closer to alignment with Art and LLVM standards. Move to 2-space indenting. Sticking with 80-col line length (which LLVM apparently also wants). LLVM also prefers camel case names, so keeping Dalvik convention there as well (for now). Change-Id: I351ab234e640678d97747377cccdd6df0a770f4a --- src/compiler/codegen/arm/ArmLIR.h | 996 +++++++++++++++++++------------------- 1 file changed, 498 insertions(+), 498 deletions(-) (limited to 'src/compiler/codegen/arm/ArmLIR.h') diff --git a/src/compiler/codegen/arm/ArmLIR.h b/src/compiler/codegen/arm/ArmLIR.h index 484892a03c..fc5aa40178 100644 --- a/src/compiler/codegen/arm/ArmLIR.h +++ b/src/compiler/codegen/arm/ArmLIR.h @@ -132,20 +132,20 @@ namespace art { #define LOC_C_RETURN_WIDE_DOUBLE LOC_C_RETURN_WIDE enum ResourceEncodingPos { - kGPReg0 = 0, - kRegSP = 13, - kRegLR = 14, - kRegPC = 15, - kFPReg0 = 16, - kFPReg16 = 32, - kRegEnd = 48, - kCCode = kRegEnd, - kFPStatus, // FP status word - // The following four bits are for memory disambiguation - kDalvikReg, // 1 Dalvik Frame (can be fully disambiguated) - kLiteral, // 2 Literal pool (can be fully disambiguated) - kHeapRef, // 3 Somewhere on the heap (alias with any other heap) - kMustNotAlias, // 4 Guaranteed to be non-alias (eg *(r6+x)) + kGPReg0 = 0, + kRegSP = 13, + kRegLR = 14, + kRegPC = 15, + kFPReg0 = 16, + kFPReg16 = 32, + kRegEnd = 48, + kCCode = kRegEnd, + kFPStatus, // FP status word + // The following four bits are for memory disambiguation + kDalvikReg, // 1 Dalvik Frame (can be fully disambiguated) + kLiteral, // 2 Literal pool (can be fully disambiguated) + kHeapRef, // 3 Somewhere on the heap (alias with any other heap) + kMustNotAlias, // 4 Guaranteed to be non-alias (eg *(r6+x)) }; #define ENCODE_REG_LIST(N) ((u8) N) @@ -164,7 +164,7 @@ enum ResourceEncodingPos { #define ENCODE_ALL (~0ULL) #define ENCODE_MEM (ENCODE_DALVIK_REG | ENCODE_LITERAL | \ - ENCODE_HEAP_REF | ENCODE_MUST_NOT_ALIAS) + ENCODE_HEAP_REF | ENCODE_MUST_NOT_ALIAS) #define DECODE_ALIAS_INFO_REG(X) (X & 0xffff) #define DECODE_ALIAS_INFO_WIDE(X) ((X & 0x80000000) ? 1 : 0) @@ -176,73 +176,73 @@ enum ResourceEncodingPos { * rPC, rFP, and rSELF are for architecture-independent code to use. */ enum NativeRegisterPool { - r0 = 0, - r1 = 1, - r2 = 2, - r3 = 3, - rSUSPEND = 4, - r5 = 5, - r6 = 6, - r7 = 7, - r8 = 8, - rSELF = 9, - r10 = 10, - r11 = 11, - r12 = 12, - r13sp = 13, - rSP = 13, - r14lr = 14, - rLR = 14, - r15pc = 15, - rPC = 15, - fr0 = 0 + FP_REG_OFFSET, - fr1 = 1 + FP_REG_OFFSET, - fr2 = 2 + FP_REG_OFFSET, - fr3 = 3 + FP_REG_OFFSET, - fr4 = 4 + FP_REG_OFFSET, - fr5 = 5 + FP_REG_OFFSET, - fr6 = 6 + FP_REG_OFFSET, - fr7 = 7 + FP_REG_OFFSET, - fr8 = 8 + FP_REG_OFFSET, - fr9 = 9 + FP_REG_OFFSET, - fr10 = 10 + FP_REG_OFFSET, - fr11 = 11 + FP_REG_OFFSET, - fr12 = 12 + FP_REG_OFFSET, - fr13 = 13 + FP_REG_OFFSET, - fr14 = 14 + FP_REG_OFFSET, - fr15 = 15 + FP_REG_OFFSET, - fr16 = 16 + FP_REG_OFFSET, - fr17 = 17 + FP_REG_OFFSET, - fr18 = 18 + FP_REG_OFFSET, - fr19 = 19 + FP_REG_OFFSET, - fr20 = 20 + FP_REG_OFFSET, - fr21 = 21 + FP_REG_OFFSET, - fr22 = 22 + FP_REG_OFFSET, - fr23 = 23 + FP_REG_OFFSET, - fr24 = 24 + FP_REG_OFFSET, - fr25 = 25 + FP_REG_OFFSET, - fr26 = 26 + FP_REG_OFFSET, - fr27 = 27 + FP_REG_OFFSET, - fr28 = 28 + FP_REG_OFFSET, - fr29 = 29 + FP_REG_OFFSET, - fr30 = 30 + FP_REG_OFFSET, - fr31 = 31 + FP_REG_OFFSET, - dr0 = fr0 + FP_DOUBLE, - dr1 = fr2 + FP_DOUBLE, - dr2 = fr4 + FP_DOUBLE, - dr3 = fr6 + FP_DOUBLE, - dr4 = fr8 + FP_DOUBLE, - dr5 = fr10 + FP_DOUBLE, - dr6 = fr12 + FP_DOUBLE, - dr7 = fr14 + FP_DOUBLE, - dr8 = fr16 + FP_DOUBLE, - dr9 = fr18 + FP_DOUBLE, - dr10 = fr20 + FP_DOUBLE, - dr11 = fr22 + FP_DOUBLE, - dr12 = fr24 + FP_DOUBLE, - dr13 = fr26 + FP_DOUBLE, - dr14 = fr28 + FP_DOUBLE, - dr15 = fr30 + FP_DOUBLE, + r0 = 0, + r1 = 1, + r2 = 2, + r3 = 3, + rSUSPEND = 4, + r5 = 5, + r6 = 6, + r7 = 7, + r8 = 8, + rSELF = 9, + r10 = 10, + r11 = 11, + r12 = 12, + r13sp = 13, + rSP = 13, + r14lr = 14, + rLR = 14, + r15pc = 15, + rPC = 15, + fr0 = 0 + FP_REG_OFFSET, + fr1 = 1 + FP_REG_OFFSET, + fr2 = 2 + FP_REG_OFFSET, + fr3 = 3 + FP_REG_OFFSET, + fr4 = 4 + FP_REG_OFFSET, + fr5 = 5 + FP_REG_OFFSET, + fr6 = 6 + FP_REG_OFFSET, + fr7 = 7 + FP_REG_OFFSET, + fr8 = 8 + FP_REG_OFFSET, + fr9 = 9 + FP_REG_OFFSET, + fr10 = 10 + FP_REG_OFFSET, + fr11 = 11 + FP_REG_OFFSET, + fr12 = 12 + FP_REG_OFFSET, + fr13 = 13 + FP_REG_OFFSET, + fr14 = 14 + FP_REG_OFFSET, + fr15 = 15 + FP_REG_OFFSET, + fr16 = 16 + FP_REG_OFFSET, + fr17 = 17 + FP_REG_OFFSET, + fr18 = 18 + FP_REG_OFFSET, + fr19 = 19 + FP_REG_OFFSET, + fr20 = 20 + FP_REG_OFFSET, + fr21 = 21 + FP_REG_OFFSET, + fr22 = 22 + FP_REG_OFFSET, + fr23 = 23 + FP_REG_OFFSET, + fr24 = 24 + FP_REG_OFFSET, + fr25 = 25 + FP_REG_OFFSET, + fr26 = 26 + FP_REG_OFFSET, + fr27 = 27 + FP_REG_OFFSET, + fr28 = 28 + FP_REG_OFFSET, + fr29 = 29 + FP_REG_OFFSET, + fr30 = 30 + FP_REG_OFFSET, + fr31 = 31 + FP_REG_OFFSET, + dr0 = fr0 + FP_DOUBLE, + dr1 = fr2 + FP_DOUBLE, + dr2 = fr4 + FP_DOUBLE, + dr3 = fr6 + FP_DOUBLE, + dr4 = fr8 + FP_DOUBLE, + dr5 = fr10 + FP_DOUBLE, + dr6 = fr12 + FP_DOUBLE, + dr7 = fr14 + FP_DOUBLE, + dr8 = fr16 + FP_DOUBLE, + dr9 = fr18 + FP_DOUBLE, + dr10 = fr20 + FP_DOUBLE, + dr11 = fr22 + FP_DOUBLE, + dr12 = fr24 + FP_DOUBLE, + dr13 = fr26 + FP_DOUBLE, + dr14 = fr28 + FP_DOUBLE, + dr15 = fr30 + FP_DOUBLE, }; /* Target-independent aliases */ @@ -256,30 +256,30 @@ enum NativeRegisterPool { /* Shift encodings */ enum ArmShiftEncodings { - kArmLsl = 0x0, - kArmLsr = 0x1, - kArmAsr = 0x2, - kArmRor = 0x3 + kArmLsl = 0x0, + kArmLsr = 0x1, + kArmAsr = 0x2, + kArmRor = 0x3 }; /* Thumb condition encodings */ enum ArmConditionCode { - kArmCondEq = 0x0, /* 0000 */ - kArmCondNe = 0x1, /* 0001 */ - kArmCondCs = 0x2, /* 0010 */ - kArmCondCc = 0x3, /* 0011 */ - kArmCondMi = 0x4, /* 0100 */ - kArmCondPl = 0x5, /* 0101 */ - kArmCondVs = 0x6, /* 0110 */ - kArmCondVc = 0x7, /* 0111 */ - kArmCondHi = 0x8, /* 1000 */ - kArmCondLs = 0x9, /* 1001 */ - kArmCondGe = 0xa, /* 1010 */ - kArmCondLt = 0xb, /* 1011 */ - kArmCondGt = 0xc, /* 1100 */ - kArmCondLe = 0xd, /* 1101 */ - kArmCondAl = 0xe, /* 1110 */ - kArmCondNv = 0xf, /* 1111 */ + kArmCondEq = 0x0, /* 0000 */ + kArmCondNe = 0x1, /* 0001 */ + kArmCondCs = 0x2, /* 0010 */ + kArmCondCc = 0x3, /* 0011 */ + kArmCondMi = 0x4, /* 0100 */ + kArmCondPl = 0x5, /* 0101 */ + kArmCondVs = 0x6, /* 0110 */ + kArmCondVc = 0x7, /* 0111 */ + kArmCondHi = 0x8, /* 1000 */ + kArmCondLs = 0x9, /* 1001 */ + kArmCondGe = 0xa, /* 1010 */ + kArmCondLt = 0xb, /* 1011 */ + kArmCondGt = 0xc, /* 1100 */ + kArmCondLe = 0xd, /* 1101 */ + kArmCondAl = 0xe, /* 1110 */ + kArmCondNv = 0xf, /* 1111 */ }; #define isPseudoOpcode(opcode) ((int)(opcode) < 0) @@ -290,383 +290,383 @@ enum ArmConditionCode { * Assemble.cc. */ enum ArmOpcode { - kPseudoIntrinsicRetry = -16, - kPseudoSuspendTarget = -15, - kPseudoThrowTarget = -14, - kPseudoCaseLabel = -13, - kPseudoMethodEntry = -12, - kPseudoMethodExit = -11, - kPseudoBarrier = -10, - kPseudoExtended = -9, - kPseudoSSARep = -8, - kPseudoEntryBlock = -7, - kPseudoExitBlock = -6, - kPseudoTargetLabel = -5, - kPseudoDalvikByteCodeBoundary = -4, - kPseudoPseudoAlign4 = -3, - kPseudoEHBlockLabel = -2, - kPseudoNormalBlockLabel = -1, - /************************************************************************/ - kArm16BitData, /* DATA [0] rd[15..0] */ - kThumbAdcRR, /* adc [0100000101] rm[5..3] rd[2..0] */ - kThumbAddRRI3, /* add(1) [0001110] imm_3[8..6] rn[5..3] rd[2..0]*/ - kThumbAddRI8, /* add(2) [00110] rd[10..8] imm_8[7..0] */ - kThumbAddRRR, /* add(3) [0001100] rm[8..6] rn[5..3] rd[2..0] */ - kThumbAddRRLH, /* add(4) [01000100] H12[01] rm[5..3] rd[2..0] */ - kThumbAddRRHL, /* add(4) [01001000] H12[10] rm[5..3] rd[2..0] */ - kThumbAddRRHH, /* add(4) [01001100] H12[11] rm[5..3] rd[2..0] */ - kThumbAddPcRel, /* add(5) [10100] rd[10..8] imm_8[7..0] */ - kThumbAddSpRel, /* add(6) [10101] rd[10..8] imm_8[7..0] */ - kThumbAddSpI7, /* add(7) [101100000] imm_7[6..0] */ - kThumbAndRR, /* and [0100000000] rm[5..3] rd[2..0] */ - kThumbAsrRRI5, /* asr(1) [00010] imm_5[10..6] rm[5..3] rd[2..0] */ - kThumbAsrRR, /* asr(2) [0100000100] rs[5..3] rd[2..0] */ - kThumbBCond, /* b(1) [1101] cond[11..8] offset_8[7..0] */ - kThumbBUncond, /* b(2) [11100] offset_11[10..0] */ - kThumbBicRR, /* bic [0100001110] rm[5..3] rd[2..0] */ - kThumbBkpt, /* bkpt [10111110] imm_8[7..0] */ - kThumbBlx1, /* blx(1) [111] H[10] offset_11[10..0] */ - kThumbBlx2, /* blx(1) [111] H[01] offset_11[10..0] */ - kThumbBl1, /* blx(1) [111] H[10] offset_11[10..0] */ - kThumbBl2, /* blx(1) [111] H[11] offset_11[10..0] */ - kThumbBlxR, /* blx(2) [010001111] rm[6..3] [000] */ - kThumbBx, /* bx [010001110] H2[6..6] rm[5..3] SBZ[000] */ - kThumbCmnRR, /* cmn [0100001011] rm[5..3] rd[2..0] */ - kThumbCmpRI8, /* cmp(1) [00101] rn[10..8] imm_8[7..0] */ - kThumbCmpRR, /* cmp(2) [0100001010] rm[5..3] rd[2..0] */ - kThumbCmpLH, /* cmp(3) [01000101] H12[01] rm[5..3] rd[2..0] */ - kThumbCmpHL, /* cmp(3) [01000110] H12[10] rm[5..3] rd[2..0] */ - kThumbCmpHH, /* cmp(3) [01000111] H12[11] rm[5..3] rd[2..0] */ - kThumbEorRR, /* eor [0100000001] rm[5..3] rd[2..0] */ - kThumbLdmia, /* ldmia [11001] rn[10..8] reglist [7..0] */ - kThumbLdrRRI5, /* ldr(1) [01101] imm_5[10..6] rn[5..3] rd[2..0] */ - kThumbLdrRRR, /* ldr(2) [0101100] rm[8..6] rn[5..3] rd[2..0] */ - kThumbLdrPcRel, /* ldr(3) [01001] rd[10..8] imm_8[7..0] */ - kThumbLdrSpRel, /* ldr(4) [10011] rd[10..8] imm_8[7..0] */ - kThumbLdrbRRI5, /* ldrb(1) [01111] imm_5[10..6] rn[5..3] rd[2..0] */ - kThumbLdrbRRR, /* ldrb(2) [0101110] rm[8..6] rn[5..3] rd[2..0] */ - kThumbLdrhRRI5, /* ldrh(1) [10001] imm_5[10..6] rn[5..3] rd[2..0] */ - kThumbLdrhRRR, /* ldrh(2) [0101101] rm[8..6] rn[5..3] rd[2..0] */ - kThumbLdrsbRRR, /* ldrsb [0101011] rm[8..6] rn[5..3] rd[2..0] */ - kThumbLdrshRRR, /* ldrsh [0101111] rm[8..6] rn[5..3] rd[2..0] */ - kThumbLslRRI5, /* lsl(1) [00000] imm_5[10..6] rm[5..3] rd[2..0] */ - kThumbLslRR, /* lsl(2) [0100000010] rs[5..3] rd[2..0] */ - kThumbLsrRRI5, /* lsr(1) [00001] imm_5[10..6] rm[5..3] rd[2..0] */ - kThumbLsrRR, /* lsr(2) [0100000011] rs[5..3] rd[2..0] */ - kThumbMovImm, /* mov(1) [00100] rd[10..8] imm_8[7..0] */ - kThumbMovRR, /* mov(2) [0001110000] rn[5..3] rd[2..0] */ - kThumbMovRR_H2H, /* mov(3) [01000111] H12[11] rm[5..3] rd[2..0] */ - kThumbMovRR_H2L, /* mov(3) [01000110] H12[01] rm[5..3] rd[2..0] */ - kThumbMovRR_L2H, /* mov(3) [01000101] H12[10] rm[5..3] rd[2..0] */ - kThumbMul, /* mul [0100001101] rm[5..3] rd[2..0] */ - kThumbMvn, /* mvn [0100001111] rm[5..3] rd[2..0] */ - kThumbNeg, /* neg [0100001001] rm[5..3] rd[2..0] */ - kThumbOrr, /* orr [0100001100] rm[5..3] rd[2..0] */ - kThumbPop, /* pop [1011110] r[8..8] rl[7..0] */ - kThumbPush, /* push [1011010] r[8..8] rl[7..0] */ - kThumbRorRR, /* ror [0100000111] rs[5..3] rd[2..0] */ - kThumbSbc, /* sbc [0100000110] rm[5..3] rd[2..0] */ - kThumbStmia, /* stmia [11000] rn[10..8] reglist [7.. 0] */ - kThumbStrRRI5, /* str(1) [01100] imm_5[10..6] rn[5..3] rd[2..0] */ - kThumbStrRRR, /* str(2) [0101000] rm[8..6] rn[5..3] rd[2..0] */ - kThumbStrSpRel, /* str(3) [10010] rd[10..8] imm_8[7..0] */ - kThumbStrbRRI5, /* strb(1) [01110] imm_5[10..6] rn[5..3] rd[2..0] */ - kThumbStrbRRR, /* strb(2) [0101010] rm[8..6] rn[5..3] rd[2..0] */ - kThumbStrhRRI5, /* strh(1) [10000] imm_5[10..6] rn[5..3] rd[2..0] */ - kThumbStrhRRR, /* strh(2) [0101001] rm[8..6] rn[5..3] rd[2..0] */ - kThumbSubRRI3, /* sub(1) [0001111] imm_3[8..6] rn[5..3] rd[2..0]*/ - kThumbSubRI8, /* sub(2) [00111] rd[10..8] imm_8[7..0] */ - kThumbSubRRR, /* sub(3) [0001101] rm[8..6] rn[5..3] rd[2..0] */ - kThumbSubSpI7, /* sub(4) [101100001] imm_7[6..0] */ - kThumbSwi, /* swi [11011111] imm_8[7..0] */ - kThumbTst, /* tst [0100001000] rm[5..3] rn[2..0] */ - kThumb2Vldrs, /* vldr low sx [111011011001] rn[19..16] rd[15-12] - [1010] imm_8[7..0] */ - kThumb2Vldrd, /* vldr low dx [111011011001] rn[19..16] rd[15-12] - [1011] imm_8[7..0] */ - kThumb2Vmuls, /* vmul vd, vn, vm [111011100010] rn[19..16] - rd[15-12] [10100000] rm[3..0] */ - kThumb2Vmuld, /* vmul vd, vn, vm [111011100010] rn[19..16] - rd[15-12] [10110000] rm[3..0] */ - kThumb2Vstrs, /* vstr low sx [111011011000] rn[19..16] rd[15-12] - [1010] imm_8[7..0] */ - kThumb2Vstrd, /* vstr low dx [111011011000] rn[19..16] rd[15-12] - [1011] imm_8[7..0] */ - kThumb2Vsubs, /* vsub vd, vn, vm [111011100011] rn[19..16] - rd[15-12] [10100040] rm[3..0] */ - kThumb2Vsubd, /* vsub vd, vn, vm [111011100011] rn[19..16] - rd[15-12] [10110040] rm[3..0] */ - kThumb2Vadds, /* vadd vd, vn, vm [111011100011] rn[19..16] - rd[15-12] [10100000] rm[3..0] */ - kThumb2Vaddd, /* vadd vd, vn, vm [111011100011] rn[19..16] - rd[15-12] [10110000] rm[3..0] */ - kThumb2Vdivs, /* vdiv vd, vn, vm [111011101000] rn[19..16] - rd[15-12] [10100000] rm[3..0] */ - kThumb2Vdivd, /* vdiv vd, vn, vm [111011101000] rn[19..16] - rd[15-12] [10110000] rm[3..0] */ - kThumb2VcvtIF, /* vcvt.F32 vd, vm [1110111010111000] vd[15..12] - [10101100] vm[3..0] */ - kThumb2VcvtID, /* vcvt.F64 vd, vm [1110111010111000] vd[15..12] - [10111100] vm[3..0] */ - kThumb2VcvtFI, /* vcvt.S32.F32 vd, vm [1110111010111101] vd[15..12] - [10101100] vm[3..0] */ - kThumb2VcvtDI, /* vcvt.S32.F32 vd, vm [1110111010111101] vd[15..12] - [10111100] vm[3..0] */ - kThumb2VcvtFd, /* vcvt.F64.F32 vd, vm [1110111010110111] vd[15..12] - [10101100] vm[3..0] */ - kThumb2VcvtDF, /* vcvt.F32.F64 vd, vm [1110111010110111] vd[15..12] - [10111100] vm[3..0] */ - kThumb2Vsqrts, /* vsqrt.f32 vd, vm [1110111010110001] vd[15..12] - [10101100] vm[3..0] */ - kThumb2Vsqrtd, /* vsqrt.f64 vd, vm [1110111010110001] vd[15..12] - [10111100] vm[3..0] */ - kThumb2MovImmShift, /* mov(T2) rd, # [11110] i [00001001111] - imm3 rd[11..8] imm8 */ - kThumb2MovImm16, /* mov(T3) rd, # [11110] i [0010100] imm4 [0] - imm3 rd[11..8] imm8 */ - kThumb2StrRRI12, /* str(Imm,T3) rd,[rn,#imm12] [111110001100] - rn[19..16] rt[15..12] imm12[11..0] */ - kThumb2LdrRRI12, /* str(Imm,T3) rd,[rn,#imm12] [111110001100] - rn[19..16] rt[15..12] imm12[11..0] */ - kThumb2StrRRI8Predec, /* str(Imm,T4) rd,[rn,#-imm8] [111110000100] - rn[19..16] rt[15..12] [1100] imm[7..0]*/ - kThumb2LdrRRI8Predec, /* ldr(Imm,T4) rd,[rn,#-imm8] [111110000101] - rn[19..16] rt[15..12] [1100] imm[7..0]*/ - kThumb2Cbnz, /* cbnz rd,