From 3f9ace8d90bfc48c8d7bf35af66de8ce8238de7f Mon Sep 17 00:00:00 2001 From: jeffhao Date: Fri, 25 May 2012 11:25:36 -0700 Subject: Fix x86 compilation of aget-wide when src and dest regs are the same. The base register was being overwritten by half of the result, so now a temp is allocated to hold the address that is loaded from. Change-Id: I5efd45f06538f6b7d691c942c9e602b321a090ba --- src/compiler/codegen/GenCommon.cc | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) (limited to 'src/compiler/codegen/GenCommon.cc') diff --git a/src/compiler/codegen/GenCommon.cc b/src/compiler/codegen/GenCommon.cc index 2209084934..e9c348a3f2 100644 --- a/src/compiler/codegen/GenCommon.cc +++ b/src/compiler/codegen/GenCommon.cc @@ -1501,11 +1501,12 @@ void genArrayGet(CompilationUnit* cUnit, MIR* mir, OpSize size, lenOffset, mir, kThrowArrayBounds); } if ((size == kLong) || (size == kDouble)) { + int regAddr = oatAllocTemp(cUnit); + newLIR5(cUnit, kX86Lea32RA, regAddr, rlArray.lowReg, rlIndex.lowReg, scale, dataOffset); + oatFreeTemp(cUnit, rlArray.lowReg); + oatFreeTemp(cUnit, rlIndex.lowReg); rlResult = oatEvalLoc(cUnit, rlDest, regClass, true); - loadBaseIndexedDisp(cUnit, NULL, rlArray.lowReg, rlIndex.lowReg, scale, - dataOffset, rlResult.lowReg, rlResult.highReg, size, - INVALID_SREG); - + loadPair(cUnit, regAddr, rlResult.lowReg, rlResult.highReg); storeValueWide(cUnit, rlDest, rlResult); } else { rlResult = oatEvalLoc(cUnit, rlDest, regClass, true); -- cgit v1.2.3-59-g8ed1b