From 854029c13351fd3a8f7794eb6c2c73af0fde8ac8 Mon Sep 17 00:00:00 2001 From: jeffhao Date: Mon, 23 Jul 2012 17:31:30 -0700 Subject: Fixes to x86 register promotion and load hoisting. Fixed a check to ensure that the mvzxb source register can be byte accessed, not the destination reg. Disabled branch fusion for x86 since code generation for that is unimplemented. Changed regId mask for x86 to allow proper masking of double registers. Also added more output to the disassembler. Change-Id: Idc0a949755ec9ae7b6d5dba38caa5ac01fcc5713 --- src/compiler/codegen/CodegenUtil.cc | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'src/compiler/codegen/CodegenUtil.cc') diff --git a/src/compiler/codegen/CodegenUtil.cc b/src/compiler/codegen/CodegenUtil.cc index 428b4432f2..a33a1627f4 100644 --- a/src/compiler/codegen/CodegenUtil.cc +++ b/src/compiler/codegen/CodegenUtil.cc @@ -74,14 +74,15 @@ inline u8 getRegMaskCommon(int reg) { u8 seed; int shift; - int regId = reg & 0x1f; #if defined(TARGET_X86) + int regId = reg & 0xf; /* * Double registers in x86 are just a single FP register */ seed = 1; #else + int regId = reg & 0x1f; /* * Each double register is equal to a pair of single-precision FP registers */ -- cgit v1.2.3-59-g8ed1b