From 07131ca93c301e5cbd6a8702d6af777e1662fe65 Mon Sep 17 00:00:00 2001
From: buzbee <buzbee@google.com>
Date: Wed, 7 Nov 2012 16:13:14 -0800
Subject: Refactor codegen resource masks

Another step towards a single compiler: unified the bulk of the
target-specific instruction resource use/def maps.  This will
allow more shared code usage, and eliminates target-specific
defines used by otherwise common code.

Change-Id: I4132cb4d31647517a654ffdf6c87843b84af132b
---
 src/compiler/codegen/CodegenUtil.cc | 39 +------------------------------------
 1 file changed, 1 insertion(+), 38 deletions(-)

(limited to 'src/compiler/codegen/CodegenUtil.cc')

diff --git a/src/compiler/codegen/CodegenUtil.cc b/src/compiler/codegen/CodegenUtil.cc
index 7ad2647f18..3041d0b427 100644
--- a/src/compiler/codegen/CodegenUtil.cc
+++ b/src/compiler/codegen/CodegenUtil.cc
@@ -65,36 +65,7 @@ void annotateDalvikRegAccess(LIR* lir, int regId, bool isLoad, bool is64bit)
    * Store the Dalvik register id in aliasInfo. Mark the MSB if it is a 64-bit
    * access.
    */
-  lir->aliasInfo = regId;
-  if (is64bit) {
-    lir->aliasInfo |= 0x80000000;
-  }
-}
-
-/*
- * Decode the register id.
- */
-inline u8 getRegMaskCommon(CompilationUnit* cUnit, int reg)
-{
-  u8 seed;
-  int shift;
-  int regId;
-
-
-  if (cUnit->instructionSet == kX86) {
-    regId = reg & 0xf;
-    /* Double registers in x86 are just a single FP register */
-    seed = 1;
-  } else {
-    regId = reg & 0x1f;
-  /* Each double register is equal to a pair of single-precision FP registers */
-    seed = DOUBLEREG(reg) ? 3 : 1;
-  }
-  /* FP register starts at bit position 16 */
-  shift = FPREG(reg) ? kFPReg0 : 0;
-  /* Expand the double register id into single offset */
-  shift += regId;
-  return (seed << shift);
+  lir->aliasInfo = ENCODE_ALIAS_INFO(regId, is64bit);
 }
 
 u8 oatGetRegMaskCommon(CompilationUnit* cUnit, int reg)
@@ -161,10 +132,6 @@ void setupResourceMasks(CompilationUnit* cUnit, LIR* lir)
     setupRegMask(cUnit, &lir->defMask, lir->operands[1]);
   }
 
-  if (flags & REG_DEF_SP) {
-    lir->defMask |= ENCODE_REG_SP;
-  }
-
 
   if (flags & SETS_CCODES) {
     lir->defMask |= ENCODE_CCODE;
@@ -180,10 +147,6 @@ void setupResourceMasks(CompilationUnit* cUnit, LIR* lir)
     }
   }
 
-  if (flags & REG_USE_SP) {
-    lir->useMask |= ENCODE_REG_SP;
-  }
-
   if (flags & USES_CCODES) {
     lir->useMask |= ENCODE_CCODE;
   }
-- 
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