From f40f890ae3acd7b3275355ec90e2814bba8d4fd6 Mon Sep 17 00:00:00 2001 From: Yixin Shou Date: Thu, 14 Aug 2014 14:10:32 -0400 Subject: Implement inlined shift long for 32bit Added support for x86 inlined shift long for 32bit Change-Id: I6caef60dd7d80227c3057fd6f64b0ecb11025afa Signed-off-by: Yixin Shou --- disassembler/disassembler_x86.cc | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'disassembler/disassembler_x86.cc') diff --git a/disassembler/disassembler_x86.cc b/disassembler/disassembler_x86.cc index 0ca8962282..0bf758efb9 100644 --- a/disassembler/disassembler_x86.cc +++ b/disassembler/disassembler_x86.cc @@ -702,12 +702,24 @@ DISASSEMBLER_ENTRY(cmp, load = true; immediate_bytes = 1; break; + case 0xA5: + opcode << "shld"; + has_modrm = true; + load = true; + cx = true; + break; case 0xAC: opcode << "shrd"; has_modrm = true; load = true; immediate_bytes = 1; break; + case 0xAD: + opcode << "shrd"; + has_modrm = true; + load = true; + cx = true; + break; case 0xAE: if (prefix[0] == 0xF3) { prefix[0] = 0; // clear prefix now it's served its purpose as part of the opcode -- cgit v1.2.3-59-g8ed1b