From 06f1fc01176eceddec076c8136ad80292d2f5fc8 Mon Sep 17 00:00:00 2001
From: Vladimir Marko <vmarko@google.com>
Date: Wed, 26 Jul 2023 09:38:39 +0000
Subject: riscv64: Add basic disassembler.

Add a disassembler that differentiates between 16-bit and
32-bit instructions and disassembles 32-bit LUI, AUIPC,
branches, loads, stores and integral arithmetic operations.

Test: m dump-oat  # and manually inspect output
Bug: 283082089
Change-Id: I0946aaf2bb99d5539efbcecabc111def2a512439
---
 disassembler/disassembler.cc | 8 ++++++++
 1 file changed, 8 insertions(+)

(limited to 'disassembler/disassembler.cc')

diff --git a/disassembler/disassembler.cc b/disassembler/disassembler.cc
index a05183aed6..062892e65f 100644
--- a/disassembler/disassembler.cc
+++ b/disassembler/disassembler.cc
@@ -29,6 +29,10 @@
 # include "disassembler_arm64.h"
 #endif
 
+#ifdef ART_ENABLE_CODEGEN_riscv64
+# include "disassembler_riscv64.h"
+#endif
+
 #if defined(ART_ENABLE_CODEGEN_x86) || defined(ART_ENABLE_CODEGEN_x86_64)
 # include "disassembler_x86.h"
 #endif
@@ -53,6 +57,10 @@ Disassembler* Disassembler::Create(InstructionSet instruction_set, DisassemblerO
     case InstructionSet::kArm64:
       return new arm64::DisassemblerArm64(options);
 #endif
+#ifdef ART_ENABLE_CODEGEN_riscv64
+    case InstructionSet::kRiscv64:
+      return new riscv64::DisassemblerRiscv64(options);
+#endif
 #ifdef ART_ENABLE_CODEGEN_x86
     case InstructionSet::kX86:
       return new x86::DisassemblerX86(options, /* supports_rex= */ false);
-- 
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