From 4eb45631b38445c587c235f1b2fa1699ba820e76 Mon Sep 17 00:00:00 2001 From: Vladimir Marko Date: Tue, 23 Jan 2018 14:26:01 +0000 Subject: ARM: Use r4 for stack overflow check to reduce code size. The code savings are 2 bytes per stack overflow check but this can be rounded up or down to the kArmAlignment (8). Current testing shows the boot image size difference for aosp_taimen-userdebug arm boot*.oat as - before: 17939352 - after: 17881764 (-56KiB, -0.3%) Test: Pixel 2 XL boots. Test: testrunner.py --target -t 018-stack-overflow Bug: 71627785 Change-Id: Icb732b59e9e681b29790e7e07de2710da33245b1 --- compiler/optimizing/code_generator_arm_vixl.cc | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) (limited to 'compiler') diff --git a/compiler/optimizing/code_generator_arm_vixl.cc b/compiler/optimizing/code_generator_arm_vixl.cc index 577fe00dcd..6cbde72cc7 100644 --- a/compiler/optimizing/code_generator_arm_vixl.cc +++ b/compiler/optimizing/code_generator_arm_vixl.cc @@ -2490,8 +2490,12 @@ void CodeGeneratorARMVIXL::GenerateFrameEntry() { } if (!skip_overflow_check) { - UseScratchRegisterScope temps(GetVIXLAssembler()); - vixl32::Register temp = temps.Acquire(); + // Using r4 instead of IP saves 2 bytes. Start by asserting that r4 is available here. + for (vixl32::Register reg : kParameterCoreRegistersVIXL) { + DCHECK(!reg.Is(r4)); + } + DCHECK(!kCoreCalleeSaves.Includes(r4)); + vixl32::Register temp = r4; __ Sub(temp, sp, Operand::From(GetStackOverflowReservedBytes(InstructionSet::kArm))); // The load must immediately precede RecordPcInfo. ExactAssemblyScope aas(GetVIXLAssembler(), -- cgit v1.2.3-59-g8ed1b