From 9dfb1a9d642b9eb627895ef3364736fc839b4fe4 Mon Sep 17 00:00:00 2001 From: Andra Danciu Date: Tue, 22 Sep 2020 13:27:18 +0000 Subject: X86: Implement VarHandle.getAndSet, getAndSetAcquire, getAndSetRelease This commit implements VarHandle getAndSet variants. This implied adding xchgb and xchgw instructions and tests for them. Also, all the varType checks were moved to GenerateVarHandleCommonChecks. Test: ART_HEAP_POISONING=true art/test.py --host -r -t 712-varhandle-invocation --32 Test: ART_HEAP_POISONING=false art/test.py --host -r -t 712-varhandle-invocation --32 Test: ART_USE_READ_BARRIER=true art/test.py --host -r -t 712-varhandle-invocation --32 Test: ART_USE_READ_BARRIER=false art/test.py --host -r -t 712-varhandle-invocation --32 Test: m test-art-host-gtest Bug: 65872996 Change-Id: I675f47e1dbb51a5ece42f20ad8ce552cfef63ffe --- compiler/utils/x86/assembler_x86.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'compiler/utils/x86/assembler_x86.h') diff --git a/compiler/utils/x86/assembler_x86.h b/compiler/utils/x86/assembler_x86.h index 3dfeecb5b7..a9050e6df1 100644 --- a/compiler/utils/x86/assembler_x86.h +++ b/compiler/utils/x86/assembler_x86.h @@ -695,6 +695,10 @@ class X86Assembler final : public Assembler { void fptan(); void fprem(); + void xchgb(ByteRegister reg, const Address& address); + void xchgb(Register reg, const Address& address); + void xchgw(Register reg, const Address& address); + void xchgl(Register dst, Register src); void xchgl(Register reg, const Address& address); -- cgit v1.2.3-59-g8ed1b