From 9aec02fc5df5518c16f1e5a9b6cb198a192db973 Mon Sep 17 00:00:00 2001 From: Calin Juravle Date: Tue, 18 Nov 2014 23:06:35 +0000 Subject: [optimizing compiler] Add shifts Added SHL, SHR, USHR for arm, x86, x86_64. Change-Id: I971f594e270179457e6958acf1401ff7630df07e --- compiler/utils/x86/assembler_x86.cc | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) (limited to 'compiler/utils/x86/assembler_x86.cc') diff --git a/compiler/utils/x86/assembler_x86.cc b/compiler/utils/x86/assembler_x86.cc index afa4a3b958..a297ea3b6e 100644 --- a/compiler/utils/x86/assembler_x86.cc +++ b/compiler/utils/x86/assembler_x86.cc @@ -1126,7 +1126,8 @@ void X86Assembler::sarl(Register operand, Register shifter) { } -void X86Assembler::shld(Register dst, Register src) { +void X86Assembler::shld(Register dst, Register src, Register shifter) { + DCHECK_EQ(ECX, shifter); AssemblerBuffer::EnsureCapacity ensured(&buffer_); EmitUint8(0x0F); EmitUint8(0xA5); @@ -1134,6 +1135,15 @@ void X86Assembler::shld(Register dst, Register src) { } +void X86Assembler::shrd(Register dst, Register src, Register shifter) { + DCHECK_EQ(ECX, shifter); + AssemblerBuffer::EnsureCapacity ensured(&buffer_); + EmitUint8(0x0F); + EmitUint8(0xAD); + EmitRegisterOperand(src, dst); +} + + void X86Assembler::negl(Register reg) { AssemblerBuffer::EnsureCapacity ensured(&buffer_); EmitUint8(0xF7); -- cgit v1.2.3-59-g8ed1b