From 5e13d453acc03fda08dae23e085f7161a73f7032 Mon Sep 17 00:00:00 2001 From: Andra Danciu Date: Tue, 8 Sep 2020 14:35:09 +0000 Subject: X86: Implement VarHandle.compareAndSet() for fields. This commit implements VarHandle compareAndExchange access mode for fields (both static and instance). Int64 and Float64 are not implemented because ParallelMove might fail when moving register pairs. Test: ART_HEAP_POISONING=true art/test.py --host --32 -r -t 712-varhandle-invocations Test: ART_HEAP_POISONING=false art/test.py --host --32 -r -t 712-varhandle-invocations Bug: 65872996 Change-Id: I92e51c348f076c23413e419948f03197c286a619 --- compiler/utils/x86/assembler_x86.cc | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) (limited to 'compiler/utils/x86/assembler_x86.cc') diff --git a/compiler/utils/x86/assembler_x86.cc b/compiler/utils/x86/assembler_x86.cc index c86b1cd522..981894f321 100644 --- a/compiler/utils/x86/assembler_x86.cc +++ b/compiler/utils/x86/assembler_x86.cc @@ -3636,6 +3636,23 @@ X86Assembler* X86Assembler::lock() { } +void X86Assembler::cmpxchgb(const Address& address, ByteRegister reg) { + AssemblerBuffer::EnsureCapacity ensured(&buffer_); + EmitUint8(0x0F); + EmitUint8(0xB0); + EmitOperand(reg, address); +} + + +void X86Assembler::cmpxchgw(const Address& address, Register reg) { + AssemblerBuffer::EnsureCapacity ensured(&buffer_); + EmitOperandSizeOverride(); + EmitUint8(0x0F); + EmitUint8(0xB1); + EmitOperand(reg, address); +} + + void X86Assembler::cmpxchgl(const Address& address, Register reg) { AssemblerBuffer::EnsureCapacity ensured(&buffer_); EmitUint8(0x0F); -- cgit v1.2.3-59-g8ed1b