From a29449dcf57c57fe0876f51367985477317cc557 Mon Sep 17 00:00:00 2001 From: Goran Jakovljevic Date: Wed, 22 Jul 2015 11:08:57 +0200 Subject: [MIPS] Use hard float calling convention for managed code Note that this isn't o32 ABI. Same set of registers is used for arguments ($a0-$a3 and $f12-$f15), but we don't skip registers and fp arguments are never passed via core registers. Change-Id: Ifb883ff6e15758b539137898b49ac2f8ee075f49 --- compiler/utils/mips/assembler_mips.h | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) (limited to 'compiler/utils/mips/assembler_mips.h') diff --git a/compiler/utils/mips/assembler_mips.h b/compiler/utils/mips/assembler_mips.h index df95daddc1..6c8b162d62 100644 --- a/compiler/utils/mips/assembler_mips.h +++ b/compiler/utils/mips/assembler_mips.h @@ -141,7 +141,7 @@ class MipsAssembler FINAL : public Assembler { void LoadSFromOffset(FRegister reg, Register base, int32_t offset); void LoadDFromOffset(DRegister reg, Register base, int32_t offset); void StoreToOffset(StoreOperandType type, Register reg, Register base, int32_t offset); - void StoreFToOffset(FRegister reg, Register base, int32_t offset); + void StoreSToOffset(FRegister reg, Register base, int32_t offset); void StoreDToOffset(DRegister reg, Register base, int32_t offset); // Emit data (e.g. encoded instruction or immediate) to the instruction stream. @@ -277,6 +277,19 @@ class MipsAssembler FINAL : public Assembler { int32_t EncodeBranchOffset(int offset, int32_t inst, bool is_jump); int DecodeBranchOffset(int32_t inst, bool is_jump); + FRegister ConvertDRegToFReg(DRegister reg) { + return static_cast(reg * 2); + } + Register ConvertDRegToReg(DRegister reg) { + return static_cast(reg * 2); + } + Register ConvertFRegToReg(FRegister reg) { + return static_cast(reg); + } + FRegister ConvertRegToFReg(Register reg) { + return static_cast(reg); + } + DISALLOW_COPY_AND_ASSIGN(MipsAssembler); }; -- cgit v1.2.3-59-g8ed1b