From 5c7aed3b9844e240cf785e5885524ac133a04396 Mon Sep 17 00:00:00 2001 From: Alexey Frunze Date: Wed, 25 Nov 2015 19:41:54 -0800 Subject: MIPS32: improvements in code generation (mostly 64-bit ALU ops) Specifically: - Use the delay slot in InvokeRuntime() for direct entry points - Use kNoOutputOverlap wherever possible - Improve and/or/xor/add/sub with 64-bit integer constants - Improve 64-bit shifts by a constant amount on R2+ - More efficient load/store of 64-bit constants (especially, 0 & +0.0) Change-Id: I86d2217c8b5b8e2a9371effc2ce38b9eec62782b --- compiler/utils/mips/assembler_mips.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'compiler/utils/mips/assembler_mips.h') diff --git a/compiler/utils/mips/assembler_mips.h b/compiler/utils/mips/assembler_mips.h index f569aa858c..066e7b0014 100644 --- a/compiler/utils/mips/assembler_mips.h +++ b/compiler/utils/mips/assembler_mips.h @@ -156,6 +156,8 @@ class MipsAssembler FINAL : public Assembler { void Srlv(Register rd, Register rt, Register rs); void Rotrv(Register rd, Register rt, Register rs); // R2+ void Srav(Register rd, Register rt, Register rs); + void Ext(Register rd, Register rt, int pos, int size); // R2+ + void Ins(Register rd, Register rt, int pos, int size); // R2+ void Lb(Register rt, Register rs, uint16_t imm16); void Lh(Register rt, Register rs, uint16_t imm16); -- cgit v1.2.3-59-g8ed1b