From 3acee732f9475fbfc6b046e0044b764e7ff5ac01 Mon Sep 17 00:00:00 2001 From: Chris Larsen Date: Wed, 18 Nov 2015 13:31:08 -0800 Subject: MIPS32: peek*/poke*, and String.charAt intrinsics. - byte libcore.io.Memory.peekByte(long address) - short libcore.io.Memory.peekShort(long address) - int libcore.io.Memory.peekInt(long address) - long libcore.io.Memory.peekLong(long address) - void libcore.io.Memory.pokeByte(long address, byte value) - void libcore.io.Memory.pokeShort(long address, short value) - void libcore.io.Memory.pokeInt(long address, int value) - void libcore.io.Memory.pokeLong(long address, long value) - char java.lang.String.charAt(int index) Change-Id: I5ff30b61d87313d00f0fd3f0ee09f1c454f9c9fa --- compiler/utils/mips/assembler_mips.cc | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) (limited to 'compiler/utils/mips/assembler_mips.cc') diff --git a/compiler/utils/mips/assembler_mips.cc b/compiler/utils/mips/assembler_mips.cc index ac9c097892..6fd65ee9a4 100644 --- a/compiler/utils/mips/assembler_mips.cc +++ b/compiler/utils/mips/assembler_mips.cc @@ -426,6 +426,16 @@ void MipsAssembler::Lw(Register rt, Register rs, uint16_t imm16) { EmitI(0x23, rs, rt, imm16); } +void MipsAssembler::Lwl(Register rt, Register rs, uint16_t imm16) { + CHECK(!IsR6()); + EmitI(0x22, rs, rt, imm16); +} + +void MipsAssembler::Lwr(Register rt, Register rs, uint16_t imm16) { + CHECK(!IsR6()); + EmitI(0x26, rs, rt, imm16); +} + void MipsAssembler::Lbu(Register rt, Register rs, uint16_t imm16) { EmitI(0x24, rs, rt, imm16); } @@ -465,6 +475,16 @@ void MipsAssembler::Sw(Register rt, Register rs, uint16_t imm16) { EmitI(0x2b, rs, rt, imm16); } +void MipsAssembler::Swl(Register rt, Register rs, uint16_t imm16) { + CHECK(!IsR6()); + EmitI(0x2a, rs, rt, imm16); +} + +void MipsAssembler::Swr(Register rt, Register rs, uint16_t imm16) { + CHECK(!IsR6()); + EmitI(0x2e, rs, rt, imm16); +} + void MipsAssembler::Slt(Register rd, Register rs, Register rt) { EmitR(0, rs, rt, rd, 0, 0x2a); } -- cgit v1.2.3-59-g8ed1b