From 376b2bbf7c39108223a7a01568a7b4b04d84eeac Mon Sep 17 00:00:00 2001 From: Nicolas Geoffray Date: Tue, 9 Dec 2014 14:26:32 +0000 Subject: Ensure stack maps are 4 byte aligned. With the recent move to gcc 4.9, we are hitting alignment SIGBUS on ARM. The reason is that gcc will optimize two consecutive 32bits loads into one 64bits load, and the instruction (ldrd) will fail if the data is not aligned. Also removed the emission of mapping table when a method is optimized. The information can be found in the StackMap itself. Change-Id: Icf79406c18a3f4db3c05d52fc2c0dd2e35bf0f8f --- compiler/optimizing/stack_map_stream.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'compiler/optimizing/stack_map_stream.h') diff --git a/compiler/optimizing/stack_map_stream.h b/compiler/optimizing/stack_map_stream.h index 9cfa71c13f..3974e53e6f 100644 --- a/compiler/optimizing/stack_map_stream.h +++ b/compiler/optimizing/stack_map_stream.h @@ -111,7 +111,7 @@ class StackMapStream : public ValueObject { } size_t ComputeStackMapSize() const { - return stack_maps_.Size() * (StackMap::kFixedSize + StackMaskEncodingSize(stack_mask_max_)); + return stack_maps_.Size() * StackMap::ComputeAlignedStackMapSize(stack_mask_max_); } size_t ComputeDexRegisterMapSize() const { -- cgit v1.2.3-59-g8ed1b