From cfa59b49cde265dc5329a7e6956445f9f7a75f15 Mon Sep 17 00:00:00 2001 From: Aart Bik Date: Thu, 31 Aug 2017 09:08:13 -0700 Subject: Basic SIMD reduction support. Rationale: Enables vectorization of x += .... for very basic (simple, same-type) constructs. Paves the way for more complex (narrower and/or mixed-type) constructs, which will be handled by the next CL. This is a revert^2 of I7880c135aee3ed0a39da9ae5b468cbf80e613766 and thus a revert of I1c1c87b6323e01442e8fbd94869ddc9e760ea1fc PS1-2 shows what needed to change, with regression tests Test: test-art-host test-art-target Bug: 64091002, 65212948 Change-Id: I2454778dd0ef1da915c178c7274e1cf33e271d0f --- compiler/optimizing/scheduler_arm64.cc | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) (limited to 'compiler/optimizing/scheduler_arm64.cc') diff --git a/compiler/optimizing/scheduler_arm64.cc b/compiler/optimizing/scheduler_arm64.cc index 510619faf9..1d9d28ab24 100644 --- a/compiler/optimizing/scheduler_arm64.cc +++ b/compiler/optimizing/scheduler_arm64.cc @@ -215,12 +215,12 @@ void SchedulingLatencyVisitorARM64::VisitVecReplicateScalar( last_visited_latency_ = kArm64SIMDReplicateOpLatency; } -void SchedulingLatencyVisitorARM64::VisitVecSetScalars(HVecSetScalars* instr) { - LOG(FATAL) << "Unsupported SIMD instruction " << instr->GetId(); +void SchedulingLatencyVisitorARM64::VisitVecExtractScalar(HVecExtractScalar* instr) { + HandleSimpleArithmeticSIMD(instr); } -void SchedulingLatencyVisitorARM64::VisitVecSumReduce(HVecSumReduce* instr) { - LOG(FATAL) << "Unsupported SIMD instruction " << instr->GetId(); +void SchedulingLatencyVisitorARM64::VisitVecReduce(HVecReduce* instr) { + HandleSimpleArithmeticSIMD(instr); } void SchedulingLatencyVisitorARM64::VisitVecCnv(HVecCnv* instr ATTRIBUTE_UNUSED) { @@ -283,8 +283,8 @@ void SchedulingLatencyVisitorARM64::VisitVecAnd(HVecAnd* instr ATTRIBUTE_UNUSED) last_visited_latency_ = kArm64SIMDIntegerOpLatency; } -void SchedulingLatencyVisitorARM64::VisitVecAndNot(HVecAndNot* instr) { - LOG(FATAL) << "Unsupported SIMD instruction " << instr->GetId(); +void SchedulingLatencyVisitorARM64::VisitVecAndNot(HVecAndNot* instr ATTRIBUTE_UNUSED) { + last_visited_latency_ = kArm64SIMDIntegerOpLatency; } void SchedulingLatencyVisitorARM64::VisitVecOr(HVecOr* instr ATTRIBUTE_UNUSED) { @@ -307,6 +307,10 @@ void SchedulingLatencyVisitorARM64::VisitVecUShr(HVecUShr* instr) { HandleSimpleArithmeticSIMD(instr); } +void SchedulingLatencyVisitorARM64::VisitVecSetScalars(HVecSetScalars* instr) { + HandleSimpleArithmeticSIMD(instr); +} + void SchedulingLatencyVisitorARM64::VisitVecMultiplyAccumulate( HVecMultiplyAccumulate* instr ATTRIBUTE_UNUSED) { last_visited_latency_ = kArm64SIMDMulIntegerLatency; -- cgit v1.2.3-59-g8ed1b