From 7a718338b7654b58b38287de81465b98b5f916d7 Mon Sep 17 00:00:00 2001 From: Vladimír Marko Date: Thu, 19 Oct 2023 11:19:39 +0000 Subject: Reland "riscv64: [codegen] Rewrite and enable Select." This reverts commit 98c15524d7da162dd2571fbeed0e3d7c713a6b75. Reason for revert: Reland with a fix - delay `AsCondition()` call to avoid triggering a DCHECK(). Test: m # aosp_cf_riscv64_phone-userdebug Test: # Edit `run-test` to disable checker, then testrunner.py --target --64 --ndebug --optimizing # Ignore 6 pre-existing failures. Bug: 283082089 Change-Id: I5a270f23d43786e0b422f8fb697a7113c423f1d6 --- compiler/optimizing/optimizing_compiler.cc | 1 + 1 file changed, 1 insertion(+) (limited to 'compiler/optimizing/optimizing_compiler.cc') diff --git a/compiler/optimizing/optimizing_compiler.cc b/compiler/optimizing/optimizing_compiler.cc index 0fea53c247..bc0a66f7db 100644 --- a/compiler/optimizing/optimizing_compiler.cc +++ b/compiler/optimizing/optimizing_compiler.cc @@ -770,6 +770,7 @@ static bool CanAssembleGraphForRiscv64(HGraph* graph) { case HInstruction::kExit: case HInstruction::kGoto: case HInstruction::kPackedSwitch: + case HInstruction::kSelect: case HInstruction::kTryBoundary: case HInstruction::kClearException: case HInstruction::kLoadException: -- cgit v1.2.3-59-g8ed1b