From e3fb245fbdb5e91cf8a9750504df40bd629e0080 Mon Sep 17 00:00:00 2001 From: Alexey Frunze Date: Tue, 10 May 2016 16:08:05 -0700 Subject: MIPS32: Improve method invocation Improvements include: - CodeGeneratorMIPS::GenerateStaticOrDirectCall() supports: - MethodLoadKind::kDirectAddressWithFixup (via literals) - CodePtrLocation::kCallDirectWithFixup (via literals) - MethodLoadKind::kDexCachePcRelative - 32-bit literals to support the above (not ready for general- purpose applications yet because RA is not saved in leaf methods, but is clobbered on MIPS32R2 when simulating PC-relative addressing (MIPS32R6 is OK because it has PC-relative addressing with the lwpc instruction)) - shorter instruction sequences for recursive static/direct calls Tested: - test-art-host-gtest - test-art-target-gtest and test-art-target-run-test-optimizing on: - MIPS32R2 QEMU - CI20 board - MIPS32R6 (2nd arch) QEMU Change-Id: Id5b137ad32d5590487fd154c9a01d3b3e7e044ff --- compiler/optimizing/nodes.h | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'compiler/optimizing/nodes.h') diff --git a/compiler/optimizing/nodes.h b/compiler/optimizing/nodes.h index abc8d5746a..0f0ef26ea9 100644 --- a/compiler/optimizing/nodes.h +++ b/compiler/optimizing/nodes.h @@ -1307,7 +1307,13 @@ class HLoopInformationOutwardIterator : public ValueObject { M(Arm64IntermediateAddress, Instruction) #endif +#ifndef ART_ENABLE_CODEGEN_mips #define FOR_EACH_CONCRETE_INSTRUCTION_MIPS(M) +#else +#define FOR_EACH_CONCRETE_INSTRUCTION_MIPS(M) \ + M(MipsComputeBaseMethodAddress, Instruction) \ + M(MipsDexCacheArraysBase, Instruction) +#endif #define FOR_EACH_CONCRETE_INSTRUCTION_MIPS64(M) @@ -6551,6 +6557,9 @@ class HParallelMove FINAL : public HTemplateInstruction<0> { #ifdef ART_ENABLE_CODEGEN_arm64 #include "nodes_arm64.h" #endif +#ifdef ART_ENABLE_CODEGEN_mips +#include "nodes_mips.h" +#endif #ifdef ART_ENABLE_CODEGEN_x86 #include "nodes_x86.h" #endif -- cgit v1.2.3-59-g8ed1b