From 2dd7b672ea0afd7ea4448b43d24829e9886de3af Mon Sep 17 00:00:00 2001 From: Aart Bik Date: Thu, 7 Dec 2017 11:11:22 -0800 Subject: Fixed spilling bug (visible on ARM64): missed SIMD type. Test: test-art-host test-art-target Change-Id: I6f321446f54943e02f250732ec9da729f633c3a9 --- compiler/optimizing/loop_optimization.cc | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'compiler/optimizing/loop_optimization.cc') diff --git a/compiler/optimizing/loop_optimization.cc b/compiler/optimizing/loop_optimization.cc index 1ca096035e..3dc1ef7534 100644 --- a/compiler/optimizing/loop_optimization.cc +++ b/compiler/optimizing/loop_optimization.cc @@ -1749,7 +1749,8 @@ void HLoopOptimization::GenerateVecReductionPhiInputs(HPhi* phi, HInstruction* r HInstruction* HLoopOptimization::ReduceAndExtractIfNeeded(HInstruction* instruction) { if (instruction->IsPhi()) { HInstruction* input = instruction->InputAt(1); - if (input->IsVecOperation() && !input->IsVecExtractScalar()) { + if (HVecOperation::ReturnsSIMDValue(input)) { + DCHECK(!input->IsPhi()); HVecOperation* input_vector = input->AsVecOperation(); uint32_t vector_length = input_vector->GetVectorLength(); DataType::Type type = input_vector->GetPackedType(); -- cgit v1.2.3-59-g8ed1b