From da40309f61f98c16d7d58e4c34cc0f5eef626f93 Mon Sep 17 00:00:00 2001 From: Zheng Xu Date: Fri, 24 Apr 2015 17:35:39 +0800 Subject: Opt compiler: ARM64: Use ldp/stp on arm64 for slow paths. It should be a bit faster than load/store single registers and reduce the code size. Change-Id: I67b8302adf6174b7bb728f7c2afd2c237e34ffde --- compiler/optimizing/code_generator.h | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) (limited to 'compiler/optimizing/code_generator.h') diff --git a/compiler/optimizing/code_generator.h b/compiler/optimizing/code_generator.h index e536b2d0ee..9b3cf8a45f 100644 --- a/compiler/optimizing/code_generator.h +++ b/compiler/optimizing/code_generator.h @@ -77,8 +77,8 @@ class SlowPathCode : public ArenaObject { virtual void EmitNativeCode(CodeGenerator* codegen) = 0; - void SaveLiveRegisters(CodeGenerator* codegen, LocationSummary* locations); - void RestoreLiveRegisters(CodeGenerator* codegen, LocationSummary* locations); + virtual void SaveLiveRegisters(CodeGenerator* codegen, LocationSummary* locations); + virtual void RestoreLiveRegisters(CodeGenerator* codegen, LocationSummary* locations); void RecordPcInfo(CodeGenerator* codegen, HInstruction* instruction, uint32_t dex_pc); bool IsCoreRegisterSaved(int reg) const { @@ -97,11 +97,13 @@ class SlowPathCode : public ArenaObject { return saved_fpu_stack_offsets_[reg]; } - private: + protected: static constexpr size_t kMaximumNumberOfExpectedRegisters = 32; static constexpr uint32_t kRegisterNotSaved = -1; uint32_t saved_core_stack_offsets_[kMaximumNumberOfExpectedRegisters]; uint32_t saved_fpu_stack_offsets_[kMaximumNumberOfExpectedRegisters]; + + private: DISALLOW_COPY_AND_ASSIGN(SlowPathCode); }; -- cgit v1.2.3-59-g8ed1b