From 57cacb720e6f995aa1a42df6e2e6470a9ec57261 Mon Sep 17 00:00:00 2001 From: Nicolas Geoffray Date: Sun, 8 Dec 2019 22:07:08 +0000 Subject: Refactor OSR related code to prepare for "true" OSR. - Make the compiler restore all callee-save registers. - Make the compiler return any value in a core register: this simplifies the current stub, and will also avoid having to look at the return type (and reading the shorty) when returning to an nterp frame. - Add OsrData and offsets of its members to be used by nterp. Test: test.py Bug: 27094810 Change-Id: Ifa4f4877ab8b1f0c6a96feccea30c909942eb2fa --- compiler/optimizing/code_generator.cc | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'compiler/optimizing/code_generator.cc') diff --git a/compiler/optimizing/code_generator.cc b/compiler/optimizing/code_generator.cc index 8406ef5504..a94514c070 100644 --- a/compiler/optimizing/code_generator.cc +++ b/compiler/optimizing/code_generator.cc @@ -1011,6 +1011,20 @@ CodeGenerator::CodeGenerator(HGraph* graph, is_leaf_(true), requires_current_method_(false), code_generation_data_() { + if (GetGraph()->IsCompilingOsr()) { + // Make OSR methods have all registers spilled, this simplifies the logic of + // jumping to the compiled code directly. + for (size_t i = 0; i < number_of_core_registers_; ++i) { + if (IsCoreCalleeSaveRegister(i)) { + AddAllocatedRegister(Location::RegisterLocation(i)); + } + } + for (size_t i = 0; i < number_of_fpu_registers_; ++i) { + if (IsFloatingPointCalleeSaveRegister(i)) { + AddAllocatedRegister(Location::FpuRegisterLocation(i)); + } + } + } } CodeGenerator::~CodeGenerator() {} -- cgit v1.2.3-59-g8ed1b