From d65c51a556e6649db4e18bd083c8fec37607a442 Mon Sep 17 00:00:00 2001 From: Mark Mendell Date: Tue, 29 Apr 2014 16:55:20 -0400 Subject: ART: Add support for constant vector literals Add in some vector instructions. Implement the ConstVector instruction, which takes 4 words of data and loads it into an XMM register. Initially, only the ConstVector MIR opcode is implemented. Others will be added after this one goes in. Change-Id: I5c79bc8b7de9030ef1c213fc8b227debc47f6337 Signed-off-by: Mark Mendell --- compiler/dex/quick/codegen_util.cc | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'compiler/dex/quick/codegen_util.cc') diff --git a/compiler/dex/quick/codegen_util.cc b/compiler/dex/quick/codegen_util.cc index 784dfaf96a..6f812384e4 100644 --- a/compiler/dex/quick/codegen_util.cc +++ b/compiler/dex/quick/codegen_util.cc @@ -1203,4 +1203,8 @@ RegLocation Mir2Lir::NarrowRegLoc(RegLocation loc) { return loc; } +void Mir2Lir::GenMachineSpecificExtendedMethodMIR(BasicBlock* bb, MIR* mir) { + LOG(FATAL) << "Unknown MIR opcode not supported on this architecture"; +} + } // namespace art -- cgit v1.2.3-59-g8ed1b