From e45fb9e7976c8462b94a58ad60b006b0eacec49f Mon Sep 17 00:00:00 2001 From: Matteo Franchin Date: Tue, 6 May 2014 10:10:30 +0100 Subject: AArch64: Change arm64 backend to produce A64 code. The arm backend clone is changed to produce A64 code. At the moment this backend can only compile simple methods (both leaf and non-leaf). Most of the work on the assembler (assembler_arm64.cc) has been done. Some work on the LIR generation layer (functions such as OpRegRegImm & friends) is still necessary. The register allocator still needs to be adapted to the A64 instruction set (it is mostly unchanged from the arm backend). Offsets for helpers in gen_invoke.cc still need to be changed to work on 64-bit. Change-Id: I388f99eeb832857981c7d9d5cb5b71af64a4b921 --- compiler/compilers.cc | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'compiler/compilers.cc') diff --git a/compiler/compilers.cc b/compiler/compilers.cc index 6bf0058196..79a85db79a 100644 --- a/compiler/compilers.cc +++ b/compiler/compilers.cc @@ -102,8 +102,7 @@ Backend* QuickCompiler::GetCodeGenerator(CompilationUnit* cu, void* compilation_ mir_to_lir = ArmCodeGenerator(cu, cu->mir_graph.get(), &cu->arena); break; case kArm64: - // TODO(Arm64): replace the generator below with a proper one. - mir_to_lir = ArmCodeGenerator(cu, cu->mir_graph.get(), &cu->arena); + mir_to_lir = Arm64CodeGenerator(cu, cu->mir_graph.get(), &cu->arena); break; case kMips: mir_to_lir = MipsCodeGenerator(cu, cu->mir_graph.get(), &cu->arena); -- cgit v1.2.3-59-g8ed1b