From 22ccc3a93d32fa6991535eaebb17daf5abaf4ebf Mon Sep 17 00:00:00 2001 From: Roland Levillain Date: Tue, 24 Nov 2015 13:10:05 +0000 Subject: ARM64 read barrier support for concurrent GC in Optimizing. This first implementation uses slow paths to instrument heap reference loads and GC root loads for the concurrent copying collector, respectively calling the artReadBarrierSlow and artReadBarrierForRootSlow runtime entry points. Notes: - This implementation does not instrument HInvokeVirtual nor HInvokeInterface instructions (for class reference loads), as the corresponding read barriers are not stricly required with the current concurrent copying collector. - Intrinsics which may eventually call (on slow path) are disabled when read barriers are enabled, as the current slow path infrastructure does not support this case. - When read barriers are enabled, the code generated for a HArraySet instruction always go into the array set slow path for object arrays (delegating the operation to the runtime), as we are lacking a mechanism to keep a temporary register live accross a runtime call (needed for the instrumentation of type checking code, which requires two successive read barriers). Bug: 12687968 Change-Id: Icfb74f67bf23ae80e7723ee6a0c9ff34ba325d48 --- compiler/common_compiler_test.h | 1 + 1 file changed, 1 insertion(+) (limited to 'compiler/common_compiler_test.h') diff --git a/compiler/common_compiler_test.h b/compiler/common_compiler_test.h index 7b0e5af246..1b57b7d1d2 100644 --- a/compiler/common_compiler_test.h +++ b/compiler/common_compiler_test.h @@ -128,6 +128,7 @@ class CommonCompilerTest : public CommonRuntimeTest { #define TEST_DISABLED_FOR_READ_BARRIER_WITH_OPTIMIZING_FOR_UNSUPPORTED_INSTRUCTION_SETS() \ if (kUseReadBarrier && GetCompilerKind() == Compiler::kOptimizing) { \ switch (GetInstructionSet()) { \ + case kArm64: \ case kThumb2: \ case kX86: \ case kX86_64: \ -- cgit v1.2.3-59-g8ed1b