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Support all condition types inside the condition when performing
diamond loop auto-vectorization. This allows diamond loop
auto-vectorization to be performed on a greater variety of loops.
To support this change, new vector condition nodes are added to
mirror the scalar condition nodes.
Also add a new gtest class to test whether predicated vectorization
can be performed on different combinations of condition types and
data types.
Authors: Chris Jones <christopher.jones@arm.com>,
Konstantin Baladurin <konstantin.baladurin@arm.com>
Test: export ART_FORCE_TRY_PREDICATED_SIMD=true && \
art/test.py --target --optimizing
Test: art/test.py --target --host --optimizing
Test: 661-checker-simd-cf-loops
Test: art/test.py --gtest art_compiler_tests
Change-Id: Ic9c925f1a58ada13d9031de3b445dcd4f77764b7
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ART MTS package size comparison before and after this change:
* on Arm64:
```
build/soong/soong_ui.bash --make-mode dist TARGET_PRODUCT=aosp_arm64 \
TARGET_RELEASE=mainline WITH_DEXPREOPT=false mts-art \
&& stat -c %s out/host/linux-x86/mts-art/android-mts-art.zip
```
Before: 1465306040 bytes (~1397 MiB)
After: 1463062851 bytes (~1395 MiB)
Variation: -2243189 bytes (~2 MiB) (-0.15%)
* on x86-64:
```
build/soong/soong_ui.bash --make-mode dist TARGET_PRODUCT=aosp_x86_64 \
TARGET_RELEASE=mainline WITH_DEXPREOPT=false mts-art \
&& stat -c %s out/host/linux-x86/mts-art/android-mts-art.zip
```
Before: 1483408375 bytes (~1415 MiB)
After: 1481164834 bytes (~1413 MiB)
Variation: −2243541 bytes (~2 MiB) (-0.15%)
Test: Run the following command and verify that its output contains none of
the ART run-test modules mentioned in b/363075236#comment1:
m mts-art && \
unzip -l \
$ANDROID_SOONG_HOST_OUT/mts-art/android-mts-art-tests_list.zip
Bug: 363075236
Bug: 167385698
Change-Id: I5d0aaa042df47a1f8073bc522db7348ebc75c959
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This patch sets the traditional vectorization mode to be
the default one; previously, if the target supported
predicated vectorization (e.g. arm64 SVE), predicated
vectorization was be tried for ALL loops.
Motivation: this is a prerequisite for the further patches
to enable mixed mode vectorization - when most of the loops
are vectorized in traditional mode and some others - in
predicated.
A new env variable - ART_FORCE_TRY_PREDICATED_SIMD - is
introduced to force-use the predicated mode; this could be
set to true for testing purposes.
Checker tests are adjusted accordingly - to also check the
ART_FORCE_TRY_PREDICATED_SIMD variable.
Test: test-art-target, test-art-host.
Test: test-art-target with ART_FORCE_TRY_PREDICATED_SIMD=true.
Original author: Artem Serov <Artem.Serov@linaro.org>
Test: ./art/test/testrunner/testrunner.py --host --optimizing --jit
Test: ./art/test/testrunner/testrunner.py --target --optimizing --jit
(with ART_FORCE_TRY_PREDICATED_SIMD=true and without)
Test: 661-checker-simd-cf-loops.
Test: target tests on arm64 with SVE
Change-Id: I57852f3777da6f86d615429d1a3c703cb87fbac8
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This CL enables predicated autovectorization of loops with
control flow, currently only for simple diamond pattern ones:
header------------------+
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diamond_hif |
/ \ |
diamond_true diamond_false |
\ / |
back_edge |
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+---------------------+
Original author: Artem Serov <Artem.Serov@linaro.org>
Test: ./art/test.py --host --optimizing --jit
Test: ./art/test.py --target --optimizing --jit
Test: 661-checker-simd-cf-loops.
Test: target tests on arm64 with SVE (for details see
art/test/README.arm_fvp).
Change-Id: I8dbc266278b4ab074b831d6c224f02024030cc8a
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