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2017-11-02ART: Make InstructionSet an enum class and add kLast. Vladimir Marko
Adding InstructionSet::kLast shall make it easier to encode the InstructionSet in fewer bits using BitField<>. However, introducing `kLast` into the `art` namespace is not a good idea, so we change the InstructionSet to an enum class. This also uncovered a case of InstructionSet::kNone being erroneously used instead of vixl32::Condition::None(), so it's good to remove `kNone` from the `art` namespace. Test: m test-art-host-gtest Test: testrunner.py --host --optimizing Change-Id: I6fa6168dfba4ed6da86d021a69c80224f09997a6
2017-10-19MIPS: Introduce a few MSA instructions Lena Djokic
These instructions are needed for SIMD reduction. Also added assembler tests for each instruction. Test: mma test-art-host-gtest Change-Id: I0f02618a14b4cbcc3b81ce51dd2586fa4cdbfd18
2017-09-27Simplify Android.bp files Dan Willemsen
Remove clang: true, it's the default. Remove target.android.shared_libs "libdl", since it's already part of the system_shared_libs list. Remove host_ldlibs, since -ldl and -lpthread are automatically added on Darwin and Linux. -lrt is automatically added on Linux. Test: mmma art Change-Id: I18aa6aa5b49cad31caf6820b1974057ad14a2798
2017-08-17Merge "MIPS: Eliminate hard-coded offsets in branches" Treehugger Robot
2017-08-11Bunch of SIMD for x86 and x86_64 Aart Bik
Rationale: Few instructions needed to implement SIMD reductions. Test: assembler_x86_[64_]test Bug: 64091002 Change-Id: I785acfc6c8c4ad4f290ddeab32da9b767f944e24
2017-07-30MIPS: Eliminate hard-coded offsets in branches Alexey Frunze
The bulk of the change is in the assemblers and their tests. The main goal is to introduce "bare" branches to labels (as opposed to the existing bare branches with relative offsets, whose direct use we want to eliminate). These branches' delay/forbidden slots are filled manually and these branches do not promote to long (the branch target must be within reach of the individual branch instruction). The secondary goal is to add more branch tests (mainly for bare vs non-bare branches and a few extra) and refactor and reorganize the branch test code a bit. The third goal is to improve idiom recognition in the disassembler, including branch idioms and a few others. Further details: - introduce bare branches (R2 and R6) to labels, making R2 branches available for use on R6 - make use of the above in the code generators - align beqz/bnez with their GNU assembler encoding to simplify and shorten the test code - update the CFI test because of the above - add trivial tests for bare and non-bare branches (addressing existing debt as well) - add MIPS32R6 tests for long beqc/beqzc/bc (debt) - add MIPS64R6 long beqzc test (debt) - group branch tests together - group constant/literal/address-loading tests together - make the disassembler recognize: - b/beqz/bnez (beq/bne with $zero reg) - nal (bltzal with $zero reg) - bal/bgezal (bal = bgezal with $zero reg) - move (or with $zero reg) - li (ori/addiu with $zero reg) - dli (daddiu with $zero reg) - disassemble 16-bit immediate operands (in andi, ori, xori, li, dli) as signed or unsigned as appropriate - drop unused instructions (bltzl, bltzall, addi) from the disassembler as there are no plans to use them Test: test-art-host-gtest Test: booted MIPS64 (with 2nd arch MIPS32R6) in QEMU Test: test-art-target-gtest Test: testrunner.py --target --optimizing Test: same tests as above on CI20 Test: booted MIPS32R2 in QEMU Change-Id: I62b74a6c00ce0651528114806ba24a59ba564a73
2017-07-25MIPS: Add maddv/msubv MSA instructions Lena Djokic
Added maddv.df, msubv.df, fmadd.df and fmsub.df MSA instructions in assembler, disassembler and tests. These instructions are needed for multiplyaccumulate support in ART Vectorizer. Test: mma test-art-host-gtest Change-Id: Idef7faaeed47f1fef83fa58676ce664afe24ffe8
2017-07-24ART: Include cleanup Andreas Gampe
Let clang-format reorder the header includes. Derived with: * .clang-format: BasedOnStyle: Google IncludeIsMainRegex: '(_test|-inl)?$' * Steps: find . -name '*.cc' -o -name '*.h' | xargs sed -i.bak -e 's/^#include/ #include/' ; git commit -a -m 'ART: Include cleanup' git-clang-format -style=file HEAD^ manual inspection git commit -a --amend Test: mmma art Change-Id: Ia963a8ce3ce5f96b5e78acd587e26908c7a70d02
2017-07-10MIPS: Print register names instead of register numbers in disassembler Goran Jakovljevic
Test: ./testrunner.py --optimizing --target on CI20 and in QEMU Test: mma test-art-host-gtest Change-Id: I1fc375ae34ee8fd994192705c45d8f30a35dfc56
2017-06-07MIPS64: Add min/max MSA instructions Goran Jakovljevic
Added min_s.df, max_s.df, min_u.df, max_u.df, fmin.df and fmax.df MSA instructions in assembler, disassembler and tests. These instructions are needed for min/max support in ART Vectorizer. Test: mma test-art-host-gtest Change-Id: I4e8dd18ca501ac09d938a49388e4a43116660ec9
2017-05-24ART: Fix soong defaults order Andreas Gampe
Defaults are prepended in order of their appearance. Move debug defaults first. Bug: 31098551 Test: m test-art-host Change-Id: I9a64db34d0e398d336dac080c7234cad77b719ee
2017-05-16Merge "Min/max SIMDization support." Aart Bik
2017-05-15Min/max SIMDization support. Aart Bik
Rationale: The more vectorized, the better! Test: test-art-target, test-art-host Change-Id: I758becca5beaa5b97fab2ab70f2e00cb53458703
2017-05-11MIPS64: Add ilvr.df MSA instructions Goran Jakovljevic
These instructions are needed for compressed string support in ART Vectorizer. Test: mma test-art-host-gtest Change-Id: I269473bb8bcce5aba72201380bb71860e5498d73
2017-04-21MIPS64: Add add_a.df, ave_s/u.df and aver_s/u.df MSA instructions Goran Jakovljevic
These instructions are needed for implementing VecAbs and VecHalvingAdd visitors. Test: mma test-art-host-gtest Change-Id: Idaec03ea32bbeaba9cb7476dd0f740aa4d9cfa70
2017-04-04Merge "SIMD pcmpgtb,w,d,q for x86/x86_64" Treehugger Robot
2017-04-04SIMD pcmpgtb,w,d,q for x86/x86_64 Aart Bik
Rationale: Enables fast compare gt. Test: assembler_x86[_64]_test Change-Id: I0a069649480529f3fec2c2b100e2aaaa2cd79820
2017-04-03Merge "MIPS64: Add ldi.df MSA instruction" Aart Bik
2017-03-31SIMD pavgb,w for x86/x86_64 Aart Bik
Rationale: Break-out CL of ART Vectorizer. Enables fast halving add with rounding Bug: 34083438 Test: assembler_x86[_64]_test Change-Id: I09173376b803d671a6b05a33e630f45f778cea52
2017-03-31MIPS64: Add ldi.df MSA instruction Goran Jakovljevic
Also fixes RepeatTemplatedRegisterImmBits template. Test: mma test-art-host-gtest Change-Id: Ib23f8a65ba924623f8c3a2d75d4ec4491d18feb0
2017-03-22Properly disassemble cmpeq for x86/x86_64 Aart Bik
Rationale: Break-out CL of ART Vectorizer. Bug: 34083438 Test: test-art-host Change-Id: I4027033cbe48a19c426326fc307fe4437b143d61
2017-03-17Revert "Revert "Introduce a number of MSA instructions for MIPS64"" Goran Jakovljevic
This reverts commit 219bf253e5158c4f3438e70864b8bf7235c1e193. Fixed memory leak in assembler_mips64_test.cc. Test: mma valgrind-test-art-host-gtest-assembler_mips64_test64 Change-Id: I238833fd4555623c2716432fc67eab7696f1e28e
2017-03-15Revert "Introduce a number of MSA instructions for MIPS64" Aart Bik
This reverts commit dcabc8b740bf3066d59348ffdf21c164d2b27cb4. Reason: FAILING TESTS valgrind-test-art-host-gtest-assembler_mips64_test32 ninja: build stopped: subcommand failed. 19:36:36 ninja failed with: exit status 1 make: *** [run_soong_ui] Error 1 Change-Id: If658375528d2a0f34bb6b22b6565fab1d863b3f5
2017-03-14Introduce a number of MSA instructions for MIPS64 Goran Jakovljevic
Added a number of MSA (The MIPS SIMD Architecture) instructions. Added assembler tests for each instruction. Made necessary changes in disassembler for these instructions. Test: mma test-art-host-gtest Change-Id: I380f02c6ae5424a96ad999037153228acb07a108
2017-02-17x86/string compression: Use TESTB instead of TESTL in String.charAt(). Vladimir Marko
And fix disassembly of the now unused TESTL. Test: testrunner.py --host with string compression enabled. Test: Manual inspection of dump-oat output. Bug: 35433135 Bug: 31040547 Change-Id: I36c955bc1f2243954ecc315266a2f3fce5d87693
2017-02-13Added a few integral SIMD extensions for x86/x86_64 (SSE). Aart Bik
Rationale: ART vectorizer needs SIMD for integer operations too. Test: assembler_x86[_64]_test Bug: 34083438 Change-Id: Id6fec558c617d38cb643839eafcd10e59dcd6e0a
2017-01-03Merge "MIPS64: java.lang.String.getChars" Treehugger Robot
2016-12-13MIPS64: Improve method invocation. Alexey Frunze
Improvements include: - support for all kinds of method loads and static/direct calls - 32-bit and 64-bit literals for the above and future work - shorter instruction sequences for recursive static/direct calls Also: - include the MIPS64 dinsu instruction (missed earlier) and minor clean-up in the disassembler - properly prefix constant names with 'k' in relative patcher tests Test: test-art-host-gtest Test: booted MIPS64 (with 2nd arch MIPS32R6) in QEMU Test: "make -j1 ART_TEST_DEFAULT_COMPILER=false ART_TEST_OPTIMIZING=true ART_TEST_INTERPRETER=false ART_TEST_JIT=false ART_TEST_PIC_TEST=true test-art-target-run-test64" Change-Id: I19876fa5316b68531af7dfddfce90d2068433116
2016-12-02MIPS64: java.lang.String.getChars Chris Larsen
Test: run-test --64 --optimizing 020-string Test: run-test --64 020-string Test: run-test --64 --no-prebuild --optimizing 020-string Test: run-test --64 --no-prebuild 020-string Test: run-test --64 --optimizing 082-inline-execute Test: run-test --64 082-inline-execute Test: run-test --64 --no-prebuild --optimizing 082-inline-execute Test: run-test --64 --no-prebuild 082-inline-execute Test: mma -j2 ART_TEST_OPTIMIZING=true test-art-target-run-test Test: mma test-art-target-gtest -j2 Test: booted MIPS64R6 emulator. Note: All tests run against MIPS64 QEMU. Change-Id: I48b9a87465f2516044a2e4f598cc5dce56b0d1c9
2016-11-25ARM: VIXL32: Fix breaking changes from recent VIXL update. Scott Wakeling
Test: m test-art-host Test: m test-art-target Change-Id: I02a608bf51b889a2bfff43272a3619582bf9cf20
2016-10-20MIPS32: Implement HSelect Alexey Frunze
Test: booted MIPS32R2 in QEMU Test: test-art-target-run-test-optimizing (MIPS32R2) on CI20 Test: booted MIPS64 (with 2nd arch MIPS32R6) in QEMU Test: test-art-target-run-test-optimizing (MIPS32R6) in QEMU Test: test-art-host-gtest Change-Id: I8a8127d8d29cb5df84ed6f4fd4478f8d889e5cb7
2016-09-27ARM64: Update the disassembler after the VIXL update. Alexandre Rames
Test: top-level `make -j40` `mma -j40 test-art-target-test-optimizing dist` `mma -j40 test-art-host dist` Change-Id: I173976998dc8e3e466ca8502c3fdc447f9019cee
2016-09-16ARM: VIXL32: Implement a disassembler. Anton Kirilov
Test: m test-art-host Test: m test-art-target Test: manual comparison with the previous oatdump output Change-Id: I21ae26406200e455b8b036f53d585ea0b1bd11be
2016-09-12ART: Remove libart from disassembler Andreas Gampe
The disassembler now only requires the headers. Also remove liblog dependency. Bug: 15436106 Test: m test-art-host Test: m test-art-host-gtest-oatdump_test Test: m test-art-target-gtest-oatdump_test Change-Id: Iecff5b7f8ffd81c89ea81a4de8bfab77b5c103a7
2016-09-08Convert more of art to Android.bp Colin Cross
Relanding I1b10f140e17dd5e12a9d7f6a29d47cf61f5bf6ef, with fixes to compile dalvikvm32 and dalvikvm64, and add them as dependencies of tests. Also fixes HOST_PREFER_32_BIT by moving the override from the defaults, which are not used by everything in art, to the art_cc_binary module type. Test: rm -rf out/host; m -j HOST_PREFER_32_BIT test-art-host; m -j test-art-host Change-Id: I64d3eef5080e128103d052497760c3521cc253c6
2016-09-08ART: Detach libart-disassembler from libart Andreas Gampe
Some more intrusive changes than I would have liked, as long as ART logging is different from libbase logging. Fix up some includes. Bug: 15436106 Bug: 31338270 Test: m test-art-host Change-Id: I9fbe4b85b2d74e079a4981f3aec9af63b163a461
2016-09-06Add build rules for statically linked oatdump on host. Roland Levillain
Also extend oatdump_test to exercise oatdump(d)s. Test: ART_BUILD_HOST_STATIC=true m test-art-host-gtest-oatdump_test Bug: 29530992 Change-Id: I6eb6c96f385832733d18d0400abd9974a6d8e45c
2016-08-19ART: Add thread offset printing hook to disassembler Andreas Gampe
To prepare separation of disassembler from libart, add a function hook to the disassembler options for thread offset name printing. Bug: 15436106 Change-Id: I9e9b7e565ae923952c64026f675ac527b560f51b
2016-08-12ARM64: VIXL: Support a newer version of VIXL. Artem Serov
Please note that compiling VIXL with -Wshadow is a known VIXL issue. This will be resolved in a later version of VIXL, when we can drop the deprecated API for getters and setters. For more info take a look at VIXL_DEPRECATED in the VIXL source code. Change-Id: Iea30b1a7b065f9b16a92c6cc7ebdc50ef068b348
2016-08-11ARM64: Use libvixld when compiling for debug mode. Alexandre Rames
VIXL debug mode checks are valuable to catch dangerous code that can lead to bugs. This patch includes a couple of fixes for issues spotted by VIXL in debug mode. Change-Id: I388ae1ffd9256ad74d0b6ce06f79cc7927a5f28a
2016-08-02Merge "ARM: Embed 0.0 in VCMP." Vladimir Marko
2016-08-02ARM: Embed 0.0 in VCMP. Vladimir Marko
Test: Run ART test suite on Nexus 5. Change-Id: I5cbbd98c4d64a4d9213e27adcae929ead5099a39
2016-08-02Merge "ART: Convert pointer size to enum" Treehugger Robot
2016-08-01ART: Convert pointer size to enum Andreas Gampe
Move away from size_t to dedicated enum (class). Bug: 30373134 Bug: 30419309 Test: m test-art-host Change-Id: Id453c330f1065012e7d4f9fc24ac477cc9bb9269
2016-08-01Fixed bug in disassembly of roundss/roundsd Aart Bik
Rationale: These instructions should be marked as load, so that, using Intel syntax, destination (xmm0) appears at left hand side, as in roundss xmm0, xmm1 and not the other way around. First I suspected a bug in the encoding (hence the test) and even the register allocator, but since the code behaved correctly, only disassembly was really wrong. Test: disassembler_x86_test (but nothing for actual disassembly) BUG=26327751 Change-Id: I060ef57f4d5a64cdc04b97ae8a799d1c0d22da05
2016-07-28ART: remove gcc cruft from the makefiles Colin Cross
ART only builds with clang now, delete all logic to determine gcc vs. clang, and move all LOCAL_CLANG_CFLAGS into LOCAL_CFLAGS. Test: mma, make test-art-host, make test-art-target Change-Id: I578615233ad3e71af18afb47bb11f3be8417216c
2016-07-18Merge "Fixes to build against new VIXL interface." Roland Levillain
2016-07-15Merge "ART: disassembler_x86 doesn't recognize NOPs" Treehugger Robot
2016-07-15Fixes to build against new VIXL interface. Scott Wakeling
- Fix namespace usage and use of deprecated functions. - Link all dependants to new libvixl-arm64 target for now. Change-Id: Iee6f299784fd663fc2a759f3ee816fdbc511e509
2016-07-12ARM: Shorter fast-path for read barrier field load. Vladimir Marko
Reduces the aosp_hammerhead-userdebug boot.oat by 2.2MiB, i.e. ~2.2%, in the ART_USE_READ_BARRIER=true configuration. Test: Tested with ART_USE_READ_BARRIER=true on Nexus 5. Bug: 29966877 Bug: 12687968 Change-Id: I4454150003e12a1aa7f0cf451627dc1ee9a495ae
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