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ArtDisassemblerTest.LoadLiteralVisit tests the disassembly output of
ldr by reading from pc + 0. It was using 64-bit gpr and fpr registers
but we only know the contents of 32-bits (the encoding of the
instruction). The other 32-bits could be uninitialized or maybe even
unaccessible. So use 32-bit registers so we can expect a known value
always.
Bug: 258391316
Test: art_disassembler_tests in asan config
Change-Id: Iaaf2bbe3912772593af64a54e49519ae40e18f14
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Avoid creating `Runtime` or create the `Runtime` with a boot
image to make the test setup faster.
Test: m test-art-host-gtest
Test: run-gtests.sh
Change-Id: I3f09de81491402442f1704d25bb06de995d8a3ca
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This patch is needed as the VIXL disassembler visitor instrumentation
interface has changed.
VIXL now has all of its instruction specific instrumentation functions
declared as private and therefore they cannot be overriden by the
ART disassembler class as it was before.
Now it is required by VIXL to override the main catch-all generic
Visit function, which now passes with it a metadata object. This
metadata is then used in the overriding function to select which
instrumentation to perform based on the instruction type detected
in the instruction sequence at runtime.
This patch is tested against ART with the public VIXL tag 6.3.0
(https://github.com/Linaro/vixl/tree/6.3.0) having been
merged into the AOSP ./external/vixl repo.
Test: test-art-target
Test: test-art-host
Test: test-art-host-vixl
Test: run-vixl-tests
Test: art_disassembler_tests
Change-Id: I9c2b936354763f0d116dfb7fe355841b9f833a34
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