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2025-01-27Add a one-pass baseline compiler for arm64. Nicolas Geoffray
Currently handles 50% of methods by supporting methods that: - don't branch - don't have try/catch - don't have float/double - <= 8 registers - opcodes are const/invokes/iget/iput/const-string/new-instance/checkcast. Cost of compilation is 10 times less than current baseline compiler. Performance of generated code: jit-baseline-cc configuration shows no impact on go/lem Test: test.py Change-Id: I8c99b8a8a7552c09c900c5c3e831e8897aef73e5
2025-01-03x86_64: Refactor assembler code for arithmetic ops. Vladimir Marko
Define `EmitVecArithAndLogicalOperation()` signature based on the CL https://android-review.googlesource.com/2873415 by Vinay Kompella but do only refactoring of existing code without any additional changes from that CL. Test: m test-art-host-gtest Test: testrunner.py --host --optimizing Change-Id: I990ae75f699f03db8a6b2acc0e0fb8aa5675d97c
2025-01-02x86_64: Clean up VEX prefix generation for load/store. Vladimir Marko
Test: m test-art-host-gtest Test: testrunner.py --host --optimizing Change-Id: I8428428efd14bf5f95ed48c55d589f20301229a8
2025-01-02x86/x86-64: Clean up `p{sll,srl,sra}` tests. Vladimir Marko
Test: m test-art-host-gtest Change-Id: I0e9a0a684e4d4d0a80a343e7ac284d80f7a7bc2e
2024-12-30x86_64: Clean up `movd()`, `movq()`. Vladimir Marko
Rename the 64-bit `movd()` assembler functions to `movq()` and remove the `is64bit` argument from the other `movd()` functions, making them always emit 32-bit MOVD. Change `CodeGeneratorX86_64::Exchange32(XmmRegister, int)` to use the 32-bit `MOVD` by not updating the old `movd()` call, letting it resolve to the 32-bit version now. Test: m test-art-host-gtest Test: testrunner.py --host --optimizing Change-Id: I3d8cdaf2c097ebc6044b09d20139aeb20ab00e11
2024-11-04Check that immediate is 32b in andl. Almaz Mingaleev
Analogous to andq. AND in x86 supports only 32b immediates. Bug: 297147201 Test: ./art/test/testrunner/testrunner.py -b --host --64 Test: m test-art-host-gtest Change-Id: I2d4324fa93d08b7fcf7645a833ab50c0f8e990ce
2024-08-28x86_64: Add instrinsic for MethodHandle::invokeExact... Almaz Mingaleev
... which targets invoke-virtual methods. New entrypoint changes deliverException's offset, hence arm test change. Bug: 297147201 Test: ./art/test/testrunner/testrunner.py --host --64 -b --optimizing Test: ./art/test.py --host -g Change-Id: I636fc60c088bfdf9b695c92de47f1c539e3956f1
2024-08-23riscv64: Support Zbs ISA extension in ART assembler s.kozub
ISA extension support implemented in assembler Test: m test-art-host-gtest Test: run-gtests.sh Change-Id: Ib21e6768c18b90419068e1389d6a8c61f5033f92
2024-08-06Remove unused variables. Christopher Ferris
Test: Builds with -Wunused-variable Change-Id: I151f837b7d17f0156f0e6bc889ad26ac064b7dae
2024-08-02ART: Suppress -Wdeprecated-declarations for vixl includes. Vladimir Marko
Test: m Change-Id: I7152bdbcfcf7de463a237082e2f769172bb8b37a
2024-08-01Rework exception delivery and deoptimization Chris Jones
Both exception delivery (various methods calling Thread::QuickDeliverException()) and deoptimization (via artDeoptimizeImpl) use QuickExceptionHandler to find the target context and do a long jump to it via QuickExceptionHandler::DoLongJump. The long jump is done directly from the C++ code, so the frames of the related C++ method are still on the stack before the change of the pc. Note that all those methods are marked as NO_RETURN to reflect that. This patch changes the approach; instead of having the long jump directly from the C++ methods related to exceptions and deoptimization, those methods now only prepare the long jump context and return. So their callers (mainly .S quick entry points and stubs) now need to do a long jump explicitly; thus there will be no C++ frames on the stack before the jump. This approach makes it possible to support exceptions and deoptimization in simulator mode; so we don't need to unwind native (C++ methods' frames) and simulated stacks at the same. Authors: Artem Serov <artem.serov@linaro.org>, Chris Jones <christopher.jones@arm.com> Test: test.py --host --target Change-Id: I5f90e6b5ba152fc2205728f1e814bbe3d609af9d
2024-06-20Replace `ScopedAssertNoNewTransactionRecords`... Vladimir Marko
... with `ScopedAssertNoTransactionChecks`. The new check is stronger than the old one but does not work during early setup when we do not have a `Thread` object yet. Test: m test-art-host-gtest Test: testrunner.py --host --optimizing Change-Id: Iba5a5cda0d97993ff324b4d11de02cb07f770699
2024-06-18riscv64: Implement `LongCondCBranch`. Vladimir Marko
Test: m test-art-host-gtest Bug: 328561342 Change-Id: I84f643e6796369f461473661b561973ba7e7283a
2024-06-18riscv64: Enable two assembler tests after clang update. Vladimir Marko
Test: m test-art-host-gtest Bug: 328561342 Change-Id: I54be1f3df96dc83c355acb7b43bb0ddc93d8eca3
2024-06-17riscv64: Clean up after compressed branch fixup. Vladimir Marko
Clean up after https://android-review.googlesource.com/3000792 and add more tests. Test: m test-art-host-gtest Bug: 328561342 Change-Id: I63f0c76e936fec42f86fc140d3ea1492e4a0f605
2024-06-13Use C++20 `string{,_view}::{starts,ends}_with()`, part 1. Vladimir Marko
Remove the header file `string_view_cpp20.h` and update all source files that previously used this header file. Test: m test-art-host-gtest Test: testrunner.py --host --optimizing Change-Id: Iafcdfc838a97deed7fb3a37cc8afe1f7ee78306b
2024-06-11Disable tests that fail after compiler update Dmitrii Ishcheikin
Bug: 345708905 Test: presubmit Change-Id: I7d29ff1461c417ea1d226caf8cc525922cde3997
2024-06-11riscv64: Enable auto-compression for JNI tests Roman Artemev
Roll back changes disable using compression in JNI macro assembler tests Test: m test-art-host-gtest Test: run-gtests.sh Test: testrunner.py --target --optimizing Bug: 328561342 Change-Id: Ieaa2c7296f09d4964af4229d06c806976ada5a52
2024-05-31riscv64: Support auto-compression for branches Roman Artemev
Use compressed branch instructions if possible in branch resolver Add new *CBranch types, cond & uncond Add tests Test: m test-art-host-gtest Test: run-gtests.sh Test: testrunner.py --target --optimizing Bug: 328561342 Change-Id: Ib3c12f29d9246a91b5afb31f3bf0463fbdc7b992
2024-04-18riscv64: Reorganize list of branches bound to the same label Roman Artemev
Move next link from code buffer to branch object This change is required to properly support compressed branches Test: m test-art-host-gtest Test: run-gtests.sh Test: testrunner.py --target --optimizing Bug: 328561342 Change-Id: Icbf61e9ec758b0116358c29bf93d27878a9c7753
2024-04-12riscv64: Support auto-compression for raw branches. Vladimir Marko
Test: m test-art-host-gtest Test: run-gtests.sh Test: testrunner.py --target --optimizing Bug: 328561342 Change-Id: I2c5f8b21ac6a4c3bbf7f3335e2e9d1f67526b3f6
2024-03-26Rename enums.h/.cc to pointer_size.h/.cc. Santiago Aboy Solanes
It was the only enum in the file Bug: 329378408 Test: art/test/testrunner/testrunner.py --host --64 --optimizing -b Change-Id: If0e385324afa3685f648135ba9b60e6bc79ba0ed
2024-03-25riscv64: Add missed arg annotations in asm tests Roman Artemev
Add missed annotation to constant arguments in tests related to auto-compression Test: None Bug: 328561342 Change-Id: I2bcb7b40645d2097553e86fc046eefa938e2fa2a
2024-03-25riscv64: Add comment into Riscv64Assembler::Add Roman Artemev
In case of 'add rd, Zero, Zero' we could use conversion into 'c.li rd, 0' but for some reason clang does not support it so it could not be tested. Test: None Bug: 328561342 Change-Id: I6efab426bf72330e3df2d6122bc83a3499ac4c9e
2024-03-21riscv64: Support auto-compression for ebreak/unimp Roman Artemev
Emit automatically corresponding compressed instruction Add tests Test: m test-art-host-gtest Test: run-gtests.sh Test: testrunner.py --target --optimizing Bug: 328561342 Change-Id: Iea334f94f0f0b30d05442df10b5bd0efae19857a
2024-03-21riscv64: Support auto-compression for load/store Roman Artemev
Emit automatically corresponding compressed instruction if applicable for memory instructions Add tests Test: m test-art-host-gtest Test: run-gtests.sh Test: testrunner.py --target --optimizing Bug: 328561342 Change-Id: Iaacc301c856a3c38eec85d7306c92b8135e76ee8
2024-03-21riscv64: Support auto-compression for arithmethic Roman Artemev
Emit automatically corresponding compressed instruction if applicable for arithmethics Add tests Test: m test-art-host-gtest Test: run-gtests.sh Test: testrunner.py --target --optimizing Bug: 328561342 Change-Id: I7f429eea7033db52f91fdbc67668c5662f3c05e0
2024-03-21riscv64: Add missed CHECK in CAddi16Sp instr Roman Artemev
Add missed assertion check about immediate operand Test: None Bug: 328561342 Change-Id: Iaa75c77690549f6d7bff313fccb8e907b526cfa2
2024-03-19Make assembler tests more strict. Vladimir Marko
If the assembled code differs, fail even if the disassembly and code size are the same, except for x86 and x86-64. Test: m test-art-host-gtest Bug: 328561342 Change-Id: I80c10088edd7f0a83dfa30e1d388b831e77c8d6e
2024-03-18riscv64: Temporary disable compression in jni test Roman Artemev
Temporary disable auto-compression in JNI macro assembler tests. It required to properly split compression-related commits into separate parts Test: m test-art-host-gtest Test: run-gtests.sh Test: testrunner.py --target --optimizing Bug: 328561342 Change-Id: Iba6042b9c381a4c710058fd45faf402a3a4b9688
2024-03-18riscv64: Add classes to enable/disable C ext Roman Artemev
Add Scoped classes to enable and disable compressed instructions during codegeneration Also add class to enable ISA feature similar to class which desables ISA features Move compressed features mask from test to assembler .h Test: None Bug: 328561342 Change-Id: I4af8a355eb19a617554c53b4e054e62fd36d78e2
2024-03-14Make sure there are no lone UNREACHABLEs Santiago Aboy Solanes
Either remove them, or add a LOG(FATAL) before them. Bug: 328756212 Test: art/test/testrunner/testrunner.py --host --64 --optimizing -b Test: m test-art-host-gtest Change-Id: Ibf2bddb0a4add5a844a515a040b3751acc7faf84
2024-03-12Remove default cases when all cases are defined Santiago Aboy Solanes
Bug: 328756212 Test: art/test/testrunner/testrunner.py --host --64 --optimizing -b Test: m test-art-host-gtest Change-Id: I9584e1b93e49265b84a9e45c8b283ebaf8ad3eb2
2024-03-08riscv64: Speed up some assembler tests. Vladimir Marko
Reduce the number of string replacement calls by caching intermediate strings. Do this for functions that have at least four nested loops. Test: m test-art-host-gtest Bug: 328726543 Change-Id: Iab45df1bcd3d9f68cdbf1d51d7f6601bb2d66199
2024-02-29riscv64: Add extension restrictions to assembler. Vladimir Marko
Use them to select different implementations of the `Zext*` and `Sext*` macros and ensure that LR/SC sequences contain only permitted instructions. Test: m test-art-host-gtest Test: run-gtests.sh Test: testrunner.py --target --optimizing Bug: 283082089 Change-Id: I3c306eecc123e5f10a0181942f1cd3dad7ec9a4c
2024-02-24riscv64: Make "C" extension default for assembler tests. Vladimir Marko
Move responsibility for restricting the instruction set to individual tests. Test: m test-art-host-gtest Bug: 283082089 Change-Id: I4a4f96df2d3b8fd1feae4b56cf13053b542ee732
2024-02-21Allocate JNI assembler labels with `ArenaAllocator`. Vladimir Marko
Test: m test-art-host-gtests Test: testrunner.py --host --optimizing Bug: 181943478 Change-Id: I7b3c7b20ead48924c061ae465208bc90e9a10676
2024-02-20riscv64: Implement "C" extension in assembler Roman Artemev
Support Compressed extension in Masm Implement tests for new instructions Test: m art_compiler_host_tests Test: $NATIVE_TESTS/art_compiler_host_tests_intermediates/art_compiler_host_tests Change-Id: I370d3c98ffc4948d09c5a01665305ffdea7e5d54
2024-02-16ricv64: Update "Zbb" extension opcode comment. Vladimir Marko
Test: N/A (Comment only) Bug: 283082089 Change-Id: I73a70031d55cccc04d93289927ae8df70402ef1d
2024-02-16riscv64: Add "Zbb" sign-/zero-extension to assembler. Vladimir Marko
Test: m test-art-host-gtest Bug: 283082089 Change-Id: Ibfd7ba6bb82de5414741456358d7c00a43914454
2024-02-12JNI: Keep previous LRT state in callee-save reg. Vladimir Marko
Golem results for art-opt-cc (higher is better): linux-armv7 (Odroid-C2) before after NativeDowncallStaticFast 21.622 21.923 (+1.395%) NativeDowncallStaticFast6 18.491 18.719 (+1.236%) NativeDowncallStaticFastRefs6 15.347 15.504 (+1.025%) NativeDowncallVirtualFast 20.741 21.319 (+2.787%) NativeDowncallVirtualFast6 18.953 19.183 (+1.218%) NativeDowncallVirtualFastRefs6 15.500 15.663 (+1.053%) NativeDowncallStaticNormal 14.620 14.757 (0.9495%) NativeDowncallStaticNormal6 13.120 13.235 (+0.8823%) NativeDowncallStaticNormalRefs6 11.454 11.538 (+0.7258%) NativeDowncallVirtualNormal 14.216 14.486 (+1.898%) NativeDowncallVirtualNormal6 13.347 13.466 (+0.8978%) NativeDowncallVirtualNormalRefs6 11.538 11.628 (+0.7752%) linux-armv7 (Raspberry Pi 4) before after NativeDowncallStaticFast 43.305 42.331 (-2.250%) NativeDowncallStaticFast6 35.608 37.369 (+4.945%) NativeDowncallStaticFastRefs6 31.390 31.793 (+1.285%) NativeDowncallVirtualFast 33.814 31.825 (-5.882%) NativeDowncallVirtualFast6 34.311 36.445 (+6.220%) NativeDowncallVirtualFastRefs6 31.762 32.419 (+2.069%) NativeDowncallStaticNormal 13.848 14.244 (+2.859%) NativeDowncallStaticNormal6 13.592 13.725 (+0.9804%) NativeDowncallStaticNormalRefs6 12.671 12.536 (-1.061%) NativeDowncallVirtualNormal 13.979 13.848 (-0.9397%) NativeDowncallVirtualNormal6 13.242 13.592 (+2.647%) NativeDowncallVirtualNormalRefs6 12.364 12.358 (-0.094%) linux-armv8 (Odroid-C2) before after NativeDowncallStaticFast 24.752 25.160 (+1.648%) NativeDowncallStaticFast6 22.571 22.908 (+1.494%) NativeDowncallStaticFastRefs6 19.183 19.183 (unchanged) NativeDowncallVirtualFast 21.622 22.244 (+2.879%) NativeDowncallVirtualFast6 21.319 21.934 (+2.887%) NativeDowncallVirtualFastRefs6 17.448 17.848 (+2.296%) NativeDowncallStaticNormal 17.048 17.250 (+1.183%) NativeDowncallStaticNormal6 15.992 16.161 (+1.054%) NativeDowncallStaticNormalRefs6 14.085 14.216 (+0.9314%) NativeDowncallVirtualNormal 15.504 15.826 (+2.077%) NativeDowncallVirtualNormal6 15.347 15.663 (+2.064%) NativeDowncallVirtualNormalRefs6 13.466 13.586 (+0.8859%) linux-armv8 (Raspberry Pi 4) before after NativeDowncallStaticFast 38.366 40.796 (+6.335%) NativeDowncallStaticFast6 38.347 40.419 (+5.405%) NativeDowncallStaticFastRefs6 31.636 32.528 (+2.820%) NativeDowncallVirtualFast 35.201 37.406 (+6.266%) NativeDowncallVirtualFast6 34.000 35.626 (+4.782%) NativeDowncallVirtualFastRefs6 27.201 27.201 (unchanged) NativeDowncallStaticNormal 14.808 15.107 (+2.024%) NativeDowncallStaticNormal6 14.955 14.428 (-3.526%) NativeDowncallStaticNormalRefs6 14.174 13.855 (-2.254%) NativeDowncallVirtualNormal 14.735 14.307 (-2.904%) NativeDowncallVirtualNormal6 14.244 14.385 (+0.9921%) NativeDowncallVirtualNormalRefs6 14.105 14.244 (+0.9823%) linux-ia32 before after NativeDowncallStaticFast 223.66 233.77 (+4.516%) NativeDowncallStaticFast6 159.76 163.92 (+2.602%) NativeDowncallStaticFastRefs6 137.16 141.72 (+3.324%) NativeDowncallVirtualFast 211.79 224.05 (+5.791%) NativeDowncallVirtualFast6 149.85 154.00 (+2.769%) NativeDowncallVirtualFastRefs6 132.17 136.93 (+3.603%) NativeDowncallStaticNormal 51.091 51.091 (unchanged) NativeDowncallStaticNormal6 45.680 45.703 (+0.0497%) NativeDowncallStaticNormalRefs6 44.732 45.161 (+0.9606%) NativeDowncallVirtualNormal 50.450 50.450 (unchanged) NativeDowncallVirtualNormal6 45.161 45.161 (unchanged) NativeDowncallVirtualNormalRefs6 44.125 44.147 (+0.496%) linux-x64 before after NativeDowncallStaticFast 173.07 181.05 (+4.611%) NativeDowncallStaticFast6 156.50 161.34 (+3.092%) NativeDowncallStaticFastRefs6 130.37 131.61 (+0.9499%) NativeDowncallVirtualFast 169.00 174.83 (+3.447%) NativeDowncallVirtualFast6 148.13 149.35 (+0.8243%) NativeDowncallVirtualFastRefs6 127.31 130.11 (+2.200%) NativeDowncallStaticNormal 47.952 47.952 (unchanged) NativeDowncallStaticNormal6 46.789 46.789 (unchanged) NativeDowncallStaticNormalRefs6 44.643 44.643 (unchanged) NativeDowncallVirtualNormal 47.358 47.358 (unchanged) NativeDowncallVirtualNormal6 45.703 45.680 (-0.0497%) NativeDowncallVirtualNormalRefs6 44.643 44.643 (unchanged) Test: m test-art-host-gtest Test: testrunner.py --host Test: run-gtests.sh Test: testrunner.py --target --optimizing Bug: 172332525 Change-Id: I9606412c658cae8b7583308facf5ba095a982349
2024-02-08Use register pair loads/stores in JNI stubs... Vladimir Marko
... on arm/arm64 for local reference frame manipulation. Golem results for art-opt-cc (higher is better): linux-armv7 (Odroid-C2) before after NativeDowncallStaticFast 21.622 21.622 (unchanged) NativeDowncallStaticFast6 18.500 18.491 (-0.0500%) NativeDowncallStaticFastRefs6 15.354 15.354 (unchanged) NativeDowncallVirtualFast 21.027 20.741 (-1.361%) NativeDowncallVirtualFast6 18.953 18.953 (unchanged) NativeDowncallVirtualFastRefs6 15.504 15.504 (unchanged) NativeDowncallStaticNormal 14.620 14.620 (unchanged) NativeDowncallStaticNormal6 13.120 13.120 (unchanged) NativeDowncallStaticNormalRefs6 11.454 11.454 (unchanged) NativeDowncallVirtualNormal 14.342 14.216 (-0.8823%) NativeDowncallVirtualNormal6 13.347 13.347 (unchanged) NativeDowncallVirtualNormalRefs6 11.538 11.544 (+0.0481%) linux-armv7 (Raspberry Pi 4) before after NativeDowncallStaticFast 41.937 41.564 (-0.8906%) NativeDowncallStaticFast6 33.234 35.608 (+7.144%) NativeDowncallStaticFastRefs6 30.527 31.469 (+3.085%) NativeDowncallVirtualFast 37.531 35.429 (-5.600%) NativeDowncallVirtualFast6 32.803 34.125 (+4.028%) NativeDowncallVirtualFastRefs6 30.500 31.500 (+3.279%) NativeDowncallStaticNormal 13.599 14.112 (+3.773%) NativeDowncallStaticNormal6 13.599 13.599 (unchanged) NativeDowncallStaticNormalRefs6 12.358 12.677 (+2.580%) NativeDowncallVirtualNormal 13.473 13.848 (+2.781%) NativeDowncallVirtualNormal6 13.235 13.242 (+0.0495%) NativeDowncallVirtualNormalRefs6 12.165 12.364 (+1.632%) linux-armv8 (Odroid-C2) before after NativeDowncallStaticFast 23.988 24.765 (+3.238%) NativeDowncallStaticFast6 21.923 22.571 (+2.955%) NativeDowncallStaticFastRefs6 18.719 19.183 (+2.480%) NativeDowncallVirtualFast 21.027 21.622 (+2.828%) NativeDowncallVirtualFast6 20.267 21.319 (+5.190%) NativeDowncallVirtualFastRefs6 16.683 17.448 (+4.583%) NativeDowncallStaticNormal 16.683 17.057 (+2.239%) NativeDowncallStaticNormal6 15.656 15.992 (+2.149%) NativeDowncallStaticNormalRefs6 13.958 14.085 (+0.9054) NativeDowncallVirtualNormal 15.196 15.504 (+2.026%) NativeDowncallVirtualNormal6 15.049 15.347 (+1.980%) NativeDowncallVirtualNormalRefs6 13.006 13.466 (+3.541%) linux-armv8 (Raspberry Pi 4) before after NativeDowncallStaticFast 36.482 38.366 (+5.164%) NativeDowncallStaticFast6 37.406 38.366 (+2.564%) NativeDowncallStaticFastRefs6 28.770 31.652 (+10.02%) NativeDowncallVirtualFast 34.000 35.201 (+3.532%) NativeDowncallVirtualFast6 33.251 34.000 (+2.254%) NativeDowncallVirtualFastRefs6 26.474 27.201 (+2.747%) NativeDowncallStaticNormal 14.237 14.606 (+2.592%) NativeDowncallStaticNormal6 14.244 14.948 (+4.942%) NativeDowncallStaticNormalRefs6 13.012 14.181 (+8.983%) NativeDowncallVirtualNormal 14.105 14.663 (+3.954%) NativeDowncallVirtualNormal6 13.979 14.735 (+5.406%) NativeDowncallVirtualNormalRefs6 13.725 14.244 (+3.775%) The Odroid-C2 results appear essentially unchanged for armv7 (with some minor regressions within noise) and only little better for armv8 (but still likely within noise). On the Raspberry Pi 4, there appears to be some improvement for armv7 and a decent improvement for armv8 but there is higher level of noise than on Odroid-C2. Results from this single run are not very conclusive but we expect to see a clear trend in the data after submission. Test: m test-art-host-gtest Test: testrunner.py --host --optimizing Test: run-gtest.sh Test: testrunner.py --target --optimizing Bug: 172332525 Change-Id: I01033950355c988c8a0e7ed6bdb6e585587dcfb4
2024-02-03Revert "Revert "Inverse inputs for some vector operations if the..." Aditya Kumar
Revert submission 2937811-revert-2804373-clang_r510928-SBSNEPCUZV Reason for revert: bpf errors have been fixed in https://android-review.git.corp.google.com/c/platform/build/soong/+/2940160 Bug: b/308826679 Reverted changes: /q/submissionid:2937811-revert-2804373-clang_r510928-SBSNEPCUZV Change-Id: I73e6048b79c5916a46e3444478ddb32466833cf1
2024-02-01riscv64: Remove unnecesary restriction from `VF{add,sub}_wf`. Vladimir Marko
And add tests for pseudo-instructions `VL<n>r()`. Test: m test-art-host-gtest Bug: 283082089 Change-Id: Iadd368b62a95cf8cadbc6739609df3e4029782fa
2024-01-31Revert "Inverse inputs for some vector operations if the generat..." Pirama Arumuga Nainar
Revert submission 2804373-clang_r510928 Bug: http://b/301328082 Reason for revert: Broke aosp-main/aosp_x86-next-userdebug Reverted changes: /q/submissionid:2804373-clang_r510928 Change-Id: I4c127fdfc630a9cbace0f1a6b6d0868faa30018e
2024-01-30Inverse inputs for some vector operations if the generated code can be smaller. Nicolas Geoffray
Bug: 316829093 Test: test-art-host-gtest Change-Id: I31b2b8f90498365e424687a27b512de960821a75
2024-01-30riscv64: Style fixes for Vector assembler tests. Vladimir Marko
Test: m test-art-host-gtest Bug: 283082089 Change-Id: I7e80bb03d3c20fa16f9b38209cf1e6a9a178b604
2024-01-30riscv64: RISC-V RVV assembler tests Roman Artemev
Add tests for newly added instructions Adjust clang/objdump CLI options Test: m art_compiler_host_tests Test: $NATIVE_TESTS/art_compiler_host_tests_intermediates/art_compiler_host_tests Change-Id: I3fdd831737daf844c7b03ef010d27d44056ec59d
2024-01-24riscv64: Fix typo in RVV instructions Roman Artemev
Fix a few misprints in operand names Test: none Change-Id: I8de6f240ca18248aafd2389d41c54c24cdf07374
2024-01-19riscv64: Implement RISC-V Vector instructions Roman Artemev
Implement Vector Instruction in MacroAssembler - RVV control instructions - memory access vector instructions - vector arithmetics Test: Added in the next commit Change-Id: I50b52b5aef864dbfdc6b275040dc2961dc625d61
generated by cgit v1.2.3-59-g8ed1b (git 2.39.0) at 2025-12-02 15:15:10 +0000