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path: root/compiler/optimizing/locations.h
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2015-02-04Merge "ART: Change x86 long param ABI (Quick/JNI/Opt)" Nicolas Geoffray
2015-02-04Finally implement Location::kNoOutputOverlap. Nicolas Geoffray
The [i, i + 1) interval scheme we chose for representing lifetime positions is not optimal for doing this optimization. It however doesn't prevent recognizing a non-split interval during the TryAllocateFreeReg phase, and try to re-use its inputs' registers. Change-Id: I80a2823b0048d3310becfc5f5fb7b1230dfd8201
2015-01-30ART: Change x86 long param ABI (Quick/JNI/Opt) Mark Mendell
Ensure that we don't pass a long parameter across the last register and the stack: skip the register and allocate it only on the stack. This was requested to simplify the optimizing compiler code generation for x86. Optimizing (Baseline) compiler support for x86 longs: - Remove QuickParameter from Location, as there are no longer any uses of it. Bump oat.h version because we changed an ABI again. I changed IsParamALong() to return false for argument 0 (this argument). I am not sure why it differed from all other tests. I have not tested on ARM. I followed Nicolas's suggestions for setting the value of kSplitPairAcrossRegisterAndStack for different architectures. Change-Id: I2f16b33c1dac58dd4f4f503e9c2309d845f5fb7a Signed-off-by: Mark Mendell <mark.p.mendell@intel.com>
2015-01-28ART: Arm64 optimizing compiler intrinsics Andreas Gampe
Implement most intrinsics for the optimizing compiler for Arm64. Change-Id: Idb459be09f0524cb9aeab7a5c7fccb1c6b65a707
2015-01-21Enable core callee-save on x64. Nicolas Geoffray
Will work on other architectures and FP support in other CLs. Change-Id: I8cef0343eedc7202d206f5217fdf0349035f0e4d
2015-01-21Revert "Revert "Fully support pairs in the register allocator."" Nicolas Geoffray
This reverts commit c399fdc442db82dfda66e6c25518872ab0f1d24f. Change-Id: I19f8215c4b98f2f0827e04bf7806c3ca439794e5
2015-01-21Revert "Fully support pairs in the register allocator." Nicolas Geoffray
Libcore tests fail. This reverts commit 41aedbb684ccef76ff8373f39aba606ce4cb3194. Change-Id: I2572f120d4bbaeb7a4d4cbfd47ab00c9ea39ac6c
2015-01-21Fully support pairs in the register allocator. Nicolas Geoffray
Enabled on ARM for longs and doubles. Change-Id: Id8792d08bd7ca9fb049c5db8a40ae694bafc2d8b
2015-01-16Do not use register pair in a parallel move. Nicolas Geoffray
The ParallelMoveResolver does not work with pairs. Instead, decompose the pair into two individual moves. Change-Id: Ie9d3f0b078cef8dc20640c98b20bb20cc4971a7f
2015-01-15ART: Optimizing compiler intrinsics Andreas Gampe
Add intrinsics infrastructure to the optimizing compiler. Add almost all intrinsics supported by Quick to the x86-64 backend. Further intrinsics require more assembler support. Change-Id: I48de9b44c82886bb298d16e74e12a9506b8e8807
2015-01-08Implement double and float support for arm in register allocator. Nicolas Geoffray
The basic approach is: - An instruction that needs two registers gets two intervals. - When allocating the low part, we also allocate the high part. - When splitting a low (or high) interval, we also split the high (or low) equivalent. - Allocation follows the (S/D register) requirement that low registers are always even and the high equivalent is low + 1. Change-Id: I06a5148e05a2ffc7e7555d08e871ed007b4c2797
2014-11-27Ensure opt. compiler doesn't get core & FP registers mixed up. Roland Levillain
Replace Location::As<T>() with two method methods (Location::AsRegister<T>() and Location::AsFpuRegister<T>()) checking the kind of the location (register). Change-Id: I22b4abee1a124b684becd2dc1caf33652b911070
2014-11-19Fix safepoint bug when computing live registers. Nicolas Geoffray
Change-Id: I8f28dd287c0e04223c49dea6a323058c1b210913
2014-11-07Do not update Out after it has a valid location. Nicolas Geoffray
Slow paths use LocationSummary to know where to move things around, and they are executed at the end of the code generation. This fix is needed for https://android-review.googlesource.com/#/c/113345/. Change-Id: Id336c6409479b1de6dc839b736a7234d08a7774a
2014-11-04Implement CONST_CLASS in optimizing compiler. Nicolas Geoffray
Change-Id: Ia8c8dfbef87cb2f7893bfb6e178466154eec9efd
2014-11-04Merge "ART: Replace COMPILE_ASSERT with static_assert (compiler)" Andreas Gampe
2014-11-03ART: Replace COMPILE_ASSERT with static_assert (compiler) Andreas Gampe
Replace all occurrences of COMPILE_ASSERT in the compiler tree. Change-Id: Icc40a38c8bdeaaf7305ab3352a838a2cd7e7d840
2014-11-03Remove -Wno-unused-parameter and -Wno-sign-promo from base cflags. Ian Rogers
Fix associated errors about unused paramenters and implict sign conversions. For sign conversion this was largely in the area of enums, so add ostream operators for the effected enums and fix tools/generate-operator-out.py. Tidy arena allocation code and arena allocated data types, rather than fixing new and delete operators. Remove dead code. Change-Id: I5b433e722d2f75baacfacae4d32aef4a828bfe1b
2014-10-30Fix for long parameter passed both in stack and register. Nicolas Geoffray
Fix for long parameter passed both in stack and register on 32bits architectures. The move to hard float ABI makes it so that the register index does not necessarily match the stack index anymore. Change-Id: I26b483f68ac86d336b4a37d94c38b04917668659
2014-10-29Add support for static fields in optimizing compiler. Nicolas Geoffray
Change-Id: Id2f010589e2bd6faf42c05bb33abf6816ebe9fa9
2014-10-27Support hard float on arm in optimizing compiler. Nicolas Geoffray
Also bump oat version, needed after latest hard float switch. Change-Id: Idf5acfb36c07e74acff00edab998419a3c6b2965
2014-10-21Remove the notion of dies at entry. Nicolas Geoffray
- Instead, explicitly say that the output does not overlap. - Inputs that must be in a fixed register do die at entry, as we know they have a location that others can not take. - There is also no need to differentiate between an input move and a connecting sibling move - those can be put in the same parallel move instruction. Change-Id: I1b2b2827906601f822b59fb9d6a21d48e43bae27
2014-10-09stdint types all the way! Ian Rogers
Change-Id: I4e4ef3a2002fc59ebd9097087f150eaf3f2a7e08
2014-10-09Merge "Tidy ELF builder." Ian Rogers
2014-10-09Tidy ELF builder. Ian Rogers
Don't do "if (ptr)". Use const. Use DISALLOW_COPY_AND_ASSIGN. Avoid public member variables. Move ValueObject to base and use in ELF builder. Tidy VectorOutputStream to not use non-const reference arguments. Change-Id: I2c727c3fc61769c3726de7cfb68b2d6eb4477e53
2014-10-09Stop converting from Location to ManagedRegister. Nicolas Geoffray
Now the source of truth is the Location object that knows which register (core, pair, fpu) it needs to refer to. Change-Id: I62401343d7479ecfb24b5ed161ec7829cda5a0b1
2014-10-07Add support for floats and doubles. Nicolas Geoffray
- Follows Quick conventions. - Currently only works with baseline register allocator. Change-Id: Ie4b8e298f4f5e1cd82364da83e4344d4fc3621a3
2014-10-06Add a prepare for register allocation pass. Nicolas Geoffray
- Currently the pass just changes the uses of checks to the actual values. - Also optimize array access, now that inputs can be constants. - And fix another bug in the register allocator reveiled by this change. Change-Id: I43be0dbde9330ee5c8f9d678de11361292d8bd98
2014-10-06Add support for inputs dying at entry of instructions. Nicolas Geoffray
- Start using it in places where it makes sense. - Also improve suspend check on arm to use subs directly. Change-Id: I09ac0589f5ccb9b850ee757c76dcbcf35ee8cd01
2014-09-27Register allocator: refine instructions liveness. Nicolas Geoffray
Add support for instructions that die at the beginning of another instruction. Before, an instruction needed to stay alive during the instruction, so the register allocator was not able not reuse the register. Change-Id: I5f11a80b0a20778227229eb797816edcc6365297
2014-09-25Merge "Optimize suspend checks in optimizing compiler." Nicolas Geoffray
2014-09-25Optimizing compiler: remove unnecessary `explicit' keywords. Roland Levillain
Change-Id: I5927fd92d53308c81e14edbd6e7d1c943bfa085b
2014-09-25Optimize suspend checks in optimizing compiler. Nicolas Geoffray
- Remove the ones added during graph build (they were added for the baseline code generator). - Emit them at loop back edges after phi moves, so that the test can directly jump to the loop header. - Fix x86 and x86_64 suspend check by using cmpw instead of cmpl. Change-Id: I6fad5795a55705d86c9e1cb85bf5d63dadfafa2a
2014-09-23Support for saving and restoring live registers in a slow path. Nicolas Geoffray
And use it in suspend check slow paths. Change-Id: I79caf28f334c145a36180c79a6e2fceae3990c31
2014-09-08Runtime support for the new stack maps for the opt compiler. Nicolas Geoffray
Now most of the methods supported by the compiler can be optimized, instead of using the baseline. Change-Id: I80ab36a34913fa4e7dd576c7bf55af63594dc1fa
2014-07-21Add assembly operations with constants in optimizing compiler. Nicolas Geoffray
Change-Id: I5bcc35ab50d4457186effef5592a75d7f4e5b65f
2014-06-13Add x86_64 support to the optimizing compiler. Nicolas Geoffray
Change-Id: I4462d9ae15be56c4a3dc1bd4d1c0c6548c1b94be
2014-05-23Forgot these files from last commit. Nicolas Geoffray
Change-Id: I9ab7975daa5ed7aae6bff8730bb63fb48a798ea8
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