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Test: art/test/testrunner/testrunner.py --target --64
Change-Id: I65b8a2e9f9cc361c044476a322218b6ec85647d3
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And clean up some uses of
instruction->GetBlock()->GetGraph()->GetAllocator()
Test: m test-art-host-gtest
Test: testrunner.py --host --optimizing
Change-Id: Iae218056495a0b9cf94d2a3c1cebd6c8eb909096
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Bug: 392802982
Test: art/test/testrunner/testrunner.py --host --64 -b --optimizing
Test: m test-art-host-gtest
Change-Id: I6e40215a5b1b18223c5f17e9e0ac70e05515fa94
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Special cases considered:
* Frame entry (hardcoded to be 0) or block entry.
* Native debuggable + slow paths, which is the only case where we
use the instruction's dex_pc.
Test: m test-art-host-gtest
Test: art/test/testrunner/testrunner.py --host --64 -b --optimizing
Change-Id: Ic5e0a6b5106395b891a9a45ea48da39dfb44a0a5
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Test: art/test/testrunner/testrunner.py --target --64
Change-Id: I987b29b7d78e2913eb728003fbc85bdfe1fbceff
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This is a minor cleanup after
https://android-review.googlesource.com/3048514 .
Test: m test-art-host-gtest
Test: testrunner.py --host --optimizing --speed-profile
Bug: 38313278
Change-Id: Ic47063231fd48656b612ede3ec100ceb8a379050
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Test: m test-art-host-gtest
Test: testrunner.py --host --optimizing
Change-Id: I1658a61953aaf109d68a2df7a534c3972679c291
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update_old_value_slow_path_ is different than nullptr and
that DCHECK should always fail.
Test: LUCI run https://ci.chromium.org/b/8731455182373771345 and note
no `update_old_value_slow_path_ == nullptr` failure.
Change-Id: Ia9dd93fae84bb9758d8b80f297f3819ca4003c17
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This can save some ParallelMove instructions.
For x86(_64) all FPToFP intrinsics can add it.
For RISC-V, MathSqrt can add it but the ones that call
GenDoubleRound can't. Also, we can add it for MathMultiplyHigh.
Test: art/test/testrunner/testrunner.py --host --64 -b --optimizing
Test: LUCI run https://ci.chromium.org/b/8731845964396026257
Change-Id: I28e13caf84cd850566538efbd285c0264ce80a1a
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Test: Builds with -Wunused-variable
Change-Id: Ie308b9f1d7a092c67ab2d86d3f877fe5b59fdac4
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This reverts commit c1bd4376b18ff46e5156cc597bd3311dd86fabd9.
Reason for revert: fixed original root cause for breakage
Change-Id: Ic9c214ebd691abf7f163b6399e8a94fc6f277ea0
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This reverts commit bcb5c19e5e200607fe76294aeb5273ddac5f04ae.
Bug: 370098695
Reason for revert: Breaks LUCI builds for arm https://ci.chromium.org/ui/p/art/builders/ci/angler-armv7-non-gen-cc/4506/overview
Change-Id: Ia72938c65c45db0ccd14f8901e715a9ec2930087
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Praise the Absolute! 🦑
Bug: 370098695
Change-Id: Icd0435c33a7a3705674eb2e3b027056a6c1298ba
Tested: UnsafeTest
Tested: manually inspected output disassembly
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Follow up to aosp/3282234 regarding comments after submission.
Bug: 362916226
Test: art/test/testrunner/testrunner.py --host --64 --optimizing -b
Change-Id: Id572dd42e5aa877f4ae4a20cd43ad7a778e92815
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This reverts commit 8567fcdf972ade85785b689a15e3593a7d3bff9d.
Reason for revert: RISC-V fix
Test: LUCI run for RISC-V
Change-Id: I6392bfa045e7737b5c45d78da4f7ecb8fbd3b89a
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This reverts commit 9ff2b617341bfe574e2d8706553f0cd65a1a2fc8.
Reason for revert: failed ART test 712-varhandle-invocations on riscv64
`F dex2oat64: intrinsics_riscv64.cc:4821 Check failed: locations->GetTempCount() == 2u (locations->GetTempCount()=3, 2u=2)`
Change-Id: I68a3830ccd730afa66e9cff277fe2a06829ddabe
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We were missing to intrinsify getAndUpdate methods whose value was unused. By adding this support, they get a considerable runtime improvement.
Bug: 362916226
Test: art/test/testrunner/testrunner.py --host --64 --optimizing -b
Test: art/test/testrunner/testrunner.py --host --32 --optimizing -b
Test: art/test/testrunner/testrunner.py --target --64 --optimizing
Test: art/test/testrunner/testrunner.py --target --32 --optimizing
Change-Id: I63d5a897ac9ea3c133167ac186afd8595f75bb13
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Test: art/test/testrunner/testrunner.py --host --64 --optimizing -b
Change-Id: I2fc3cd539ee1f64d1757c3b2a0a532ff6e7366f7
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Performance improvement:
copySign(double) -29%
copySign(float) -33%
signum(double) -20%
signum(float) -22%
Test: testrunner.py --target --64 --ndebug --optimizing
Change-Id: I3b69a4d35a0b37e5debed9f16c3a757a4204387e
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Implemented SystemArrayCopy for primitive types (Char, Int, Byte).
Used unrolling by 16 bytes for optimization.
Also add additional tests for ArrayCopy intrinsic
Test: testrunner.py --target --no-prebuild --jit-on-first-use --64
Change-Id: I60f59b8b6eb164c9daf0a61c669de1606712ad09
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Implement intrinsic for RISC-V target
Integer.remainderUnsigned: +13.71%
Long.remainderUnsigned: +1623.19%
Test: testrunner.py --target --64 --ndebug --optimizing
Change-Id: I4c3c47bad8fcbdde723e68d19aad45be0d4ff8bb
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Bug: 264654008
Test: m tidy-art
Change-Id: I6a96bee1510449760634dbef5c1fac21a7e1c80e
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Bug: 264654008
Test: m tidy-art
Change-Id: I7cbe86ab1cc9de2ca2e80583203e8d9e7abcf44b
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Implemented StringGetCharsNoCheck intrinsic.
Added new checks in the 536-checker-intrinsic-optimization test in order to increase
the quality of test coverage for the case of uncompressed strings.
Test: testrunner.py --target --64 --ndebug --no-image --jit-on-first-use
Change-Id: I08bc075440eef1750a057bad5fe6de45f792091f
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Treat app image objects similar to boot image objects and
avoid unnecessary read barriers for app image `HLoadClass`
and `HInstanceOf` checks with app image `HLoadClass` input.
Extend other optimizations to treat app image classes the
same way as boot image classes even though this remains
mostly dormant because we currently do not initialize app
image classes with class initializers; the experimental
flag `--initialize-app-image-classes` is false by default.
Test: m test-art-host-gtest
Test: testrunner.py --host --optimizing --speed-profile
Bug: 38313278
Change-Id: I359dd8897f6d128213602f5731d40edace298ab8
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Test: art/test.py --target -r --64 --optimizing --ndebug
Change-Id: I9b68cb2994f1feda0f0cffb8a5d38e44f5cd807e
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Bug: 283082089
Test: art/test/testrunner/testrunner.py --target --64 --ndebug --no-image --jit-on-first-use
Change-Id: Ifb4076d7f12cbad174049995980f0f08db41357a
Signed-off-by: denis.tomashev <denis.tomashev@syntacore.com>
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Test: testrunner.py --target --64 --optimizing -t 712
Bug: 328420806
Change-Id: I6c12e66e5d0602b23af157016ba423aae7425031
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Use them to select different implementations of the `Zext*`
and `Sext*` macros and ensure that LR/SC sequences contain
only permitted instructions.
Test: m test-art-host-gtest
Test: run-gtests.sh
Test: testrunner.py --target --optimizing
Bug: 283082089
Change-Id: I3c306eecc123e5f10a0181942f1cd3dad7ec9a4c
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This reverts commit 1ba3516e8c3e2b86c73084893dd297f468469181.
Reason for revert:
PS1 is reland as-is
PS2 has two related fixes (for RISC-V and arm64) taking into
account that when we store zero, we use a special register.
Bug: 301833859
Bug: 310755375
Bug: 260843353
Test: lunch cf_riscv64_wear-trunk_staging-userdebug && m
Test: lunch starnix_wear_yukawa-trunk_staging-userdebug && m
Change-Id: I5e69890fd56404ddde56ebc457179241363d9243
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This reverts commit 1be176f5a78750e2f0e32470f8c83e3d1643954d.
Reason for revert: Potential cause of build breakage for cf_riscv64_wear-trunk_staging-userdebug build 11353124
Change-Id: I5db1c9fba1edd4ab1eef30e2b547bb9649af5c10
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This reverts commit 31b949bc4a76e5c6d00a8e18c346f123b5321a1c.
Reason for revert:
PS1 is reland as-is
PS2 has two fixes:
* Missed poisoning heap references in a code path
* Removed incorrect DCHECK
Change-Id: I81b317ddc704dbd8a173f5d5c624dbc69e2d9e60
Test: art/test/testrunner/testrunner.py --host --64 --optimizing -b
Test: art/test/testrunner/testrunner.py --target --64 --optimizing -b
Both commnands with `export ART_HEAP_POISONING=true`
Bug: 301833859
Bug: 310755375
Bug: 260843353
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This reverts commit b5b98b9bb31acb2deffb692c50d0fbc71476663b.
Reason for revert: Breaks tests in arm64 + heap poison configurations
Bug: 310755375
Bug: 260843353
Change-Id: I682c74987a365497e0dbe47eba26a9ccf0513561
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This reverts commit 9f8df195b7ff2ce47eec4e9b193ff3214ebed19c.
Reason for revert: Fix for x86_64 with heap poison enabled
This case uses a temp with index `1` in the regular FieldSet case.
This is done like this due to GenerateVarHandleSet also calling
HandleFieldSet. The bug was that we were allocating only one
temp in the regular FieldSet case and therefore not having the
temp with index `1` available.
PS1 is the revert as-is.
PS2 contains the fix.
Test: art/test/testrunner/testrunner.py --host --64 --optimizing -b
Test: Same command with heap poison enabled too
Bug: 301833859
Bug: 310755375
Bug: 260843353
Change-Id: Ie2740b4c443158c4e72810ce1d8268353c5f0055
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This reverts commit 7c1dd6e2d1893f288214413c4b97273980f3aa4a.
Reason for revert: build breakages, using a different number of temps vs the expected (crashing in https://cs.android.com/android/platform/superproject/main/+/main:art/compiler/optimizing/code_generator_x86_64.cc;l=5488;drc=7c1dd6e2d1893f288214413c4b97273980f3aa4a)
Change-Id: I843c039394dd666776ea5bcb5b10b1f47df12d53
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This reverts commit 5a3271d7caafefd10a20f5a5db09d2c178838b76.
Reason for revert:
This CL has two fixes (codegen not doing a null check if a write
barrier is being relied on, and codegen not recomputing
skipping write barriers), regression tests, a new
runtime check which runs in debug mode for the CC GC to ensure
that the card table is set correctly for skipped write barriers,
and new compile time (graph checker) tests to ensure graph
consistency.
This patchset updates the WriteBarrierKind to be
{emit being relied on, emit not being relied on, dont emit},
which leaves the null check skip implementation to codegen.
Test 2247- is removed from knownfailures.json but still skipped
in MTS due to SLO requirements.
Test: art/test/testrunner/testrunner.py --host --64 --optimizing -b
Bug: 301833859
Bug: 310755375
Bug: 260843353
Change-Id: I025597e284b2765986e2091538680ee629fb5ae7
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Test: testrunner.py --target --64 --ndebug --optimizing
Bug: 283082089
Change-Id: Iba6321ed2b5aa2249eae3ec5b47d5c5364542748
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Skip the unnecessary write barrier for zero-length arraycopy
as we do on x86/x86-64 since
https://android-review.git.corp.google.com/2893223 .
Test: testrunner.py --target --64 --ndebug --optimizing
Bug: 283082089
Change-Id: Ie30dc9e6ee66bee884c6f61141b14b7e02b404e3
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Test: testrunner.py --target --64 --ndebug --optimizing --jit
-t 050-sync-test -t 1941-dispose-stress -t 988-method-trace
Bug: 283082089
Change-Id: I113c90e399dd603c152241e0b89c7f19a5105c43
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Fix heap poisoning for stubs, nterp, codegen and some
intrinsics and disable a few intrinsics broken for the
heap poisoning configuration.
Note that this fixes heap poisoning only for the CC GC.
The heap poisoning is pobably still broken for CMC GC.
Test: Build with `ART_HEAP_POISONING=true`, then
testrunner.py --target --64 --ndebug --optimizing --interpreter
Bug: 283082089
Change-Id: I386235f6379722e1b2355150ab7d14f2ffb0da85
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Define a new optimization flag for source and destination
position match. Use it to avoid the forward-copy check
(where the assembler optimized away a BLT instruction,
so we had just a useless BNE to the next instruction) and
one position sign check.
Avoid checking that the position is inside the array. The
subsequent subtraction cannot underflow an `int32_t` and
the following BLT shall go to the slow path for negative
values anyway.
Rewrite the array type check to avoid unnecessary checks
and read barriers.
Use an allocated temporary instead of scratch register
for the marking in the read barrier slow path. Simplify
the gray bit check and the fake dependency.
Use constant position and length locations for small
constant values. (It was probably an oversight that we
used it only for large constant values.)
Emit threshold check when the length equals source or
destination length. The old code allowed the intrinsic
to process array copy of an arbirary length.
Use `ShNAdd()` for faster array address calculations.
Use helper functions and lambdas to simplify the code.
Pass registers and locations by value. Prefer load/store
macro instructions over raw load/store instructions. Use
a bare conditional branch to assert the `TMP` shall not
be clobbered.
Test: testrunner.py --target --64 --ndebug --optimizing
Bug: 283082089
Change-Id: I3f697b4a74497d6d712a92450a6a45e772430662
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Test: testrunner.py --target --ndebug --optimizing --jit --64
Test: testrunner.py --target --no-prebuild --jit-on-first-use --64
Bug: 283082089
Signed-off-by: Aleksandr Soldatov <aleksandr.soldatov@syntacore.com>
Change-Id: I8f9aa02299c08922b4edfe25d6ded368b41d1927
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Test: testrunner.py --target --64 --ndebug --optimizing
Bug: 283082089
Change-Id: I81c730d71169f0302c1ce32ce4dac50b0e3850cd
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Also move `divideUnsigned()` intrinsic implementations
together with other integral intrinsic implementations.
Test: testrunner.py --target --64 --ndebug --optimizing
Bug: 283082089
Change-Id: I57786789ce6114ee951f46b7614ce965bdce9617
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Test: testrunner.py --target --64 --ndebug --optimizing
Bug: 283082089
Change-Id: I51bb208f2d5e43f4eab60136491bbd62ec52c812
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Test: testrunner.py --target --64 --ndebug --optimizing
Bug: 283082089
Change-Id: I63a30dbf54e5eba0da08e0e99daef660e7660db7
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Fix the byte-swap CAS case for narrow types (short, char).
Note that these cases are not currently supported by libcore
and we therefore take the slow path during the access mode
check. However, the ART VarHandle implementation is ready to
handle them in case this arbitrary libcore (or upstream?)
decision changes and it generates code for them. This fix
avoids a `DCHECK` failure in `GenerateByteSwapAndExtract()`
by doing the `DCHECK` in two of its three callers and
generates the correct (and smaller) code in all cases.
Extend the run-test 712 to test offsets that would lead to
non-zero shift in `GenerateByteSwapAndExtract()`. To test
this code path, one needs to modify the libcore method
`VarHandle.unalignedAccessModesBitMask()` to permit the
`NUMERIC_ATOMIC_UPDATE_ACCESS_MODES_BIT_MASK` for `short`
(and maybe `char` but that makes less sense than `short`).
Test: testrunner.py --target --64 --ndebug --optimizing
Bug: 283082089
Change-Id: I23926bbafc9eff21e094b00f36357d629cc550a9
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And enable a test that exposes the bug even for `--ndebug`.
Test: testrunner.py --target --64 --ndebug --optimizing
Bug: 283082089
Bug: 224733324
Change-Id: I34ba41cdf905c2da703f77739758450d8d305bf1
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Test: builbot-build.sh --target
Bug: 283082089
Change-Id: I99c57cb1305c1f2bc5cd8310c104006febad1d3b
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This allows GenerateReverseBytes to check for instruction set features.
Test: Boot AOSP on HiFive Unmatched
Change-Id: I7bb880a24358d5712cd1ebd3a915e98eef1f40f5
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