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- Add a missing fence after allocation.
- Create a frame before fetching any register, otherwise, we may wrongly
use a caller-saved register that can be overwritten by the hotness
slow path.
Test: 719-varhandle-concurrency
Change-Id: I90278172e3d4f9a3561b269b35a59bd3e8ad1dfd
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Test: test.py
Change-Id: I5b6b667847727d4de3944467885576a15f72846f
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This reverts commit ee8ab3125768bbf60347c507103a910553acd158.
Reason for revert: Fix logic around branching.
Change-Id: Ifadcb75488fe25dd612451c5813ea797b9da3b5c
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This reverts commit 31308e27c488a857d950c47148cdf783ea3a8447.
Reason for revert: Though the code is flagged, potential regression in b/400516671
Change-Id: I8709ea1cbbd3ec59a9f6f8a6e79c28939d6566f5
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Test: test.py
Change-Id: I481535be7a2269eb2de1f7fdc837a5f9e41666db
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Currently handles 50% of methods by supporting methods that:
- don't branch
- don't have try/catch
- don't have float/double
- <= 8 registers
- opcodes are
const/invokes/iget/iput/const-string/new-instance/checkcast.
Cost of compilation is 10 times less than current baseline compiler.
Performance of generated code: jit-baseline-cc configuration shows no
impact on go/lem
Test: test.py
Change-Id: I8c99b8a8a7552c09c900c5c3e831e8897aef73e5
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