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2025-02-28Remove `HInstruction::GetAllocator()`. Vladimir Marko
And clean up some uses of instruction->GetBlock()->GetGraph()->GetAllocator() Test: m test-art-host-gtest Test: testrunner.py --host --optimizing Change-Id: Iae218056495a0b9cf94d2a3c1cebd6c8eb909096
2025-02-19[Sim] Add a restricted mode setup Chris Jones
This CL introduces a special ART setup for all modes (host, target), which is going to be a base for VIXL Simulator Stage 1 setup. This setup can be enabled by exporting ART_USE_RESTRICTED_MODE=true to the environment before building ART. The setup limits ART by doing the following: - Limits the GC to only non-concurent Mark&Sweep. - Turns off the Nterp (so only switch C++ intepreter to be used). - Turns off the JNI compiler (GenericJNITrampoline to be used). - Rejects the compilation of all method (except for the allow list). - Turns off compilation and support of intrinsics. - Turns off implicit null checks. - Turns off implicit suspend checks. - Turns off introspection entrypoints. - Turns off special behavior for critical native methods. - Turns off compiler CHECKER tool. With these limitations it will be easier to start off an initial Simulator Stage 1 setup. As the limitations are set for all the modes, it will be easy to compare/debug the workflow for the simulator mode and to compare it to host and target runs. The CL also adds sections in knownfailures.json for tests that fail in this special setup. Also cleanup some read barrier entrypoint declarations in entrypoints_init_arm64.cc to match the definitions in quick_entrypoints_arm64.S and slightly refactor Runtime::Init to stay below the 500 line limit. Author: Artem Serov <artem.serov@linaro.org> Artem Serov <artem.serov@arm.com> Chris Jones <christopher.jones@arm.com> Test: export ART_USE_RESTRICTED_MODE=true test.py --host --target Change-Id: I87319cf339646dc13b9086b00af08882b01603c8
2025-01-29Remove old workaround in RecordPcInfo Santiago Aboy Solanes
Bug: 392802982 Test: art/test/testrunner/testrunner.py --host --64 -b --optimizing Change-Id: I5fefd6939e1d8434f1d7ad913ced582fefed1b30
2025-01-29Remove unused dex_pc from GenerateUnresolvedFieldAccess Santiago Aboy Solanes
Bug: 392802982 Test: art/test/testrunner/testrunner.py --host --64 -b --optimizing Test: m test-art-host-gtest Change-Id: Ic4f0f515dcf7e8b54e5dedff5ff59c2d2e4ebd8a
2025-01-28Remove unused dex_pc from InvokeRuntime Santiago Aboy Solanes
Bug: 392802982 Test: art/test/testrunner/testrunner.py --host --64 -b --optimizing Test: m test-art-host-gtest Change-Id: I6e40215a5b1b18223c5f17e9e0ac70e05515fa94
2025-01-28Remove explicit dex_pc from RecordPcInfo Santiago Aboy Solanes
Special cases considered: * Frame entry (hardcoded to be 0) or block entry. * Native debuggable + slow paths, which is the only case where we use the instruction's dex_pc. Test: m test-art-host-gtest Test: art/test/testrunner/testrunner.py --host --64 -b --optimizing Change-Id: Ic5e0a6b5106395b891a9a45ea48da39dfb44a0a5
2024-10-14Fix typo in CodeGenerator::Compile Santiago Aboy Solanes
Change-Id: I795216915b1770371c7c9492dde0183ced225ca0
2024-10-07Reland "Calculate the number of out vregs." Vladimír Marko
This reverts commit 434a327234f74eed3ef4072314d2e2bdb73e4dda. Reason for revert: Relanding with no change. The regressions that were the reason for the revert may reappear. However, these regressions are probably caused by subtle effects that are not directly related to this change. For example, a code size improvement can regress performance simply by moving the start of a loop from an aligned address to an unaligned address, or by splitting a loop across two cache lines. Bug: 358519867 Bug: 359722268 Change-Id: I997b8a4219418f79b3a5fc4e7e50817911f0a737
2024-10-04Reduce memory used by `HEnvironment`. Vladimir Marko
Test: m test-art-host-gtest Test: testrunner.py --host --optimizing Bug: 181943478 Change-Id: Ie05d4001e411a669e11b8edda375414e5da52ae2
2024-08-21Revert "Calculate the number of out vregs." Vladimír Marko
This reverts commit 3e75615ad25b6af1842b194e78b429b0f585b46a. Reason for revert: Regressed some micro-benchmarks, see bug 359722268. Bug: 358519867 Bug: 359722268 Change-Id: I207cc78c88193564e90c98eda2c96a5ba354a588
2024-08-13Calculate the number of out vregs. Vladimir Marko
Determine the number of out vregs needed by invokes that actually make a call, and by `HStringBuilderAppend`s. This can yield smaller frame sizes of compiled methods when some calls are inlined or fully intrinsified. Test: m test-art-host-gtest Test: testrunner.py --host --optimizing Bug: 358519867 Change-Id: I4930a9bd811b1de14658f5ef44e65eadea6a7961
2024-07-02Revert^4 "x86_64: Add JIT support for LoadMethodType." Almaz Mingaleev
This reverts commit b63adc919ba9a53f4fbad476356c702845821149. Bringing back map from ArtMethod to code pointers. Bug: 297147201 Test: CtsPerfettoTestCases Test: ./art/test/testrunner/testrunner.py --host --64 --jit -b Test: ./art/test/testrunner/testrunner.py --host --64 --jit --cms -b Test: ./art/test/testrunner/testrunner.py --host --64 -b Test: ./art/test.py --host -b Change-Id: I6a1c50598ec878393edf8ef895274da79d4ab42d
2024-06-24Revert^3 "x86_64: Add JIT support for LoadMethodType." Santiago Aboy Solanes
This reverts commit d92a43f4310e2d634d6e8f24103fc1e27557d784. Reason for revert: Failing 979-const-method-handle https://ci.chromium.org/ui/p/art/builders/ci/host-x86_64-cms/10095/overview Change-Id: I9b44d8cc66e98db074edfa90ce2ebab087e4b115
2024-06-21Revert^2 "x86_64: Add JIT support for LoadMethodType." Almaz Mingaleev
This reverts commit 69c9ea4f93a688ff50e08060be37bcfd3f3e9910. Instead of storing reversed method_code_map_, now just keep MethodType-s associated with a compiled code. Increasing constant in 979/Main.java to trigger jit more reliably. Bug: 297147201 Test: CtsPerfettoTestCases Test: ./art/test/testrunner/testrunner.py --host --64 --jit -b Test: ./art/test/testrunner/testrunner.py --host --64 -b Test: ./art/test.py --host -b Change-Id: I5ece80b63cd0d6dac2805c94649726dc62fe85db
2024-04-11Revert "x86_64: Add JIT support for LoadMethodType." Nicolas Geoffray
This reverts commit 53ca944020bb86199f6f80d8594d5deb1b1d46dd. Bug: 297147201 Reason for revert: Crash on bot Change-Id: Ibf3b53a8fe67aa633686990881a96acb783af9a3
2024-04-11x86_64: Add JIT support for LoadMethodType. Almaz Mingaleev
In aosp/2876518 JIT code made runtime calls. Bug: 297147201 Test: ./art/test/testrunner/testrunner.py --host --64 --jit -b Test: ./art/test/testrunner/testrunner.py --host --64 -b Test: ./art/test.py --host -b Change-Id: Ifdfd3ace9419b34f8079c9ec4b1b2de31cb50ef7
2024-03-08Pass only shorty to `ArtQuickJniCompileMethod()`. Vladimir Marko
Passing a `dex_file` and `method_idx` makes testing unnecessarily difficult. Test: m test-art-host-gtest Test: testrunner.py --host --optimizing Bug: 288983053 Change-Id: Ice79423ec568e254547acd4448fb82e2ad11b79c
2024-01-30Reland^2 "Run optimizations with baseline compilation." Nicolas Geoffray
This reverts commit 3dccb13f4e92db37a13359e126c5ddc12cb674b5. Also includes the fix for incrementing hotness that got reverted: aosp/2906378 Bug: 313040662 Reduces jank on compose view scrolling for 4 iterations: - For Go Mokey: - Before: ~698 frames drawn / ~13.87% janky frames - After: ~937 frames drawn / ~5.52% janky frames - For Pixel 8 pro: - Before: ~2440 frames drawn / ~0.90% janky frames - After: ~2450 frames drawn / ~0.55% janky frames Reason for revert: Reduce inlining threshold for baseline. Change-Id: Iee5cd4c3ceb7715caf9299b56551aae6f0259769
2024-01-29Revert^7 "Disable write-barrier elimination pass" Santiago Aboy Solanes
This reverts commit 1ba3516e8c3e2b86c73084893dd297f468469181. Reason for revert: PS1 is reland as-is PS2 has two related fixes (for RISC-V and arm64) taking into account that when we store zero, we use a special register. Bug: 301833859 Bug: 310755375 Bug: 260843353 Test: lunch cf_riscv64_wear-trunk_staging-userdebug && m Test: lunch starnix_wear_yukawa-trunk_staging-userdebug && m Change-Id: I5e69890fd56404ddde56ebc457179241363d9243
2024-01-24Revert^6 "Disable write-barrier elimination pass" Matthew Reynolds
This reverts commit 1be176f5a78750e2f0e32470f8c83e3d1643954d. Reason for revert: Potential cause of build breakage for cf_riscv64_wear-trunk_staging-userdebug build 11353124 Change-Id: I5db1c9fba1edd4ab1eef30e2b547bb9649af5c10
2024-01-24Revert^5 "Disable write-barrier elimination pass" Santiago Aboy Solanes
This reverts commit 31b949bc4a76e5c6d00a8e18c346f123b5321a1c. Reason for revert: PS1 is reland as-is PS2 has two fixes: * Missed poisoning heap references in a code path * Removed incorrect DCHECK Change-Id: I81b317ddc704dbd8a173f5d5c624dbc69e2d9e60 Test: art/test/testrunner/testrunner.py --host --64 --optimizing -b Test: art/test/testrunner/testrunner.py --target --64 --optimizing -b Both commnands with `export ART_HEAP_POISONING=true` Bug: 301833859 Bug: 310755375 Bug: 260843353
2024-01-22Revert^4 "Disable write-barrier elimination pass" Santiago Aboy Solanes
This reverts commit b5b98b9bb31acb2deffb692c50d0fbc71476663b. Reason for revert: Breaks tests in arm64 + heap poison configurations Bug: 310755375 Bug: 260843353 Change-Id: I682c74987a365497e0dbe47eba26a9ccf0513561
2024-01-22Revert^3 "Disable write-barrier elimination pass" Santiago Aboy Solanes
This reverts commit 9f8df195b7ff2ce47eec4e9b193ff3214ebed19c. Reason for revert: Fix for x86_64 with heap poison enabled This case uses a temp with index `1` in the regular FieldSet case. This is done like this due to GenerateVarHandleSet also calling HandleFieldSet. The bug was that we were allocating only one temp in the regular FieldSet case and therefore not having the temp with index `1` available. PS1 is the revert as-is. PS2 contains the fix. Test: art/test/testrunner/testrunner.py --host --64 --optimizing -b Test: Same command with heap poison enabled too Bug: 301833859 Bug: 310755375 Bug: 260843353 Change-Id: Ie2740b4c443158c4e72810ce1d8268353c5f0055
2024-01-19Move files related to compiled code into oat/ directory Dmitrii Ishcheikin
Test: art/test.py -b --host Change-Id: Icedd3a82c6bca5147c3bc9dc50de5a729003d66f
2024-01-19Revert^2 "Disable write-barrier elimination pass" Santiago Aboy Solanes
This reverts commit 7c1dd6e2d1893f288214413c4b97273980f3aa4a. Reason for revert: build breakages, using a different number of temps vs the expected (crashing in https://cs.android.com/android/platform/superproject/main/+/main:art/compiler/optimizing/code_generator_x86_64.cc;l=5488;drc=7c1dd6e2d1893f288214413c4b97273980f3aa4a) Change-Id: I843c039394dd666776ea5bcb5b10b1f47df12d53
2024-01-19Revert "Disable write-barrier elimination pass" Santiago Aboy Solanes
This reverts commit 5a3271d7caafefd10a20f5a5db09d2c178838b76. Reason for revert: This CL has two fixes (codegen not doing a null check if a write barrier is being relied on, and codegen not recomputing skipping write barriers), regression tests, a new runtime check which runs in debug mode for the CC GC to ensure that the card table is set correctly for skipped write barriers, and new compile time (graph checker) tests to ensure graph consistency. This patchset updates the WriteBarrierKind to be {emit being relied on, emit not being relied on, dont emit}, which leaves the null check skip implementation to codegen. Test 2247- is removed from knownfailures.json but still skipped in MTS due to SLO requirements. Test: art/test/testrunner/testrunner.py --host --64 --optimizing -b Bug: 301833859 Bug: 310755375 Bug: 260843353 Change-Id: I025597e284b2765986e2091538680ee629fb5ae7
2024-01-03Revert^2 "x86_64: Store resolved MethodType-s in .bss." Almaz Mingaleev
This reverts commit d014fd019e84471665ac02f2de285541009892cd. Reason for revert: fix codegen to do runtime call in JIT for now. Bug: 297147201 Test: ./art/test/testrunner/testrunner.py --host --64 --optimizing -b Test: ./art/test/testrunner/testrunner.py --jvm -b Test: ./art/test.py --host -b Test: ./art/test/testrunner/testrunner.py --host --64 --jit -b Change-Id: I0f01c8391b09659bb6195955ecd8f88159141872
2023-12-15Revert "x86_64: Store resolved MethodType-s in .bss." Almaz Mingaleev
This reverts commit a627c7e71a59135daab7f2fb8505d4873f61e4ac. Reason for revert: 979-const-method-handle fails. Can repro with ITERATIONS_FOR_JIT set to 120_000 and ./art/test/testrunner/testrunner.py --host --64 --jit --no-jvmti --debug --prebuild --checkjni --cms --no-relocate --ntrace --cdex-fast -b -t 979-const Change-Id: I653a83aa12f2c28b163e0d43dbc95b8e8a190436
2023-12-15x86_64: Store resolved MethodType-s in .bss. Almaz Mingaleev
Bug: 297147201 Test: ./art/test/testrunner/testrunner.py --host --64 --optimizing -b Test: ./art/test/testrunner/testrunner.py --jvm -b Test: ./art/test.py --host -b Change-Id: I4bc2478ff88b2002a60c7126c1a1c9201082e550
2023-12-13riscv64: Clean up the `SystemArrayCopy` intrinsic. Vladimir Marko
Define a new optimization flag for source and destination position match. Use it to avoid the forward-copy check (where the assembler optimized away a BLT instruction, so we had just a useless BNE to the next instruction) and one position sign check. Avoid checking that the position is inside the array. The subsequent subtraction cannot underflow an `int32_t` and the following BLT shall go to the slow path for negative values anyway. Rewrite the array type check to avoid unnecessary checks and read barriers. Use an allocated temporary instead of scratch register for the marking in the read barrier slow path. Simplify the gray bit check and the fake dependency. Use constant position and length locations for small constant values. (It was probably an oversight that we used it only for large constant values.) Emit threshold check when the length equals source or destination length. The old code allowed the intrinsic to process array copy of an arbirary length. Use `ShNAdd()` for faster array address calculations. Use helper functions and lambdas to simplify the code. Pass registers and locations by value. Prefer load/store macro instructions over raw load/store instructions. Use a bare conditional branch to assert the `TMP` shall not be clobbered. Test: testrunner.py --target --64 --ndebug --optimizing Bug: 283082089 Change-Id: I3f697b4a74497d6d712a92450a6a45e772430662
2023-12-07Fix "the the" typos in the compiler. Vladimir Marko
Test: Rely on TreeHugger. Change-Id: I2ca2ef0d0fd710931a621cac2d03226889658af2
2023-12-06Remove partial LSE Santiago Aboy Solanes
It has been disabled for a while and it has bit rotted Bug: 298176183 Test: art/test/testrunner/testrunner.py --host --64 -b --optimizing Test: m test-art-host-gtest-art_compiler_tests64 Change-Id: I4fcd8b3d18a3388e078b5cb3c340b2e270aefef7
2023-10-30Replace `gUseReadBarrier` with compiler option in compiler. Vladimir Marko
Leave a few `gUseReadBarrier` uses in JNI macro assemblers. We shall deaal with these later. Test: m test-art-host-gtest Test: testrunner.py --host --optimizing Test: run-gtests.sh Test: testrunner.py --target --optimizing Bug: 289805127 Change-Id: I9d2aa245cee4c650129f169a82beda7dc0dd6a35
2023-09-08Remove some obsolete TODO comments, fix indentation. Vladimir Marko
Test: Rely on TreeHugger. Change-Id: I4e3c0ba13d576ef62121d47ebc4965f6667b624f
2023-08-30Move HasShouldDeoptimizeFlag from method header to CodeInfo. David Srbecky
We don't have room for the extra bit if the code size is greater than 1GB. Bug: 288215378 Bug: 288833213 Bug: 297093110 Test: ./art/test.py -b --host --64 Change-Id: I0070b270c7fe03f2f6fbb26223e78de41305c547
2023-06-28RISCV: Define Registers for RISCV in Codegen Lifang Xia
Test: m test-art-host-gtest Bug: 283082089 Change-Id: If161af9995d4611eca7209e0f3bbda55acf5049f
2023-06-21Remove CodeAllocator and the extra copy of generated code. Nicolas Geoffray
The code used to copy the final generated code twice: from assembler to CodeAllocator, and then to CodeAllocator to SwapAllocator/JitMemory. The assemblers never depended on the exact location of the generated code, so just drop that feature. Test: test.py Change-Id: I8dc82e4926097092b9aac336a5a5d40f79dc62ca
2023-06-13Move CodeGenerationData into its own header file. Nicolas Geoffray
To facilitate doing compiler experiments. Test: test.py Change-Id: I48943e6bcedb9023abf90ce6e6ea9b94866309d1
2023-05-22Use C++17's [[maybe_unused]] attribute in ART Stefano Cianciulli
Bug: 169680875 Test: mmm art Change-Id: Ic0cc320891c42b07a2b5520a584d2b62052e7235
2023-04-27Optimizing: Add `HInstruction::As##type()`. Vladimir Marko
After the old implementation was renamed in https://android-review.googlesource.com/2526708 , we introduce a new function with the old name but new behavior, just `DCHECK()`-ing the instruction kind before casting down the pointer. We change appropriate calls from `As##type##OrNull()` to `As##type()` to avoid unncessary run-time checks and reduce the size of libart-compiler.so. Test: m test-art-host-gtest Test: testrunner.py --host --optimizing Test: run-gtests.sh Test: testrunner.py --target --optimizing Bug: 181943478 Change-Id: I025681612a77ca2157fed4886ca47f2053975d4e
2023-04-27Optimizing: Rename `As##type` to `As##type##OrNull`. Vladimir Marko
The null type check in the current implementation of `HInstruction::As##type()` often cannot be optimized away by clang++. It is therefore beneficial to have two functions HInstruction::As##type() HInstruction::As##type##OrNull() where the first function never returns null but the second one can return null. The additional text "OrNull" shall also flag the possibility of yielding null to the developer which may help avoid bugs similar to what we have seen previously. This requires renaming the existing function that can return null and introducing new function that cannot. However, defining the new function `HInstruction::As##type()` in the same change as renaming the old one would risk introducing bugs by missing a rename. Therefore we simply rename the old function here and the new function shall be introduced in a separate change with all behavioral changes being explicit. Test: m test-art-host-gtest Test: testrunner.py --host --optimizing Test: buildbot-build.sh --target Bug: 181943478 Change-Id: I4defd85038e28fe3506903ba3f33f723682b3298
2023-04-04Inline unimplemented intrinsics Santiago Aboy Solanes
There are intrinsics that are unimplemented i.e. we didn't hand-craft code for them. Allow the inliner to inline those. Since our optimizations expect InvokeVirtual, I stopped the de-virtualization of intrinsics. That could be re-added if we modify optimizations like TryReplaceStringBuilderAppend. Test: art/test/testrunner/testrunner.py --host --64 --optimizing -b Test: art/test/testrunner/testrunner.py --target --64 --optimizing Test: compiling the APK in the bug and seeing the inline Bug: 262585898 Fixes: 262585898 Change-Id: I501b69c4ffd9082ca8ffacb1cd1cd5d1ab3668a8
2023-02-21riscv64: add initial support for ART. Ulya Trafimovich
The only supported mode is the switch interpreter. JNI transitions are not implemented yet (not even generic JNI trampoline), therefore it is impossible to run even a simple hello world test (because it requires loading Java libraries and initializing classes in them, many of which call native methods). The only passing ART test is 000-nop. Test: run ART test 000-nop on a Linux RISC-V VM: lunch aosp_riscv64-userdebug export ART_TEST_SSH_USER=ubuntu export ART_TEST_SSH_HOST=localhost export ART_TEST_SSH_PORT=10001 export ART_TEST_ON_VM=true . art/tools/buildbot-utils.sh art/tools/buildbot-build.sh --target # Create, boot and configure the VM. art/tools/buildbot-vm.sh create art/tools/buildbot-vm.sh boot art/tools/buildbot-vm.sh setup-ssh # password: 'ubuntu' art/tools/buildbot-cleanup-device.sh art/tools/buildbot-setup-device.sh art/tools/buildbot-sync.sh art/test.py --target -r --no-prebuild --ndebug --no-image \ --64 --interpreter 000-nop Co-authored-by: Lifang Xia <lifang_xia@linux.alibaba.com> Change-Id: Iac267525527901b74e863cb8c72ddcf0789e8a5d
2023-02-03riscv64: add missing UNUSED annotations. Ulya Trafimovich
The code compiles on other architectures that implement JNI compiler, because they use these variables. However the code won't compile for RISC-V as it falls into the default (unsupported) case. Test: lunch aosp_riscv64-userdebug && m dist Change-Id: I16010e806fe6c51fb0a7a20111e0d1feefde018c
2022-11-07Reland "Make compiler/optimizing/ symbols hidden." Vladimír Marko
This reverts commit 0a51605ddd81635135463dab08b6f7c21b58ffb0. Reason for revert: Reland after some of the required work was merged in other CLs. Also address a TODO from the original CL to mark required symbols with EXPORT in `intrinsic_objects.h`. Also mark symbols in new files as HIDDEN. Bug: 186902856 Test: m test-art-host-gtest Test: testrunner.py --host --optimizing Change-Id: I936d448983928af23614ca82c2d0bf9a645e2c52
2022-10-07Runtime implementation of try catch inlining Santiago Aboy Solanes
The main differences in the runtime are: 1) We now use a list of dex_pcs to find the correct catch handler instead of a single dex pc 2) We now need to restore vregs of the whole frame, which may be an inline frame. Bug: 227283224 Test: art/test/testrunner/testrunner.py --host --64 --optimizing -b Change-Id: I95d2f32088e1d420c83962a1693be18f3b63f8b4
2022-10-03Refactor Thumb2 entrypoint adjustment handling. Vladimir Marko
Reduce dependencies on `compiled_method.h` in preparation for moving it to dex2oat/. Test: m test-art-host-gtest Test: testrunner.py --host --optimizing Test: run-gtests.sh Test: testrunner.py --target --optimizing Change-Id: I55ff807e0c7d729142b1a64a3a0b6c6267027dc3
2022-09-08Reland "Add an environment to the beginning of catch blocks" Santiago Aboy Solanes
This reverts commit 37fe26288aaacae0f26873131dd92704796e09ec. Reason for revert: Pattern match fix Bug: 227283224 Test: art/test/testrunner/testrunner.py --host --64 --optimizing -b Test: art/test/testrunner/testrunner.py --host --64 --optimizing -b --debuggable 565-checker-condition-liveness (also for --target) Change-Id: Iaf784c12fb6229df6cfbd9a1b43467f5ed43c4d4
2022-09-06Revert "Add an environment to the beginning of catch blocks" Santiago Aboy Solanes
This reverts commit f976aa822dd35496e4e936b5802af0d53d39ac95. Reason for revert: breaking some tests https://ci.chromium.org/ui/p/art/builders/ci/angler-armv8-ndebug/3244/blamelist Change-Id: I5c2732e81bef8a7e83b661b1b947d7c079994c1b
2022-09-06Add an environment to the beginning of catch blocks Santiago Aboy Solanes
We can use the HNop to generate an environment for us and start using the existing environment infrastructure (e.g. EmitEnvironment) for recording the catch block's environment. This is done to provide support for try catch inlining since it requires several environments rather than just the one. When doing so, we now have a HNop at the beginning of each catch block. We have to modify code sinking to allow it to sink code past this HNop because if we don't we will sink code right before this instruction which will break the invariant of that HNop being the first instruction of a catch block. Test: art/test/testrunner/testrunner.py --host --64 --optimizing -b Change-Id: I16e7b8cad499fd2d6f7415112b46206db8daf544
generated by cgit v1.2.3-59-g8ed1b (git 2.39.0) at 2025-10-22 02:26:19 +0000