diff options
Diffstat (limited to 'test/640-checker-simd/src/SimdShort.java')
| -rw-r--r-- | test/640-checker-simd/src/SimdShort.java | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/test/640-checker-simd/src/SimdShort.java b/test/640-checker-simd/src/SimdShort.java index 1039e2e6bb..6b184a60e1 100644 --- a/test/640-checker-simd/src/SimdShort.java +++ b/test/640-checker-simd/src/SimdShort.java @@ -29,7 +29,7 @@ public class SimdShort { /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none /// CHECK-DAG: ArraySet loop:<<Loop>> outer_loop:none // - /// CHECK-START-{ARM,ARM64,MIPS64}: void SimdShort.add(int) loop_optimization (after) + /// CHECK-START-{ARM,ARM64}: void SimdShort.add(int) loop_optimization (after) /// CHECK-DAG: VecLoad loop:<<Loop:B\d+>> outer_loop:none /// CHECK-DAG: VecAdd loop:<<Loop>> outer_loop:none /// CHECK-DAG: VecStore loop:<<Loop>> outer_loop:none @@ -42,7 +42,7 @@ public class SimdShort { /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none /// CHECK-DAG: ArraySet loop:<<Loop>> outer_loop:none // - /// CHECK-START-{ARM,ARM64,MIPS64}: void SimdShort.sub(int) loop_optimization (after) + /// CHECK-START-{ARM,ARM64}: void SimdShort.sub(int) loop_optimization (after) /// CHECK-DAG: VecLoad loop:<<Loop:B\d+>> outer_loop:none /// CHECK-DAG: VecSub loop:<<Loop>> outer_loop:none /// CHECK-DAG: VecStore loop:<<Loop>> outer_loop:none @@ -55,7 +55,7 @@ public class SimdShort { /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none /// CHECK-DAG: ArraySet loop:<<Loop>> outer_loop:none // - /// CHECK-START-{ARM,ARM64,MIPS64}: void SimdShort.mul(int) loop_optimization (after) + /// CHECK-START-{ARM,ARM64}: void SimdShort.mul(int) loop_optimization (after) /// CHECK-DAG: VecLoad loop:<<Loop:B\d+>> outer_loop:none /// CHECK-DAG: VecMul loop:<<Loop>> outer_loop:none /// CHECK-DAG: VecStore loop:<<Loop>> outer_loop:none @@ -82,7 +82,7 @@ public class SimdShort { /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none /// CHECK-DAG: ArraySet loop:<<Loop>> outer_loop:none // - /// CHECK-START-{ARM,ARM64,MIPS64}: void SimdShort.neg() loop_optimization (after) + /// CHECK-START-{ARM,ARM64}: void SimdShort.neg() loop_optimization (after) /// CHECK-DAG: VecLoad loop:<<Loop:B\d+>> outer_loop:none /// CHECK-DAG: VecNeg loop:<<Loop>> outer_loop:none /// CHECK-DAG: VecStore loop:<<Loop>> outer_loop:none @@ -95,7 +95,7 @@ public class SimdShort { /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none /// CHECK-DAG: ArraySet loop:<<Loop>> outer_loop:none // - /// CHECK-START-{ARM,ARM64,MIPS64}: void SimdShort.not() loop_optimization (after) + /// CHECK-START-{ARM,ARM64}: void SimdShort.not() loop_optimization (after) /// CHECK-DAG: VecLoad loop:<<Loop:B\d+>> outer_loop:none /// CHECK-DAG: VecNot loop:<<Loop>> outer_loop:none /// CHECK-DAG: VecStore loop:<<Loop>> outer_loop:none @@ -108,7 +108,7 @@ public class SimdShort { /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none /// CHECK-DAG: ArraySet loop:<<Loop>> outer_loop:none // - /// CHECK-START-{ARM,ARM64,MIPS64}: void SimdShort.shl4() loop_optimization (after) + /// CHECK-START-{ARM,ARM64}: void SimdShort.shl4() loop_optimization (after) /// CHECK-DAG: VecLoad loop:<<Loop:B\d+>> outer_loop:none /// CHECK-DAG: VecShl loop:<<Loop>> outer_loop:none /// CHECK-DAG: VecStore loop:<<Loop>> outer_loop:none @@ -121,7 +121,7 @@ public class SimdShort { /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none /// CHECK-DAG: ArraySet loop:<<Loop>> outer_loop:none // - /// CHECK-START-{ARM,ARM64,MIPS64}: void SimdShort.sar2() loop_optimization (after) + /// CHECK-START-{ARM,ARM64}: void SimdShort.sar2() loop_optimization (after) /// CHECK-DAG: VecLoad loop:<<Loop:B\d+>> outer_loop:none /// CHECK-DAG: VecShr loop:<<Loop>> outer_loop:none /// CHECK-DAG: VecStore loop:<<Loop>> outer_loop:none |